1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright (c) 2016 - 2018 Cavium Inc. 3 * All rights reserved. 4 * www.cavium.com 5 */ 6 7 #ifndef __ECORE_INT_H__ 8 #define __ECORE_INT_H__ 9 10 #include "ecore.h" 11 #include "ecore_int_api.h" 12 13 #define ECORE_CAU_DEF_RX_TIMER_RES 0 14 #define ECORE_CAU_DEF_TX_TIMER_RES 0 15 16 #define ECORE_SB_ATT_IDX 0x0001 17 #define ECORE_SB_EVENT_MASK 0x0003 18 19 #define SB_ALIGNED_SIZE(p_hwfn) \ 20 ALIGNED_TYPE_SIZE(struct status_block, p_hwfn) 21 22 #define ECORE_SB_INVALID_IDX 0xffff 23 24 struct ecore_igu_block { 25 u8 status; 26 #define ECORE_IGU_STATUS_FREE 0x01 27 #define ECORE_IGU_STATUS_VALID 0x02 28 #define ECORE_IGU_STATUS_PF 0x04 29 #define ECORE_IGU_STATUS_DSB 0x08 30 31 u8 vector_number; 32 u8 function_id; 33 u8 is_pf; 34 35 /* Index inside IGU [meant for back reference] */ 36 u16 igu_sb_id; 37 38 struct ecore_sb_info *sb_info; 39 }; 40 41 struct ecore_igu_info { 42 struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH]; 43 u16 igu_dsb_id; 44 45 /* The numbers can shift when using APIs to switch SBs between PF and 46 * VF. 47 */ 48 struct ecore_sb_cnt_info usage; 49 50 /* Determine whether we can shift SBs between VFs and PFs */ 51 bool b_allow_pf_vf_change; 52 }; 53 54 /** 55 * @brief - Make sure the IGU CAM reflects the resources provided by MFW 56 * 57 * @param p_hwfn 58 * @param p_ptt 59 */ 60 int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn, 61 struct ecore_ptt *p_ptt); 62 63 /** 64 * @brief - Make sure IGU CAM reflects the default resources once again, 65 * starting with a 'dirty' SW database. 66 * @param p_hwfn 67 * @param p_ptt 68 */ 69 int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn, 70 struct ecore_ptt *p_ptt); 71 72 /** 73 * @brief Translate the weakly-defined client sb-id into an IGU sb-id 74 * 75 * @param p_hwfn 76 * @param sb_id - user provided sb_id 77 * 78 * @return an index inside IGU CAM where the SB resides 79 */ 80 u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id); 81 82 /** 83 * @brief return a pointer to an unused valid SB 84 * 85 * @param p_hwfn 86 * @param b_is_pf - true iff we want a SB belonging to a PF 87 * 88 * @return point to an igu_block, OSAL_NULL if none is available 89 */ 90 struct ecore_igu_block * 91 ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf); 92 /* TODO Names of function may change... */ 93 void ecore_int_igu_init_pure_rt(struct ecore_hwfn *p_hwfn, 94 struct ecore_ptt *p_ptt, 95 bool b_set, bool b_slowpath); 96 97 void ecore_int_igu_init_rt(struct ecore_hwfn *p_hwfn); 98 99 /** 100 * @brief ecore_int_igu_read_cam - Reads the IGU CAM. 101 * This function needs to be called during hardware 102 * prepare. It reads the info from igu cam to know which 103 * status block is the default / base status block etc. 104 * 105 * @param p_hwfn 106 * @param p_ptt 107 * 108 * @return enum _ecore_status_t 109 */ 110 enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn *p_hwfn, 111 struct ecore_ptt *p_ptt); 112 113 typedef enum _ecore_status_t (*ecore_int_comp_cb_t) (struct ecore_hwfn *p_hwfn, 114 void *cookie); 115 /** 116 * @brief ecore_int_register_cb - Register callback func for 117 * slowhwfn statusblock. 118 * 119 * Every protocol that uses the slowhwfn status block 120 * should register a callback function that will be called 121 * once there is an update of the sp status block. 122 * 123 * @param p_hwfn 124 * @param comp_cb - function to be called when there is an 125 * interrupt on the sp sb 126 * 127 * @param cookie - passed to the callback function 128 * @param sb_idx - OUT parameter which gives the chosen index 129 * for this protocol. 130 * @param p_fw_cons - pointer to the actual address of the 131 * consumer for this protocol. 132 * 133 * @return enum _ecore_status_t 134 */ 135 enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn *p_hwfn, 136 ecore_int_comp_cb_t comp_cb, 137 void *cookie, 138 u8 *sb_idx, __le16 **p_fw_cons); 139 /** 140 * @brief ecore_int_unregister_cb - Unregisters callback 141 * function from sp sb. 142 * Partner of ecore_int_register_cb -> should be called 143 * when no longer required. 144 * 145 * @param p_hwfn 146 * @param pi 147 * 148 * @return enum _ecore_status_t 149 */ 150 enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn, u8 pi); 151 152 /** 153 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id. 154 * 155 * @param p_hwfn 156 * 157 * @return u16 158 */ 159 u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn); 160 161 /** 162 * @brief Status block cleanup. Should be called for each status 163 * block that will be used -> both PF / VF 164 * 165 * @param p_hwfn 166 * @param p_ptt 167 * @param sb_id - igu status block id 168 * @param opaque - opaque fid of the sb owner. 169 * @param cleanup_set - set(1) / clear(0) 170 */ 171 void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn *p_hwfn, 172 struct ecore_ptt *p_ptt, 173 u16 sb_id, 174 u16 opaque, 175 bool b_set); 176 177 /** 178 * @brief ecore_int_cau_conf - configure cau for a given status 179 * block 180 * 181 * @param p_hwfn 182 * @param ptt 183 * @param sb_phys 184 * @param igu_sb_id 185 * @param vf_number 186 * @param vf_valid 187 */ 188 void ecore_int_cau_conf_sb(struct ecore_hwfn *p_hwfn, 189 struct ecore_ptt *p_ptt, 190 dma_addr_t sb_phys, 191 u16 igu_sb_id, u16 vf_number, u8 vf_valid); 192 193 /** 194 * @brief ecore_int_alloc 195 * 196 * @param p_hwfn 197 * @param p_ptt 198 * 199 * @return enum _ecore_status_t 200 */ 201 enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn *p_hwfn, 202 struct ecore_ptt *p_ptt); 203 204 /** 205 * @brief ecore_int_free 206 * 207 * @param p_hwfn 208 */ 209 void ecore_int_free(struct ecore_hwfn *p_hwfn); 210 211 /** 212 * @brief ecore_int_setup 213 * 214 * @param p_hwfn 215 * @param p_ptt 216 */ 217 void ecore_int_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt); 218 219 /** 220 * @brief - Enable Interrupt & Attention for hw function 221 * 222 * @param p_hwfn 223 * @param p_ptt 224 * @param int_mode 225 * 226 * @return enum _ecore_status_t 227 */ 228 enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn, 229 struct ecore_ptt *p_ptt, 230 enum ecore_int_mode int_mode); 231 232 /** 233 * @brief - Initialize CAU status block entry 234 * 235 * @param p_hwfn 236 * @param p_sb_entry 237 * @param pf_id 238 * @param vf_number 239 * @param vf_valid 240 */ 241 void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn, 242 struct cau_sb_entry *p_sb_entry, u8 pf_id, 243 u16 vf_number, u8 vf_valid); 244 245 enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn, 246 struct ecore_ptt *p_ptt, 247 u8 timer_res, u16 sb_id, bool tx); 248 #ifndef ASIC_ONLY 249 #define ECORE_MAPPING_MEMORY_SIZE(dev) \ 250 ((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \ 251 136 : NUM_OF_SBS(dev)) 252 #else 253 #define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev) 254 #endif 255 256 enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn, 257 struct ecore_ptt *p_ptt, 258 bool is_hw_init); 259 void ecore_pf_flr_igu_cleanup(struct ecore_hwfn *p_hwfn); 260 261 #endif /* __ECORE_INT_H__ */ 262