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/freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/samsung/
H A Dsamsung,fimd.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,s3c2443-fimd
19 - samsung,s3c6400-fimd
20 - samsung,s5pv210-fimd
[all …]
H A Dsamsung,exynos7-decon.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
22 const: samsung,exynos7-decon
27 clock-names:
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/freebsd-src/sys/contrib/device-tree/Bindings/display/exynos/
H A Dsamsung-fimd.txt1 Device-Tree bindings for Samsung SoC display controller (FIMD)
8 - compatible: value should be one of the following
9 "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
10 "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
11 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */
12 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */
13 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
14 "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */
15 "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */
17 - reg: physical base address and length of the FIMD registers set.
[all …]
/freebsd-src/contrib/unbound/util/storage/
H A Dlruhash.h2 * util/storage/lruhash.h - hashtable, hash function, LRU keeping.
70 * o unlock the entry if you hold the lock already.
165 /** size bitmask - since size is a power of 2 */
200 * To change overflow_next you need to hold the bin lock.
201 * To change the lru items you need to hold the hashtable lock.
268 * If key already present, this entry->key is deleted immediately.
269 * But entry->data is set to NULL before deletion, and put into
279 * At the end of the function you hold a (read/write)lock on the entry.
285 * @param wr: set to true if you desire a writelock on the entry.
291 hashvalue_type hash, void* key, int wr);
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H A Dslabhash.h2 * util/storage/slabhash.h - hashtable consisting of several smaller tables.
58 /** the size of the array - must be power of 2 */
60 /** size bitmask - uses high bits. */
106 * If key already present, this entry->key is deleted immediately.
107 * But entry->data is set to NULL before deletion, and put into
117 * At the end of the function you hold a (read/write)lock on the entry.
123 * @param wr: set to true if you desire a writelock on the entry.
129 hashvalue_type hash, void* key, int wr);
201 * @param wr: if true, writelock is obtained, otherwise readlock.
205 void slabhash_traverse(struct slabhash* table, int wr,
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/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp-crs328-4c-20s-4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS328-4C-20S-4S+ board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS328-4C-20S-4S+";
25 compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
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H A Darmada-xp-crs326-24g-2s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS326-24G-2S board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS326-24G-2S+";
25 compatible = "mikrotik,crs326-24g-2s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
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H A Darmada-xp-crs305-1g-4s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for CRS305-1G-4S board
8 * Based on armada-xp-db.dts
13 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
20 /dts-v1/;
21 #include "armada-xp-98dx3236.dtsi"
24 model = "CRS305-1G-4S+";
25 compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
38 arm,parity-enable;
39 marvell,ecc-enable;
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H A Darmada-xp-db-xc3-24g4xg.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-XC3-24G4XG board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx3336.dtsi"
23 model = "DB-XC3-24G4XG";
24 compatible = "marvell,db-xc3-24g4xg", "marvell,armadaxp-98dx3336", "marvell,armada-370-xp";
37 arm,parity-enable;
38 marvell,ecc-enable;
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H A Darmada-xp-db-dxbc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for DB-DXBC2 board
7 * Based on armada-xp-db.dts
12 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
19 /dts-v1/;
20 #include "armada-xp-98dx4251.dtsi"
24 compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp";
43 devbus,bus-width = <16>;
44 devbus,turn-off-ps = <60000>;
45 devbus,badr-skew-ps = <0>;
[all …]
H A Darmada-xp-openblocks-ax3-4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for OpenBlocks AX3-4 board
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "armada-xp-mv78260.dtsi"
16 model = "PlatHome OpenBlocks AX3-4 board";
17 …compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell…
20 stdout-path = "serial0:115200n8";
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H A Darmada-385-atl-x530.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 (x530/AT-GS980MX)
9 /dts-v1/;
10 #include "armada-385.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
15 model = "x530/AT-GS980MX";
19 stdout-path = "serial1:115200n8";
32 internal-reg
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H A Darmada-xp-gp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-MV784MP-GP)
6 * Copyright (C) 2013-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
22 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include "armada-xp-mv78460.dtsi"
27 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
[all …]
H A Darmada-xp-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-78460-BP)
6 * Copyright (C) 2012-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
23 /dts-v1/;
24 #include "armada-xp-mv78460.dtsi"
28 …compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370…
31 stdout-path = "serial0:115200n8";
[all …]
/freebsd-src/contrib/flex/src/
H A Dtables.c1 /* tables.c - tables serialization code
10 * to contract no. DE-AC03-76SF00098 between the United States
55 int yytbl_write32 (struct yytbl_writer *wr, flex_uint32_t v);
56 int yytbl_write16 (struct yytbl_writer *wr, flex_uint16_t v);
57 int yytbl_write8 (struct yytbl_writer *wr, flex_uint8_t v);
58 int yytbl_writen (struct yytbl_writer *wr, void *v, int len);
67 * @param wr an uninitialized writer
71 int yytbl_writer_init (struct yytbl_writer *wr, FILE * out) in yytbl_writer_init() argument
73 wr->out = out; in yytbl_writer_init()
74 wr->total_written = 0; in yytbl_writer_init()
[all …]
/freebsd-src/sys/dev/cxgbe/tom/
H A Dt4_cpl_io.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
83 struct wrqe *wr; in send_flowc_wr() local
86 struct vi_info *vi = toep->vi; in send_flowc_wr()
87 struct port_info *pi = vi->pi; in send_flowc_wr()
88 struct adapter *sc = pi->adapter; in send_flowc_wr()
89 unsigned int pfvf = sc->p in send_flowc_wr()
188 struct wrqe *wr; update_tx_rate_limit() local
238 struct wrqe *wr; send_reset() local
393 struct wrqe *wr; send_rx_credits() local
453 struct wrqe *wr; t4_close_conn() local
641 struct wrqe *wr; t4_push_frames() local
966 struct wrqe *wr; write_iscsi_mbuf_wr() local
1123 struct wrqe *wr; t4_push_pdus() local
1494 struct wrqe *wr; send_abort_rpl() local
1945 struct wrqe *wr; t4_set_tcb_field() local
[all...]
H A Dt4_listen.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
97 struct tid_info *t = &sc->tids; in alloc_stid()
99 MPASS(t->nstids > 0); in alloc_stid()
100 MPASS(t->stid_tab == NULL); in alloc_stid()
102 t->stid_tab = malloc(t->nstid in alloc_stid()
349 struct wrqe *wr; send_flowc_wr_synqe() local
396 struct wrqe *wr; send_abort_rpl_synqe() local
430 struct wrqe *wr; create_server() local
458 struct wrqe *wr; create_server6() local
488 struct wrqe *wr; destroy_server() local
1130 struct wrqe *wr; send_synack() local
[all...]
H A Dt4_tls.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2017-2018 Chelsio Communications, Inc.
66 struct adapter *sc = td_adapter(toep->td); in t4_set_tls_tcb_field()
68 t4_set_tcb_field(sc, &toep->ofld_txq->wrq, toep, word, mask, val, 0, 0); in t4_set_tls_tcb_field()
76 return (sc->tt.tls && sc->cryptocaps & FW_CAPS_CONFIG_TLSKEYS); in can_tls_offload()
82 struct tls_ofld_info *tls_ofld = &toep->tls; in tls_tx_key()
84 return (tls_ofld->tx_key_addr >= 0); in tls_tx_key()
91 struct adapter *sc = td_adapter(toep->td); in t4_set_rx_quiesce()
93 t4_set_tcb_field(sc, &toep->ofld_txq->wrq, toep, W_TCB_T_FLAGS, in t4_set_rx_quiesce()
[all …]
/freebsd-src/contrib/unbound/services/cache/
H A Drrset.h2 * services/cache/rrset.h - Resource record set cache.
90 * Caller may not hold a lock on ANY rrset, this could give deadlock.
94 * o no walk through the bin-overflow-list.
123 * After calling you do not hold a lock, and the rrset is inserted in
164 * @param wr: set true to get writelock.
170 uint32_t flags, time_t timenow, int wr);
182 * If true, you hold readlocks on all the ref items.
212 * If so, it will update the security, trust and rrset-ttl values.
216 * untouched. The rrset in the cache is updated in-place.
225 * If so, it will update the security, trust and rrset-ttl values.
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-pandora-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/input/input.h>
14 cpu0-supply = <&vcc>;
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <26000000>;
35 compatible = "connector-analog-tv";
40 remote-endpoint = <&venc_out>;
45 gpio-leds {
47 compatible = "gpio-leds";
[all …]
/freebsd-src/sys/dev/mlx4/mlx4_ib/
H A Dmlx4_ib_qp.c15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
53 #include <rdma/mlx4-abi.h>
133 if (!mlx4_is_master(dev->dev)) in is_tunnel_qp()
136 return qp->mqp.qpn >= dev->dev->phys_caps.base_tunnel_sqpn && in is_tunnel_qp()
137 qp->mqp.qpn < dev->dev->phys_cap in is_tunnel_qp()
2298 build_sriov_qp0_header(struct mlx4_ib_sqp * sqp,const struct ib_ud_wr * wr,void * wqe,unsigned * mlx_seg_len) build_sriov_qp0_header() argument
2427 build_mlx_header(struct mlx4_ib_sqp * sqp,const struct ib_ud_wr * wr,void * wqe,unsigned * mlx_seg_len) build_mlx_header() argument
2718 set_reg_seg(struct mlx4_wqe_fmr_seg * fseg,const struct ib_reg_wr * wr) set_reg_seg() argument
2748 set_atomic_seg(struct mlx4_wqe_atomic_seg * aseg,const struct ib_atomic_wr * wr) set_atomic_seg() argument
2764 set_masked_atomic_seg(struct mlx4_wqe_masked_atomic_seg * aseg,const struct ib_atomic_wr * wr) set_masked_atomic_seg() argument
2773 set_datagram_seg(struct mlx4_wqe_datagram_seg * dseg,const struct ib_ud_wr * wr) set_datagram_seg() argument
2784 set_tunnel_datagram_seg(struct mlx4_ib_dev * dev,struct mlx4_wqe_datagram_seg * dseg,const struct ib_ud_wr * wr,enum mlx4_ib_qp_type qpt) set_tunnel_datagram_seg() argument
2806 build_tunnel_header(const struct ib_ud_wr * wr,void * wqe,unsigned * mlx_seg_len) build_tunnel_header() argument
2889 build_lso_seg(struct mlx4_wqe_lso_seg * wqe,const struct ib_ud_wr * wr,struct mlx4_ib_qp * qp,unsigned * lso_seg_len,__be32 * lso_hdr_sz,__be32 * blh) build_lso_seg() argument
2909 send_ieth(const struct ib_send_wr * wr) send_ieth() argument
2931 mlx4_ib_post_send(struct ib_qp * ibqp,const struct ib_send_wr * wr,const struct ib_send_wr ** bad_wr) mlx4_ib_post_send() argument
3266 mlx4_ib_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * wr,const struct ib_recv_wr ** bad_wr) mlx4_ib_post_recv() argument
[all...]
/freebsd-src/sys/dev/sdio/
H A Dsdiob.c1 /*-
3 * Copyright (c) 2018-2019 The FreeBSD Foundation
36 * Group. This Simplified Specification is provided on a non-confidential
39 * Association, SD Group, SD-3C LLC or other third parties.
45 * is provided "AS-IS" without any representations or warranties of any
46 * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
48 * right of the SD Group, SD-3C LLC, the SD Card Association or any third
51 * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
52 * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
54 * information, know-ho
141 sdiob_rw_direct_sc(struct sdiob_softc * sc,uint8_t fn,uint32_t addr,bool wr,uint8_t * val) sdiob_rw_direct_sc() argument
194 sdio_rw_direct(device_t dev,uint8_t fn,uint32_t addr,bool wr,uint8_t * val) sdio_rw_direct() argument
243 sdiob_rw_extended_cam(struct sdiob_softc * sc,uint8_t fn,uint32_t addr,bool wr,uint8_t * buffer,bool incaddr,uint32_t b_count,uint16_t blksz) sdiob_rw_extended_cam() argument
374 sdiob_rw_extended_sc(struct sdiob_softc * sc,uint8_t fn,uint32_t addr,bool wr,uint32_t size,uint8_t * buffer,bool incaddr) sdiob_rw_extended_sc() argument
428 sdiob_rw_extended(device_t dev,uint8_t fn,uint32_t addr,bool wr,uint32_t size,uint8_t * buffer,bool incaddr) sdiob_rw_extended() argument
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/freebsd-src/sys/ofed/include/rdma/
H A Drdmavt_qp.h4 /*-
5 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
29 * - Redistributions of source code must retain the above copyright
31 * - Redistributions in binary form must reproduce the above copyright
35 * - Neither the name of Intel Corporation nor the names of its
73 * RVT_S_SIGNAL_REQ_WR - set if QP send WRs contain completion signaled
74 * RVT_S_BUSY - send tasklet is processing the QP
75 * RVT_S_TIMER - the RC retry timer is active
76 * RVT_S_ACK_PENDING - an ACK is waiting to be sent after RDMA read/atomics
77 * RVT_S_WAIT_FENCE - waiting for all prior RDMA read or atomic SWQEs
[all …]
/freebsd-src/sys/dev/cxgbe/
H A Dt4_sge.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
86 * 0-7 are valid values.
94 * -1: driver should figure out a good value.
98 int fl_pad = -1;
104 * -1: driver should figure out a good value.
107 static int spg_len = -
2154 struct wrqe *wr; drain_wrq_wr_list() local
2226 t4_wrq_tx_locked(struct adapter * sc,struct sge_wrq * wrq,struct wrqe * wr) t4_wrq_tx_locked() argument
2916 struct wrqe *wr; start_wrq_wr() local
2973 struct wrqe *wr = __containerof(w, struct wrqe, wr); commit_wrq_wr() local
3069 struct fw_eth_tx_pkts_wr *wr = p; wr_can_update_eq() local
3086 set_txupdate_flags(struct sge_txq * txq,u_int avail,struct fw_eth_tx_pkt_wr * wr) set_txupdate_flags() argument
3139 void *wr; /* start of the last WR written to the ring */ eth_tx() local
5433 struct fw_eth_tx_pkt_vm_wr *wr; write_txpkt_vm_wr() local
5529 write_raw_wr(struct sge_txq * txq,void * wr,struct mbuf * m0,u_int available) write_raw_wr() argument
5566 struct fw_eth_tx_pkt_wr *wr; write_txpkt_wr() local
5831 struct fw_eth_tx_pkts_wr *wr; write_txpkts_wr() local
5942 struct fw_eth_tx_pkts_vm_wr *wr; write_txpkts_vm_wr() local
6616 write_ethofld_wr(struct cxgbe_rate_tag * cst,struct fw_eth_tx_eo_wr * wr,struct mbuf * m0,int compl) write_ethofld_wr() argument
6771 struct fw_eth_tx_eo_wr *wr; ethofld_tx() local
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