1*f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*f126890aSEmmanuel Vadot/* 3*f126890aSEmmanuel Vadot * Device Tree file for DB-DXBC2 board 4*f126890aSEmmanuel Vadot * 5*f126890aSEmmanuel Vadot * Copyright (C) 2016 Allied Telesis Labs 6*f126890aSEmmanuel Vadot * 7*f126890aSEmmanuel Vadot * Based on armada-xp-db.dts 8*f126890aSEmmanuel Vadot * 9*f126890aSEmmanuel Vadot * Note: this Device Tree assumes that the bootloader has remapped the 10*f126890aSEmmanuel Vadot * internal registers to 0xf1000000 (instead of the default 11*f126890aSEmmanuel Vadot * 0xd0000000). The 0xf1000000 is the default used by the recent, 12*f126890aSEmmanuel Vadot * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier 13*f126890aSEmmanuel Vadot * boards were delivered with an older version of the bootloader that 14*f126890aSEmmanuel Vadot * left internal registers mapped at 0xd0000000. If you are in this 15*f126890aSEmmanuel Vadot * situation, you should either update your bootloader (preferred 16*f126890aSEmmanuel Vadot * solution) or the below Device Tree should be adjusted. 17*f126890aSEmmanuel Vadot */ 18*f126890aSEmmanuel Vadot 19*f126890aSEmmanuel Vadot/dts-v1/; 20*f126890aSEmmanuel Vadot#include "armada-xp-98dx4251.dtsi" 21*f126890aSEmmanuel Vadot 22*f126890aSEmmanuel Vadot/ { 23*f126890aSEmmanuel Vadot model = "Marvell Bobcat2 Evaluation Board"; 24*f126890aSEmmanuel Vadot compatible = "marvell,db-dxbc2", "marvell,armadaxp-98dx4251", "marvell,armada-370-xp"; 25*f126890aSEmmanuel Vadot 26*f126890aSEmmanuel Vadot chosen { 27*f126890aSEmmanuel Vadot bootargs = "console=ttyS0,115200 earlyprintk"; 28*f126890aSEmmanuel Vadot }; 29*f126890aSEmmanuel Vadot 30*f126890aSEmmanuel Vadot memory { 31*f126890aSEmmanuel Vadot device_type = "memory"; 32*f126890aSEmmanuel Vadot reg = <0 0x00000000 0 0x20000000>; /* 512 MB */ 33*f126890aSEmmanuel Vadot }; 34*f126890aSEmmanuel Vadot 35*f126890aSEmmanuel Vadot}; 36*f126890aSEmmanuel Vadot 37*f126890aSEmmanuel Vadot&devbus_bootcs { 38*f126890aSEmmanuel Vadot status = "okay"; 39*f126890aSEmmanuel Vadot 40*f126890aSEmmanuel Vadot /* Device Bus parameters are required */ 41*f126890aSEmmanuel Vadot 42*f126890aSEmmanuel Vadot /* Read parameters */ 43*f126890aSEmmanuel Vadot devbus,bus-width = <16>; 44*f126890aSEmmanuel Vadot devbus,turn-off-ps = <60000>; 45*f126890aSEmmanuel Vadot devbus,badr-skew-ps = <0>; 46*f126890aSEmmanuel Vadot devbus,acc-first-ps = <124000>; 47*f126890aSEmmanuel Vadot devbus,acc-next-ps = <248000>; 48*f126890aSEmmanuel Vadot devbus,rd-setup-ps = <0>; 49*f126890aSEmmanuel Vadot devbus,rd-hold-ps = <0>; 50*f126890aSEmmanuel Vadot 51*f126890aSEmmanuel Vadot /* Write parameters */ 52*f126890aSEmmanuel Vadot devbus,sync-enable = <0>; 53*f126890aSEmmanuel Vadot devbus,wr-high-ps = <60000>; 54*f126890aSEmmanuel Vadot devbus,wr-low-ps = <60000>; 55*f126890aSEmmanuel Vadot devbus,ale-wr-ps = <60000>; 56*f126890aSEmmanuel Vadot}; 57*f126890aSEmmanuel Vadot 58*f126890aSEmmanuel Vadot&i2c0 { 59*f126890aSEmmanuel Vadot clock-frequency = <100000>; 60*f126890aSEmmanuel Vadot status = "okay"; 61*f126890aSEmmanuel Vadot}; 62*f126890aSEmmanuel Vadot 63*f126890aSEmmanuel Vadot&uart0 { 64*f126890aSEmmanuel Vadot status = "okay"; 65*f126890aSEmmanuel Vadot}; 66*f126890aSEmmanuel Vadot 67*f126890aSEmmanuel Vadot&uart1 { 68*f126890aSEmmanuel Vadot status = "okay"; 69*f126890aSEmmanuel Vadot}; 70*f126890aSEmmanuel Vadot 71*f126890aSEmmanuel Vadot&nand_controller { 72*f126890aSEmmanuel Vadot status = "okay"; 73*f126890aSEmmanuel Vadot 74*f126890aSEmmanuel Vadot nand@0 { 75*f126890aSEmmanuel Vadot reg = <0>; 76*f126890aSEmmanuel Vadot label = "pxa3xx_nand-0"; 77*f126890aSEmmanuel Vadot nand-rb = <0>; 78*f126890aSEmmanuel Vadot marvell,nand-keep-config; 79*f126890aSEmmanuel Vadot nand-on-flash-bbt; 80*f126890aSEmmanuel Vadot nand-ecc-strength = <4>; 81*f126890aSEmmanuel Vadot nand-ecc-step-size = <512>; 82*f126890aSEmmanuel Vadot }; 83*f126890aSEmmanuel Vadot}; 84*f126890aSEmmanuel Vadot 85*f126890aSEmmanuel Vadot&sdio { 86*f126890aSEmmanuel Vadot pinctrl-0 = <&sdio_pins>; 87*f126890aSEmmanuel Vadot pinctrl-names = "default"; 88*f126890aSEmmanuel Vadot status = "okay"; 89*f126890aSEmmanuel Vadot /* No CD or WP GPIOs */ 90*f126890aSEmmanuel Vadot broken-cd; 91*f126890aSEmmanuel Vadot}; 92*f126890aSEmmanuel Vadot 93*f126890aSEmmanuel Vadot&spi0 { 94*f126890aSEmmanuel Vadot status = "okay"; 95*f126890aSEmmanuel Vadot 96*f126890aSEmmanuel Vadot flash@0 { 97*f126890aSEmmanuel Vadot #address-cells = <1>; 98*f126890aSEmmanuel Vadot #size-cells = <1>; 99*f126890aSEmmanuel Vadot compatible = "m25p64"; 100*f126890aSEmmanuel Vadot reg = <0>; /* Chip select 0 */ 101*f126890aSEmmanuel Vadot spi-max-frequency = <20000000>; 102*f126890aSEmmanuel Vadot m25p,fast-read; 103*f126890aSEmmanuel Vadot 104*f126890aSEmmanuel Vadot partition@u-boot { 105*f126890aSEmmanuel Vadot reg = <0x00000000 0x00100000>; 106*f126890aSEmmanuel Vadot label = "u-boot"; 107*f126890aSEmmanuel Vadot }; 108*f126890aSEmmanuel Vadot partition@u-boot-env { 109*f126890aSEmmanuel Vadot reg = <0x00100000 0x00040000>; 110*f126890aSEmmanuel Vadot label = "u-boot-env"; 111*f126890aSEmmanuel Vadot }; 112*f126890aSEmmanuel Vadot partition@unused { 113*f126890aSEmmanuel Vadot reg = <0x00140000 0x00ec0000>; 114*f126890aSEmmanuel Vadot label = "unused"; 115*f126890aSEmmanuel Vadot }; 116*f126890aSEmmanuel Vadot 117*f126890aSEmmanuel Vadot }; 118*f126890aSEmmanuel Vadot}; 119