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/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Drealtek,usb2phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Realtek DHC SoCs USB 2.0 PHY
11 - Stanley Chang <stanley_chang@realtek.com>
14 Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs.
15 The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
19 RTD1295/RTD1619 SoCs USB
20 The USB architecture includes three XHCI controllers.
21 Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
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H A Dqcom,usb-hsic-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-hsic-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm USB HSIC PHY Controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Vinod Koul <vkoul@kernel.org>
16 - enum:
17 - qcom,usb-hsic-phy-mdm9615
18 - qcom,usb-hsic-phy-msm8974
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H A Dqcom,usb-hsic-phy.txt1 Qualcomm's USB HSIC PHY
5 - compatible:
8 Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the
11 "qcom,usb-hsic-phy-mdm9615"
12 "qcom,usb-hsic-phy-msm8974"
14 - #phy-cells:
19 - clocks:
21 Value type: <prop-encoded-array>
25 - clock-names:
28 Definition: Should contain "phy, "cal" and "cal_sleep"
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H A Dmxs-usb-phy.txt1 * Freescale MXS USB Phy Device
4 - compatible: should contain:
5 * "fsl,imx23-usbphy" for imx23 and imx28
6 * "fsl,imx6q-usbphy" for imx6dq and imx6dl
7 * "fsl,imx6sl-usbphy" for imx6sl
8 * "fsl,vf610-usbphy" for Vybrid vf610
9 * "fsl,imx6sx-usbphy" for imx6sx
10 * "fsl,imx7ulp-usbphy" for imx7ulp
11 * "fsl,imx8dxl-usbphy" for imx8dxl
12 "fsl,imx23-usbphy" is still a fallback for other strings
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H A Dfsl,mxs-usbphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,mxs-usbph
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/freebsd-src/sys/contrib/device-tree/Bindings/usb/
H A Drealtek,rtd-type-c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/realtek,rtd-type-c.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Realtek DHC RTD SoCs USB Type-C Connector detection
11 - Stanley Chang <stanley_chang@realtek.com>
20 - realtek,rtd1295-type-c
21 - realtek,rtd1312c-type-c
22 - realtek,rtd1315e-type-c
23 - realtek,rtd1319-type-c
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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dmarvell-bt-8xxx.txt1 Marvell 8897/8997 (sd8897/sd8997) bluetooth devices (SDIO or USB based)
2 ------
4 the btmrvl driver is used and when used on USB interface, the btusb driver is
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
12 * "usb1286,204e" (for USB)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
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/freebsd-src/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-asus-tf201.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-asus-transformer-common.dtsi"
5 #include "tegra30-asus-lvds-display.dtsi"
19 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
27 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
35 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
43 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
51 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
57 /* Azurewave AW-NH615 BCM4329B1 */
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H A Dtegra30-pegatron-chagall.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
11 #include "tegra30-asus-lvds-display.dtsi"
16 chassis-type = "tablet";
35 * pre-existing /chosen node to be available to insert the
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H A Dtegra30-ouya.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/thermal/thermal.h>
9 #include "tegra30-cpu-opp.dtsi"
10 #include "tegra30-cpu-opp-microvolt.dtsi"
26 stdout-path = "serial0:115200n8";
30 trusted-foundations {
31 compatible = "tlm,trusted-foundations";
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull-dhcor-maveo-box.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 * DHCR-iMX6ULL-C080-R051-SPI-WBT-I-01LG
8 * DHCOR PCB number: 578-200 or newer
9 * maveo box PCB number: 525-200 or newer
12 /dts-v1/;
14 #include "imx6ull-dhcor-som.dtsi"
18 compatible = "marantec,imx6ull-dhcor-maveo-box", "dh,imx6ull-dhcor-som",
28 stdout-path = "serial0:115200n8";
31 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
32 compatible = "regulator-fixed";
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H A Dimx6ull-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include "imx6ull-dhcor-som.dtsi"
10 /delete-property/ spi2;
11 /delete-property/ spi3;
28 stdout-pat
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H A Dimx6qdl-var-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Support for Variscite VAR-SOM-MX6 Module
7 * Copyright (C) 2014-2016 Variscite, Ltd.
12 /dts-v1/;
15 #include <dt-bindings/clock/imx6qdl-clock.h>
16 #include <dt-binding
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H A Dimx6ull-tarragon-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
5 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
18 stdout-path = &uart4;
26 emmc_pwrseq: emmc-pwrseq {
27 compatible = "mmc-pwrse
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H A Dimx6dl-yapp4-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-binding
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H A Dimx6sx-sdb.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
16 stdout-path = &uart1;
24 backlight_display: backlight-display {
25 compatible = "pwm-backligh
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H A Dimx6dl-yapp43-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
20 compatible = "pwm-backligh
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8dxl-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx8dxl-evk", "fsl,imx8dxl";
24 stdout-path = &lpuart0;
27 imx8dxl-cm4 {
28 compatible = "fsl,imx8qxp-cm4";
30 mbox-names = "tx", "rx", "rxdb";
32 memory-regio
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/freebsd-src/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c76 * For usb offload solution, some USB registers must be tuned
121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
[all …]
/freebsd-src/sys/contrib/dev/athk/ath10k/
H A Dcore.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
49 #define ATH10K_DEFAULT_NOISE_FLOOR -95
70 /* SMBIOS type structure length (excluding strings-set) */
106 return "usb"; in ath10k_bus_str()
145 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; in ATH10K_SKB_CB()
150 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); in ATH10K_SKB_RXCB()
151 return (struct ath10k_skb_rxcb *)skb->cb; in ATH10K_SKB_RXCB()
[all …]
/freebsd-src/sys/contrib/dev/mediatek/mt76/
H A Dmt76x02_util.c1 // SPDX-License-Identifier: ISC
92 struct mt76x02_dev *dev = container_of(mphy->dev, struct mt76x02_dev, in mt76x02_led_set_config()
100 mt76_wr(dev, MT_LED_S0(mphy->leds.pin), val); in mt76x02_led_set_config()
101 mt76_wr(dev, MT_LED_S1(mphy->leds.pin), val); in mt76x02_led_set_config()
103 val = MT_LED_CTRL_REPLAY(mphy->leds.pin) | in mt76x02_led_set_config()
104 MT_LED_CTRL_KICK(mphy->leds.pin); in mt76x02_led_set_config()
105 if (mphy->leds.al) in mt76x02_led_set_config()
106 val |= MT_LED_CTRL_POLARITY(mphy->leds.pin); in mt76x02_led_set_config()
143 struct wiphy *wiphy = hw->wiphy; in mt76x02_init_device()
145 INIT_DELAYED_WORK(&dev->mphy.mac_work, mt76x02_mac_work); in mt76x02_init_device()
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/freebsd-src/sys/dev/bhnd/
H A Dbhnd_ids.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
[all …]
/freebsd-src/usr.bin/fortune/datfiles/
H A Dfreebsd-tips1 Any user that is a member of the wheel group can use "su -" to simulate
3 pw groupmod -n wheel -m user_name
4 -- Konstantinos Konstantinidis <kkonstan@duth.gr>
11 -x port_name".
15 -- David Scheidt <dscheidt@tumbolia.com>
20 -- Dr
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/freebsd-src/sys/dev/otus/
H A Dif_otusreg.h3 /*-
5 * Copyright (c) 2007-2008 Atheros Communications, Inc.
23 /* USB Endpoints addresses. */
29 /* USB Requests. */
176 /* WPS Button GPIO for TP-Link TL-WN821N */
202 #define AR_TX_PHY_MT_SHIFT 0 /* 0:1 - PHY mode */
206 #define AR_TX_PHY_GF (1 << 2) /* 2 - greenfield */
207 #define AR_TX_PHY_BW_SHIFT 3 /* 4:3 - bandwidth */
211 #define AR_TX_PHY_TX_HEAVY_CLIP_SHIFT 6 /* 9:6 - heavy clip */
212 #define AR_TX_PHY_TPC_SHIFT 9 /* 14:9 - TX power */
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/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sra
992 cal: cal@6f03000 { global() label
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