xref: /freebsd-src/sys/contrib/device-tree/src/arm/nvidia/tegra30-pegatron-chagall.dts (revision aa1a8ff2d6dbc51ef058f46f3db5a8bb77967145)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot/dts-v1/;
3f126890aSEmmanuel Vadot
4f126890aSEmmanuel Vadot#include <dt-bindings/input/gpio-keys.h>
5f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h>
6f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h>
7f126890aSEmmanuel Vadot
8f126890aSEmmanuel Vadot#include "tegra30.dtsi"
9f126890aSEmmanuel Vadot#include "tegra30-cpu-opp.dtsi"
10f126890aSEmmanuel Vadot#include "tegra30-cpu-opp-microvolt.dtsi"
11f126890aSEmmanuel Vadot#include "tegra30-asus-lvds-display.dtsi"
12f126890aSEmmanuel Vadot
13f126890aSEmmanuel Vadot/ {
14f126890aSEmmanuel Vadot	model = "Pegatron Chagall";
15f126890aSEmmanuel Vadot	compatible = "pegatron,chagall", "nvidia,tegra30";
16f126890aSEmmanuel Vadot	chassis-type = "tablet";
17f126890aSEmmanuel Vadot
18f126890aSEmmanuel Vadot	aliases {
19f126890aSEmmanuel Vadot		mmc0 = &sdmmc4; /* eMMC */
20f126890aSEmmanuel Vadot		mmc1 = &sdmmc1; /* uSD slot */
21f126890aSEmmanuel Vadot		mmc2 = &sdmmc3; /* WiFi */
22f126890aSEmmanuel Vadot
23f126890aSEmmanuel Vadot		rtc0 = &pmic;
24f126890aSEmmanuel Vadot		rtc1 = "/rtc@7000e000";
25f126890aSEmmanuel Vadot
26f126890aSEmmanuel Vadot		display0 = &lcd;
27f126890aSEmmanuel Vadot		display1 = &hdmi;
28f126890aSEmmanuel Vadot
29f126890aSEmmanuel Vadot		serial1 = &uartc; /* Bluetooth */
30f126890aSEmmanuel Vadot		serial2 = &uartb; /* GPS */
31f126890aSEmmanuel Vadot	};
32f126890aSEmmanuel Vadot
33f126890aSEmmanuel Vadot	/*
34f126890aSEmmanuel Vadot	 * The decompressor and also some bootloaders rely on a
35f126890aSEmmanuel Vadot	 * pre-existing /chosen node to be available to insert the
36f126890aSEmmanuel Vadot	 * command line and merge other ATAGS info.
37f126890aSEmmanuel Vadot	 */
38f126890aSEmmanuel Vadot	chosen {};
39f126890aSEmmanuel Vadot
40f126890aSEmmanuel Vadot	firmware {
41f126890aSEmmanuel Vadot		trusted-foundations {
42f126890aSEmmanuel Vadot			compatible = "tlm,trusted-foundations";
43f126890aSEmmanuel Vadot			tlm,version-major = <2>;
44f126890aSEmmanuel Vadot			tlm,version-minor = <8>;
45f126890aSEmmanuel Vadot		};
46f126890aSEmmanuel Vadot	};
47f126890aSEmmanuel Vadot
48f126890aSEmmanuel Vadot	memory@80000000 {
49f126890aSEmmanuel Vadot		reg = <0x80000000 0x40000000>;
50f126890aSEmmanuel Vadot	};
51f126890aSEmmanuel Vadot
52f126890aSEmmanuel Vadot	reserved-memory {
53f126890aSEmmanuel Vadot		#address-cells = <1>;
54f126890aSEmmanuel Vadot		#size-cells = <1>;
55f126890aSEmmanuel Vadot		ranges;
56f126890aSEmmanuel Vadot
57f126890aSEmmanuel Vadot		linux,cma@80000000 {
58f126890aSEmmanuel Vadot			compatible = "shared-dma-pool";
59f126890aSEmmanuel Vadot			alloc-ranges = <0x80000000 0x30000000>;
60f126890aSEmmanuel Vadot			size = <0x10000000>; /* 256MiB */
61f126890aSEmmanuel Vadot			linux,cma-default;
62f126890aSEmmanuel Vadot			reusable;
63f126890aSEmmanuel Vadot		};
64f126890aSEmmanuel Vadot
65f126890aSEmmanuel Vadot		ramoops@beb00000 {
66f126890aSEmmanuel Vadot			compatible = "ramoops";
67f126890aSEmmanuel Vadot			reg = <0xbeb00000 0x10000>; /* 64kB */
68f126890aSEmmanuel Vadot			console-size = <0x8000>; /* 32kB */
69f126890aSEmmanuel Vadot			record-size = <0x400>; /* 1kB */
70f126890aSEmmanuel Vadot			ecc-size = <16>;
71f126890aSEmmanuel Vadot		};
72f126890aSEmmanuel Vadot
73f126890aSEmmanuel Vadot		trustzone@bfe00000 {
74f126890aSEmmanuel Vadot			reg = <0xbfe00000 0x200000>; /* 2MB */
75f126890aSEmmanuel Vadot			no-map;
76f126890aSEmmanuel Vadot		};
77f126890aSEmmanuel Vadot	};
78f126890aSEmmanuel Vadot
79f126890aSEmmanuel Vadot	host1x@50000000 {
80f126890aSEmmanuel Vadot		hdmi: hdmi@54280000 {
81f126890aSEmmanuel Vadot			status = "okay";
82f126890aSEmmanuel Vadot
83f126890aSEmmanuel Vadot			hdmi-supply = <&hdmi_5v0_sys>;
84f126890aSEmmanuel Vadot			pll-supply = <&vdd_1v8_vio>;
85f126890aSEmmanuel Vadot			vdd-supply = <&vdd_3v3_sys>;
86f126890aSEmmanuel Vadot
87f126890aSEmmanuel Vadot			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
88f126890aSEmmanuel Vadot			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
89f126890aSEmmanuel Vadot		};
90f126890aSEmmanuel Vadot	};
91f126890aSEmmanuel Vadot
92f126890aSEmmanuel Vadot	vde@6001a000 {
93f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA30_CLK_VDE>;
94f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_P>;
95f126890aSEmmanuel Vadot		assigned-clock-rates = <408000000>;
96f126890aSEmmanuel Vadot	};
97f126890aSEmmanuel Vadot
98f126890aSEmmanuel Vadot	pinmux@70000868 {
99f126890aSEmmanuel Vadot		pinctrl-names = "default";
100f126890aSEmmanuel Vadot		pinctrl-0 = <&state_default>;
101f126890aSEmmanuel Vadot
102f126890aSEmmanuel Vadot		state_default: pinmux {
103f126890aSEmmanuel Vadot			/* SDMMC1 pinmux */
104f126890aSEmmanuel Vadot			sdmmc1_clk_pz0 {
105f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_clk_pz0";
106f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
107f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
108f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
109f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
110f126890aSEmmanuel Vadot			};
111f126890aSEmmanuel Vadot
112f126890aSEmmanuel Vadot			sdmmc1_dat3_py4 {
113f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat3_py4",
114f126890aSEmmanuel Vadot						"sdmmc1_dat2_py5",
115f126890aSEmmanuel Vadot						"sdmmc1_dat1_py6",
116f126890aSEmmanuel Vadot						"sdmmc1_dat0_py7",
117f126890aSEmmanuel Vadot						"sdmmc1_cmd_pz1";
118f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
119f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
120f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
121f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
122f126890aSEmmanuel Vadot			};
123f126890aSEmmanuel Vadot
124f126890aSEmmanuel Vadot			/* SDMMC2 pinmux */
125f126890aSEmmanuel Vadot			vi_d1_pd5 {
126f126890aSEmmanuel Vadot				nvidia,pins = "vi_d1_pd5",
127f126890aSEmmanuel Vadot						"vi_d2_pl0",
128f126890aSEmmanuel Vadot						"vi_d3_pl1",
129f126890aSEmmanuel Vadot						"vi_d5_pl3",
130f126890aSEmmanuel Vadot						"vi_d7_pl5";
131f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
132f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
133f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
134f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
135f126890aSEmmanuel Vadot			};
136f126890aSEmmanuel Vadot
137f126890aSEmmanuel Vadot			vi_d8_pl6 {
138f126890aSEmmanuel Vadot				nvidia,pins = "vi_d8_pl6",
139f126890aSEmmanuel Vadot						"vi_d9_pl7";
140f126890aSEmmanuel Vadot				nvidia,function = "sdmmc2";
141f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
142f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
143f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
144f126890aSEmmanuel Vadot				nvidia,lock = <0>;
145f126890aSEmmanuel Vadot				nvidia,io-reset = <0>;
146f126890aSEmmanuel Vadot			};
147f126890aSEmmanuel Vadot
148f126890aSEmmanuel Vadot			/* SDMMC3 pinmux */
149f126890aSEmmanuel Vadot			sdmmc3_clk_pa6 {
150f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_clk_pa6";
151f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
152f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
153f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
154f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
155f126890aSEmmanuel Vadot			};
156f126890aSEmmanuel Vadot
157f126890aSEmmanuel Vadot			sdmmc3_cmd_pa7 {
158f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_cmd_pa7",
159f126890aSEmmanuel Vadot						"sdmmc3_dat3_pb4",
160f126890aSEmmanuel Vadot						"sdmmc3_dat2_pb5",
161f126890aSEmmanuel Vadot						"sdmmc3_dat1_pb6",
162f126890aSEmmanuel Vadot						"sdmmc3_dat0_pb7",
163f126890aSEmmanuel Vadot						"sdmmc3_dat5_pd0",
164f126890aSEmmanuel Vadot						"sdmmc3_dat4_pd1",
165f126890aSEmmanuel Vadot						"sdmmc3_dat6_pd3",
166f126890aSEmmanuel Vadot						"sdmmc3_dat7_pd4";
167f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
168f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
169f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
170f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
171f126890aSEmmanuel Vadot			};
172f126890aSEmmanuel Vadot
173f126890aSEmmanuel Vadot			/* SDMMC4 pinmux */
174f126890aSEmmanuel Vadot			sdmmc4_clk_pcc4 {
175f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_clk_pcc4";
176f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
177f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
178f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
179f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
180f126890aSEmmanuel Vadot			};
181f126890aSEmmanuel Vadot
182f126890aSEmmanuel Vadot			sdmmc4_cmd_pt7 {
183f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_cmd_pt7",
184f126890aSEmmanuel Vadot						"sdmmc4_dat0_paa0",
185f126890aSEmmanuel Vadot						"sdmmc4_dat1_paa1",
186f126890aSEmmanuel Vadot						"sdmmc4_dat2_paa2",
187f126890aSEmmanuel Vadot						"sdmmc4_dat3_paa3",
188f126890aSEmmanuel Vadot						"sdmmc4_dat4_paa4",
189f126890aSEmmanuel Vadot						"sdmmc4_dat5_paa5",
190f126890aSEmmanuel Vadot						"sdmmc4_dat6_paa6",
191f126890aSEmmanuel Vadot						"sdmmc4_dat7_paa7";
192f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
193f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
194f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
195f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
196f126890aSEmmanuel Vadot			};
197f126890aSEmmanuel Vadot
198f126890aSEmmanuel Vadot			/* I2C pinmux */
199f126890aSEmmanuel Vadot			gen1_i2c_scl_pc4 {
200f126890aSEmmanuel Vadot				nvidia,pins = "gen1_i2c_scl_pc4",
201f126890aSEmmanuel Vadot						"gen1_i2c_sda_pc5";
202f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
203f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
204f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
205f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
206f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
207f126890aSEmmanuel Vadot				nvidia,lock = <0>;
208f126890aSEmmanuel Vadot			};
209f126890aSEmmanuel Vadot
210f126890aSEmmanuel Vadot			gen2_i2c_scl_pt5 {
211f126890aSEmmanuel Vadot				nvidia,pins = "gen2_i2c_scl_pt5",
212f126890aSEmmanuel Vadot						"gen2_i2c_sda_pt6";
213f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
214f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
215f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
216f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
217f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
218f126890aSEmmanuel Vadot				nvidia,lock = <0>;
219f126890aSEmmanuel Vadot			};
220f126890aSEmmanuel Vadot
221f126890aSEmmanuel Vadot			cam_i2c_scl_pbb1 {
222f126890aSEmmanuel Vadot				nvidia,pins = "cam_i2c_scl_pbb1",
223f126890aSEmmanuel Vadot						"cam_i2c_sda_pbb2";
224f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
225f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
226f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
227f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
228f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
229f126890aSEmmanuel Vadot				nvidia,lock = <0>;
230f126890aSEmmanuel Vadot			};
231f126890aSEmmanuel Vadot
232f126890aSEmmanuel Vadot			ddc_scl_pv4 {
233f126890aSEmmanuel Vadot				nvidia,pins = "ddc_scl_pv4",
234f126890aSEmmanuel Vadot						"ddc_sda_pv5";
235f126890aSEmmanuel Vadot				nvidia,function = "i2c4";
236f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
237f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
238f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
239f126890aSEmmanuel Vadot				nvidia,lock = <0>;
240f126890aSEmmanuel Vadot			};
241f126890aSEmmanuel Vadot
242f126890aSEmmanuel Vadot			pwr_i2c_scl_pz6 {
243f126890aSEmmanuel Vadot				nvidia,pins = "pwr_i2c_scl_pz6",
244f126890aSEmmanuel Vadot						"pwr_i2c_sda_pz7";
245f126890aSEmmanuel Vadot				nvidia,function = "i2cpwr";
246f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
247f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
248f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
249f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
250f126890aSEmmanuel Vadot				nvidia,lock = <0>;
251f126890aSEmmanuel Vadot			};
252f126890aSEmmanuel Vadot
253f126890aSEmmanuel Vadot			/* HDMI-CEC pinmux */
254f126890aSEmmanuel Vadot			hdmi_cec_pee3 {
255f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_cec_pee3";
256f126890aSEmmanuel Vadot				nvidia,function = "cec";
257f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
259f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
261f126890aSEmmanuel Vadot				nvidia,lock = <0>;
262f126890aSEmmanuel Vadot			};
263f126890aSEmmanuel Vadot
264f126890aSEmmanuel Vadot			/* UART-A */
265f126890aSEmmanuel Vadot			ulpi_data0_po1 {
266f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data0_po1";
267f126890aSEmmanuel Vadot				nvidia,function = "uarta";
268f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
269f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
270f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
271f126890aSEmmanuel Vadot			};
272f126890aSEmmanuel Vadot
273f126890aSEmmanuel Vadot			ulpi_data1_po2 {
274f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data1_po2",
275f126890aSEmmanuel Vadot						"ulpi_data2_po3",
276f126890aSEmmanuel Vadot						"ulpi_data3_po4",
277f126890aSEmmanuel Vadot						"ulpi_data4_po5",
278f126890aSEmmanuel Vadot						"ulpi_data5_po6",
279f126890aSEmmanuel Vadot						"ulpi_data6_po7";
280f126890aSEmmanuel Vadot				nvidia,function = "uarta";
281f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
282f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
283f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
284f126890aSEmmanuel Vadot			};
285f126890aSEmmanuel Vadot
286f126890aSEmmanuel Vadot			ulpi_data7_po0 {
287f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data7_po0";
288f126890aSEmmanuel Vadot				nvidia,function = "uarta";
289f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
290f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
291f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
292f126890aSEmmanuel Vadot			};
293f126890aSEmmanuel Vadot
294f126890aSEmmanuel Vadot			/* UART-B */
295f126890aSEmmanuel Vadot			uart2_txd_pc2 {
296f126890aSEmmanuel Vadot				nvidia,pins = "uart2_txd_pc2",
297f126890aSEmmanuel Vadot						"uart2_rts_n_pj6";
298f126890aSEmmanuel Vadot				nvidia,function = "uartb";
299f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
300f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
301f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
302f126890aSEmmanuel Vadot			};
303f126890aSEmmanuel Vadot
304f126890aSEmmanuel Vadot			uart2_rxd_pc3 {
305f126890aSEmmanuel Vadot				nvidia,pins = "uart2_rxd_pc3",
306f126890aSEmmanuel Vadot						"uart2_cts_n_pj5";
307f126890aSEmmanuel Vadot				nvidia,function = "uartb";
308f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
309f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
310f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
311f126890aSEmmanuel Vadot			};
312f126890aSEmmanuel Vadot
313f126890aSEmmanuel Vadot			/* UART-C */
314f126890aSEmmanuel Vadot			uart3_cts_n_pa1 {
315f126890aSEmmanuel Vadot				nvidia,pins = "uart3_cts_n_pa1",
316f126890aSEmmanuel Vadot						"uart3_rxd_pw7";
317f126890aSEmmanuel Vadot				nvidia,function = "uartc";
318f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
319f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
320f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
321f126890aSEmmanuel Vadot			};
322f126890aSEmmanuel Vadot
323f126890aSEmmanuel Vadot			uart3_rts_n_pc0 {
324f126890aSEmmanuel Vadot				nvidia,pins = "uart3_rts_n_pc0",
325f126890aSEmmanuel Vadot						"uart3_txd_pw6";
326f126890aSEmmanuel Vadot				nvidia,function = "uartc";
327f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
328f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
329f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
330f126890aSEmmanuel Vadot			};
331f126890aSEmmanuel Vadot
332f126890aSEmmanuel Vadot			/* UART-D */
333f126890aSEmmanuel Vadot			ulpi_clk_py0 {
334f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_clk_py0",
335f126890aSEmmanuel Vadot						"ulpi_stp_py3";
336f126890aSEmmanuel Vadot				nvidia,function = "uartd";
337f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
338f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
339f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
340f126890aSEmmanuel Vadot			};
341f126890aSEmmanuel Vadot
342f126890aSEmmanuel Vadot			ulpi_dir_py1 {
343f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_dir_py1",
344f126890aSEmmanuel Vadot						"ulpi_nxt_py2";
345f126890aSEmmanuel Vadot				nvidia,function = "uartd";
346f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
347f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
348f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
349f126890aSEmmanuel Vadot			};
350f126890aSEmmanuel Vadot
351f126890aSEmmanuel Vadot			/* I2S pinmux */
352f126890aSEmmanuel Vadot			dap1_fs_pn0 {
353f126890aSEmmanuel Vadot				nvidia,pins = "dap1_fs_pn0",
354f126890aSEmmanuel Vadot						"dap1_din_pn1",
355f126890aSEmmanuel Vadot						"dap1_dout_pn2",
356f126890aSEmmanuel Vadot						"dap1_sclk_pn3";
357f126890aSEmmanuel Vadot				nvidia,function = "i2s0";
358f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
359f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
360f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
361f126890aSEmmanuel Vadot			};
362f126890aSEmmanuel Vadot
363f126890aSEmmanuel Vadot			dap2_fs_pa2 {
364f126890aSEmmanuel Vadot				nvidia,pins = "dap2_fs_pa2",
365f126890aSEmmanuel Vadot						"dap2_sclk_pa3",
366f126890aSEmmanuel Vadot						"dap2_din_pa4",
367f126890aSEmmanuel Vadot						"dap2_dout_pa5";
368f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
369f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
370f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
371f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
372f126890aSEmmanuel Vadot			};
373f126890aSEmmanuel Vadot
374f126890aSEmmanuel Vadot			dap3_fs_pp0 {
375f126890aSEmmanuel Vadot				nvidia,pins = "dap3_fs_pp0",
376f126890aSEmmanuel Vadot						"dap3_din_pp1",
377f126890aSEmmanuel Vadot						"dap3_dout_pp2",
378f126890aSEmmanuel Vadot						"dap3_sclk_pp3";
379f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
380f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
381f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
382f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
383f126890aSEmmanuel Vadot			};
384f126890aSEmmanuel Vadot
385f126890aSEmmanuel Vadot			dap4_fs_pp4 {
386f126890aSEmmanuel Vadot				nvidia,pins = "dap4_fs_pp4",
387f126890aSEmmanuel Vadot						"dap4_din_pp5",
388f126890aSEmmanuel Vadot						"dap4_dout_pp6",
389f126890aSEmmanuel Vadot						"dap4_sclk_pp7";
390f126890aSEmmanuel Vadot				nvidia,function = "i2s3";
391f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
392f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
393f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
394f126890aSEmmanuel Vadot			};
395f126890aSEmmanuel Vadot
396f126890aSEmmanuel Vadot			pcc2 {
397f126890aSEmmanuel Vadot				nvidia,pins = "pcc2";
398f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
399f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
401f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402f126890aSEmmanuel Vadot			};
403f126890aSEmmanuel Vadot
404f126890aSEmmanuel Vadot			/* PCI-e pinmux */
405f126890aSEmmanuel Vadot			pex_l2_rst_n_pcc6 {
406f126890aSEmmanuel Vadot				nvidia,pins = "pex_l2_rst_n_pcc6",
407f126890aSEmmanuel Vadot						"pex_l0_rst_n_pdd1",
408f126890aSEmmanuel Vadot						"pex_l1_rst_n_pdd5";
409f126890aSEmmanuel Vadot				nvidia,function = "pcie";
410f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
411f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
412f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
413f126890aSEmmanuel Vadot			};
414f126890aSEmmanuel Vadot
415f126890aSEmmanuel Vadot			pex_l2_clkreq_n_pcc7 {
416f126890aSEmmanuel Vadot				nvidia,pins = "pex_l2_clkreq_n_pcc7",
417f126890aSEmmanuel Vadot						"pex_l0_prsnt_n_pdd0",
418f126890aSEmmanuel Vadot						"pex_l0_clkreq_n_pdd2",
419f126890aSEmmanuel Vadot						"pex_l2_prsnt_n_pdd7";
420f126890aSEmmanuel Vadot				nvidia,function = "pcie";
421f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
422f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
423f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
424f126890aSEmmanuel Vadot			};
425f126890aSEmmanuel Vadot
426f126890aSEmmanuel Vadot			pex_wake_n_pdd3 {
427f126890aSEmmanuel Vadot				nvidia,pins = "pex_wake_n_pdd3";
428f126890aSEmmanuel Vadot				nvidia,function = "pcie";
429f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
430f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
431f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
432f126890aSEmmanuel Vadot			};
433f126890aSEmmanuel Vadot
434f126890aSEmmanuel Vadot			/* SPI pinmux */
435f126890aSEmmanuel Vadot			spi1_mosi_px4 {
436f126890aSEmmanuel Vadot				nvidia,pins = "spi1_mosi_px4",
437f126890aSEmmanuel Vadot						"spi1_sck_px5",
438f126890aSEmmanuel Vadot						"spi1_cs0_n_px6",
439f126890aSEmmanuel Vadot						"spi1_miso_px7";
440f126890aSEmmanuel Vadot				nvidia,function = "spi1";
441f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
442f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
443f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
444f126890aSEmmanuel Vadot			};
445f126890aSEmmanuel Vadot
446f126890aSEmmanuel Vadot			spi2_cs1_n_pw2 {
447f126890aSEmmanuel Vadot				nvidia,pins = "spi2_cs1_n_pw2",
448f126890aSEmmanuel Vadot						"spi2_cs2_n_pw3";
449f126890aSEmmanuel Vadot				nvidia,function = "spi2";
450f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
451f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
452f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
453f126890aSEmmanuel Vadot			};
454f126890aSEmmanuel Vadot
455f126890aSEmmanuel Vadot			spi2_sck_px2 {
456f126890aSEmmanuel Vadot				nvidia,pins = "spi2_sck_px2";
457f126890aSEmmanuel Vadot				nvidia,function = "gmi";
458f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
459f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
460f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
461f126890aSEmmanuel Vadot			};
462f126890aSEmmanuel Vadot
463f126890aSEmmanuel Vadot			gmi_a16_pj7 {
464f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a16_pj7",
465f126890aSEmmanuel Vadot						"gmi_a19_pk7";
466f126890aSEmmanuel Vadot				nvidia,function = "spi4";
467f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
468f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
469f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
470f126890aSEmmanuel Vadot			};
471f126890aSEmmanuel Vadot
472f126890aSEmmanuel Vadot			gmi_a17_pb0 {
473f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a17_pb0",
474f126890aSEmmanuel Vadot						"gmi_a18_pb1";
475f126890aSEmmanuel Vadot				nvidia,function = "spi4";
476f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
477f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
478f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
479f126890aSEmmanuel Vadot			};
480f126890aSEmmanuel Vadot
481f126890aSEmmanuel Vadot			spi2_mosi_px0 {
482f126890aSEmmanuel Vadot				nvidia,pins = "spi2_mosi_px0";
483f126890aSEmmanuel Vadot				nvidia,function = "spi6";
484f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
485f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
486f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
487f126890aSEmmanuel Vadot			};
488f126890aSEmmanuel Vadot
489f126890aSEmmanuel Vadot			spdif_out_pk5 {
490f126890aSEmmanuel Vadot				nvidia,pins = "spdif_out_pk5";
491f126890aSEmmanuel Vadot				nvidia,function = "spdif";
492f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
493f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
494f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
495f126890aSEmmanuel Vadot			};
496f126890aSEmmanuel Vadot
497f126890aSEmmanuel Vadot			spdif_in_pk6 {
498f126890aSEmmanuel Vadot				nvidia,pins = "spdif_in_pk6";
499f126890aSEmmanuel Vadot				nvidia,function = "spdif";
500f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
501f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
502f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
503f126890aSEmmanuel Vadot			};
504f126890aSEmmanuel Vadot
505f126890aSEmmanuel Vadot			/* Display A pinmux */
506f126890aSEmmanuel Vadot			lcd_pwr0_pb2 {
507f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pwr0_pb2",
508f126890aSEmmanuel Vadot						"lcd_pclk_pb3",
509f126890aSEmmanuel Vadot						"lcd_pwr1_pc1",
510f126890aSEmmanuel Vadot						"lcd_pwr2_pc6",
511f126890aSEmmanuel Vadot						"lcd_d0_pe0",
512f126890aSEmmanuel Vadot						"lcd_d1_pe1",
513f126890aSEmmanuel Vadot						"lcd_d2_pe2",
514f126890aSEmmanuel Vadot						"lcd_d3_pe3",
515f126890aSEmmanuel Vadot						"lcd_d4_pe4",
516f126890aSEmmanuel Vadot						"lcd_d5_pe5",
517f126890aSEmmanuel Vadot						"lcd_d6_pe6",
518f126890aSEmmanuel Vadot						"lcd_d7_pe7",
519f126890aSEmmanuel Vadot						"lcd_d8_pf0",
520f126890aSEmmanuel Vadot						"lcd_d9_pf1",
521f126890aSEmmanuel Vadot						"lcd_d10_pf2",
522f126890aSEmmanuel Vadot						"lcd_d11_pf3",
523f126890aSEmmanuel Vadot						"lcd_d12_pf4",
524f126890aSEmmanuel Vadot						"lcd_d13_pf5",
525f126890aSEmmanuel Vadot						"lcd_d14_pf6",
526f126890aSEmmanuel Vadot						"lcd_d15_pf7",
527f126890aSEmmanuel Vadot						"lcd_de_pj1",
528f126890aSEmmanuel Vadot						"lcd_hsync_pj3",
529f126890aSEmmanuel Vadot						"lcd_vsync_pj4",
530f126890aSEmmanuel Vadot						"lcd_d16_pm0",
531f126890aSEmmanuel Vadot						"lcd_d17_pm1",
532f126890aSEmmanuel Vadot						"lcd_d18_pm2",
533f126890aSEmmanuel Vadot						"lcd_d19_pm3",
534f126890aSEmmanuel Vadot						"lcd_d20_pm4",
535f126890aSEmmanuel Vadot						"lcd_d21_pm5",
536f126890aSEmmanuel Vadot						"lcd_d22_pm6",
537f126890aSEmmanuel Vadot						"lcd_d23_pm7",
538f126890aSEmmanuel Vadot						"lcd_cs0_n_pn4",
539f126890aSEmmanuel Vadot						"lcd_sdout_pn5",
540f126890aSEmmanuel Vadot						"lcd_dc0_pn6",
541f126890aSEmmanuel Vadot						"lcd_sdin_pz2",
542f126890aSEmmanuel Vadot						"lcd_wr_n_pz3",
543f126890aSEmmanuel Vadot						"lcd_sck_pz4",
544f126890aSEmmanuel Vadot						"lcd_cs1_n_pw0",
545f126890aSEmmanuel Vadot						"lcd_m1_pw1";
546f126890aSEmmanuel Vadot				nvidia,function = "displaya";
547f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
548f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
549f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
550f126890aSEmmanuel Vadot			};
551f126890aSEmmanuel Vadot
552f126890aSEmmanuel Vadot			lcd_dc1_pd2 {
553f126890aSEmmanuel Vadot				nvidia,pins = "lcd_dc1_pd2";
554f126890aSEmmanuel Vadot				nvidia,function = "displaya";
555f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
556f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
557f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
558f126890aSEmmanuel Vadot			};
559f126890aSEmmanuel Vadot
560f126890aSEmmanuel Vadot			clk_32k_out_pa0 {
561f126890aSEmmanuel Vadot				nvidia,pins = "clk_32k_out_pa0";
562f126890aSEmmanuel Vadot				nvidia,function = "blink";
563f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
564f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
565f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
566f126890aSEmmanuel Vadot			};
567f126890aSEmmanuel Vadot
568f126890aSEmmanuel Vadot			/* KBC keys */
569f126890aSEmmanuel Vadot			kb_row0_pr0 {
570f126890aSEmmanuel Vadot				nvidia,pins = "kb_row0_pr0",
571f126890aSEmmanuel Vadot						"kb_row1_pr1",
572f126890aSEmmanuel Vadot						"kb_row2_pr2",
573f126890aSEmmanuel Vadot						"kb_row3_pr3",
574f126890aSEmmanuel Vadot						"kb_row8_ps0",
575f126890aSEmmanuel Vadot						"kb_col0_pq0",
576f126890aSEmmanuel Vadot						"kb_col1_pq1",
577f126890aSEmmanuel Vadot						"kb_col2_pq2",
578f126890aSEmmanuel Vadot						"kb_col3_pq3",
579f126890aSEmmanuel Vadot						"kb_col4_pq4",
580f126890aSEmmanuel Vadot						"kb_col5_pq5",
581f126890aSEmmanuel Vadot						"kb_col7_pq7";
582f126890aSEmmanuel Vadot				nvidia,function = "kbc";
583f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
584f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
585f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
586f126890aSEmmanuel Vadot			};
587f126890aSEmmanuel Vadot
588f126890aSEmmanuel Vadot			kb_row4_pr4 {
589f126890aSEmmanuel Vadot				nvidia,pins = "kb_row4_pr4",
590f126890aSEmmanuel Vadot						"kb_row7_pr7",
591f126890aSEmmanuel Vadot						"kb_row10_ps2",
592f126890aSEmmanuel Vadot						"kb_row13_ps5";
593f126890aSEmmanuel Vadot				nvidia,function = "kbc";
594f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
595f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
596f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
597f126890aSEmmanuel Vadot			};
598f126890aSEmmanuel Vadot
599f126890aSEmmanuel Vadot			kb_row11_ps3 {
600f126890aSEmmanuel Vadot				nvidia,pins = "kb_row11_ps3",
601f126890aSEmmanuel Vadot						"kb_row12_ps4",
602f126890aSEmmanuel Vadot						"kb_row15_ps7";
603f126890aSEmmanuel Vadot				nvidia,function = "kbc";
604f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
605f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
606f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
607f126890aSEmmanuel Vadot			};
608f126890aSEmmanuel Vadot
609f126890aSEmmanuel Vadot			kb_row14_ps6 {
610f126890aSEmmanuel Vadot				nvidia,pins = "kb_row14_ps6";
611f126890aSEmmanuel Vadot				nvidia,function = "kbc";
612f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
614f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
615f126890aSEmmanuel Vadot			};
616f126890aSEmmanuel Vadot
617f126890aSEmmanuel Vadot			gmi_iordy_pi5 {
618f126890aSEmmanuel Vadot				nvidia,pins = "gmi_iordy_pi5";
619f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
620f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
621f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
622f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
623f126890aSEmmanuel Vadot			};
624f126890aSEmmanuel Vadot
625f126890aSEmmanuel Vadot			vi_pclk_pt0 {
626f126890aSEmmanuel Vadot				nvidia,pins = "vi_pclk_pt0";
627f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
628f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
629f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
630f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
631f126890aSEmmanuel Vadot				nvidia,lock = <0>;
632f126890aSEmmanuel Vadot				nvidia,io-reset = <0>;
633f126890aSEmmanuel Vadot			};
634f126890aSEmmanuel Vadot
635f126890aSEmmanuel Vadot			pu1 {
636f126890aSEmmanuel Vadot				nvidia,pins = "pu1";
637f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
638f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
639f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
640f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641f126890aSEmmanuel Vadot			};
642f126890aSEmmanuel Vadot
643f126890aSEmmanuel Vadot			pu2 {
644f126890aSEmmanuel Vadot				nvidia,pins = "pu2";
645f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
646f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
647f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
648f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
649f126890aSEmmanuel Vadot			};
650f126890aSEmmanuel Vadot
651f126890aSEmmanuel Vadot			pv0 {
652f126890aSEmmanuel Vadot				nvidia,pins = "pv0";
653f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
654f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
655f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
656f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
657f126890aSEmmanuel Vadot			};
658f126890aSEmmanuel Vadot
659f126890aSEmmanuel Vadot			pv1 {
660f126890aSEmmanuel Vadot				nvidia,pins = "pv1";
661f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
662f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
663f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
664f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
665f126890aSEmmanuel Vadot			};
666f126890aSEmmanuel Vadot
667f126890aSEmmanuel Vadot			pcc1 {
668f126890aSEmmanuel Vadot				nvidia,pins = "pcc1";
669f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
670f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
671f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
672f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
673f126890aSEmmanuel Vadot			};
674f126890aSEmmanuel Vadot
675f126890aSEmmanuel Vadot			sdmmc4_rst_n_pcc3 {
676f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_rst_n_pcc3";
677f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
678f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
679f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
680f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
681f126890aSEmmanuel Vadot			};
682f126890aSEmmanuel Vadot
683f126890aSEmmanuel Vadot			pv3 {
684f126890aSEmmanuel Vadot				nvidia,pins = "pv3";
685f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
686f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
687f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
688f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
689f126890aSEmmanuel Vadot			};
690f126890aSEmmanuel Vadot
691f126890aSEmmanuel Vadot			vi_vsync_pd6 {
692f126890aSEmmanuel Vadot				nvidia,pins = "vi_vsync_pd6",
693f126890aSEmmanuel Vadot						"vi_hsync_pd7";
694f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
695f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
696f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
697f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
698f126890aSEmmanuel Vadot				nvidia,lock = <0>;
699f126890aSEmmanuel Vadot				nvidia,io-reset = <0>;
700f126890aSEmmanuel Vadot			};
701f126890aSEmmanuel Vadot
702f126890aSEmmanuel Vadot			vi_d10_pt2 {
703f126890aSEmmanuel Vadot				nvidia,pins = "vi_d10_pt2",
704f126890aSEmmanuel Vadot						"vi_d0_pt4", "pbb0";
705f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
706f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
707f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
708f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
709f126890aSEmmanuel Vadot			};
710f126890aSEmmanuel Vadot
711f126890aSEmmanuel Vadot			vi_d11_pt3 {
712f126890aSEmmanuel Vadot				nvidia,pins = "vi_d11_pt3";
713f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
714f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
715f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
716f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717f126890aSEmmanuel Vadot			};
718f126890aSEmmanuel Vadot
719f126890aSEmmanuel Vadot			pu0 {
720f126890aSEmmanuel Vadot				nvidia,pins = "pu0";
721f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
722f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
723f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
724f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
725f126890aSEmmanuel Vadot			};
726f126890aSEmmanuel Vadot
727f126890aSEmmanuel Vadot			pu3 {
728f126890aSEmmanuel Vadot				nvidia,pins = "pu3";
729f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
730f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
731f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
732f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
733f126890aSEmmanuel Vadot			};
734f126890aSEmmanuel Vadot
735f126890aSEmmanuel Vadot			pu6 {
736f126890aSEmmanuel Vadot				nvidia,pins = "pu6";
737f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
738f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
739f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
740f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
741f126890aSEmmanuel Vadot			};
742f126890aSEmmanuel Vadot
743f126890aSEmmanuel Vadot			pex_l1_prsnt_n_pdd4 {
744f126890aSEmmanuel Vadot				nvidia,pins = "pex_l1_prsnt_n_pdd4",
745f126890aSEmmanuel Vadot						"pex_l1_clkreq_n_pdd6";
746f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
747f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
748f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
749f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
750f126890aSEmmanuel Vadot			};
751f126890aSEmmanuel Vadot
752f126890aSEmmanuel Vadot			gmi_wait_pi7 {
753f126890aSEmmanuel Vadot				nvidia,pins = "gmi_wait_pi7",
754f126890aSEmmanuel Vadot						"gmi_cs0_n_pj0",
755f126890aSEmmanuel Vadot						"gmi_cs1_n_pj2",
756f126890aSEmmanuel Vadot						"gmi_cs4_n_pk2";
757f126890aSEmmanuel Vadot				nvidia,function = "nand";
758f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
759f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
760f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
761f126890aSEmmanuel Vadot			};
762f126890aSEmmanuel Vadot
763f126890aSEmmanuel Vadot			gmi_ad0_pg0 {
764f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad0_pg0",
765f126890aSEmmanuel Vadot						"gmi_ad1_pg1",
766f126890aSEmmanuel Vadot						"gmi_ad2_pg2",
767f126890aSEmmanuel Vadot						"gmi_ad3_pg3",
768f126890aSEmmanuel Vadot						"gmi_ad4_pg4",
769f126890aSEmmanuel Vadot						"gmi_ad5_pg5",
770f126890aSEmmanuel Vadot						"gmi_ad6_pg6",
771f126890aSEmmanuel Vadot						"gmi_ad7_pg7",
772f126890aSEmmanuel Vadot						"gmi_wr_n_pi0",
773f126890aSEmmanuel Vadot						"gmi_oe_n_pi1",
774f126890aSEmmanuel Vadot						"gmi_dqs_pi2",
775f126890aSEmmanuel Vadot						"gmi_adv_n_pk0",
776f126890aSEmmanuel Vadot						"gmi_clk_pk1";
777f126890aSEmmanuel Vadot				nvidia,function = "nand";
778f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
779f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
780f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
781f126890aSEmmanuel Vadot			};
782f126890aSEmmanuel Vadot
783f126890aSEmmanuel Vadot			gmi_cs2_n_pk3 {
784f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs2_n_pk3";
785f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
786f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
787f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
788f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
789f126890aSEmmanuel Vadot			};
790f126890aSEmmanuel Vadot
791f126890aSEmmanuel Vadot			gmi_cs3_n_pk4 {
792f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs3_n_pk4";
793f126890aSEmmanuel Vadot				nvidia,function = "nand";
794f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
795f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
796f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
797f126890aSEmmanuel Vadot			};
798f126890aSEmmanuel Vadot
799f126890aSEmmanuel Vadot			gmi_ad10_ph2 {
800f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad10_ph2",
801f126890aSEmmanuel Vadot						"gmi_ad11_ph3",
802f126890aSEmmanuel Vadot						"gmi_ad14_ph6";
803f126890aSEmmanuel Vadot				nvidia,function = "nand";
804f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
805f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
806f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
807f126890aSEmmanuel Vadot			};
808f126890aSEmmanuel Vadot
809f126890aSEmmanuel Vadot			gmi_ad13_ph5 {
810f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad13_ph5",
811f126890aSEmmanuel Vadot						"gmi_ad12_ph4",
812f126890aSEmmanuel Vadot						"gmi_cs7_n_pi6";
813f126890aSEmmanuel Vadot				nvidia,function = "nand";
814f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
815f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
816f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
817f126890aSEmmanuel Vadot			};
818f126890aSEmmanuel Vadot
819f126890aSEmmanuel Vadot			gmi_rst_n_pi4 {
820f126890aSEmmanuel Vadot				nvidia,pins = "gmi_rst_n_pi4";
821f126890aSEmmanuel Vadot				nvidia,function = "gmi";
822f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
823f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
824f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
825f126890aSEmmanuel Vadot			};
826f126890aSEmmanuel Vadot
827f126890aSEmmanuel Vadot			gmi_ad8_ph0 {
828f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad8_ph0";
829f126890aSEmmanuel Vadot				nvidia,function = "pwm0";
830f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
831f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
832f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
833f126890aSEmmanuel Vadot			};
834f126890aSEmmanuel Vadot
835f126890aSEmmanuel Vadot			gmi_ad9_ph1 {
836f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad9_ph1";
837f126890aSEmmanuel Vadot				nvidia,function = "pwm1";
838f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
839f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
840f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
841f126890aSEmmanuel Vadot			};
842f126890aSEmmanuel Vadot
843f126890aSEmmanuel Vadot			gmi_wp_n_pc7 {
844f126890aSEmmanuel Vadot				nvidia,pins = "gmi_wp_n_pc7";
845f126890aSEmmanuel Vadot				nvidia,function = "gmi";
846f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
847f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
848f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
849f126890aSEmmanuel Vadot			};
850f126890aSEmmanuel Vadot
851f126890aSEmmanuel Vadot			gmi_cs6_n_pi3 {
852f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs6_n_pi3";
853f126890aSEmmanuel Vadot				nvidia,function = "sata";
854f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
855f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
856f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
857f126890aSEmmanuel Vadot			};
858f126890aSEmmanuel Vadot
859f126890aSEmmanuel Vadot			vi_d4_pl2 {
860f126890aSEmmanuel Vadot				nvidia,pins = "vi_d4_pl2";
861f126890aSEmmanuel Vadot				nvidia,function = "vi";
862f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
863f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
864f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
865f126890aSEmmanuel Vadot			};
866f126890aSEmmanuel Vadot
867f126890aSEmmanuel Vadot			vi_d6_pl4 {
868f126890aSEmmanuel Vadot				nvidia,pins = "vi_d6_pl4";
869f126890aSEmmanuel Vadot				nvidia,function = "vi";
870f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
871f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
872f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
873f126890aSEmmanuel Vadot				nvidia,lock = <0>;
874f126890aSEmmanuel Vadot				nvidia,io-reset = <0>;
875f126890aSEmmanuel Vadot			};
876f126890aSEmmanuel Vadot
877f126890aSEmmanuel Vadot			vi_mclk_pt1 {
878f126890aSEmmanuel Vadot				nvidia,pins = "vi_mclk_pt1";
879f126890aSEmmanuel Vadot				nvidia,function = "vi";
880f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
881f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
882f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
883f126890aSEmmanuel Vadot			};
884f126890aSEmmanuel Vadot
885f126890aSEmmanuel Vadot			/* HDMI hot-plug-detect */
886f126890aSEmmanuel Vadot			hdmi_int_pn7 {
887f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_int_pn7";
888f126890aSEmmanuel Vadot				nvidia,function = "hdmi";
889f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
890f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
891f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
892f126890aSEmmanuel Vadot			};
893f126890aSEmmanuel Vadot
894f126890aSEmmanuel Vadot			pu4 {
895f126890aSEmmanuel Vadot				nvidia,pins = "pu4";
896f126890aSEmmanuel Vadot				nvidia,function = "pwm1";
897f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
898f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
899f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
900f126890aSEmmanuel Vadot			};
901f126890aSEmmanuel Vadot
902f126890aSEmmanuel Vadot			pu5 {
903f126890aSEmmanuel Vadot				nvidia,pins = "pu5";
904f126890aSEmmanuel Vadot				nvidia,function = "pwm2";
905f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
906f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
907f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
908f126890aSEmmanuel Vadot			};
909f126890aSEmmanuel Vadot
910f126890aSEmmanuel Vadot			jtag_rtck_pu7 {
911f126890aSEmmanuel Vadot				nvidia,pins = "jtag_rtck_pu7";
912f126890aSEmmanuel Vadot				nvidia,function = "rtck";
913f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
914f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
915f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
916f126890aSEmmanuel Vadot			};
917f126890aSEmmanuel Vadot
918f126890aSEmmanuel Vadot			crt_hsync_pv6 {
919f126890aSEmmanuel Vadot				nvidia,pins = "crt_hsync_pv6",
920f126890aSEmmanuel Vadot						"crt_vsync_pv7";
921f126890aSEmmanuel Vadot				nvidia,function = "crt";
922f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
923f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
924f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
925f126890aSEmmanuel Vadot			};
926f126890aSEmmanuel Vadot
927f126890aSEmmanuel Vadot			clk1_out_pw4 {
928f126890aSEmmanuel Vadot				nvidia,pins = "clk1_out_pw4";
929f126890aSEmmanuel Vadot				nvidia,function = "extperiph1";
930f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
931f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
932f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
933f126890aSEmmanuel Vadot			};
934f126890aSEmmanuel Vadot
935f126890aSEmmanuel Vadot			clk2_out_pw5 {
936f126890aSEmmanuel Vadot				nvidia,pins = "clk2_out_pw5";
937f126890aSEmmanuel Vadot				nvidia,function = "extperiph2";
938f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
939f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
940f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
941f126890aSEmmanuel Vadot			};
942f126890aSEmmanuel Vadot
943f126890aSEmmanuel Vadot			clk3_out_pee0 {
944f126890aSEmmanuel Vadot				nvidia,pins = "clk3_out_pee0";
945f126890aSEmmanuel Vadot				nvidia,function = "extperiph3";
946f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
947f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
948f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
949f126890aSEmmanuel Vadot			};
950f126890aSEmmanuel Vadot
951f126890aSEmmanuel Vadot			sys_clk_req_pz5 {
952f126890aSEmmanuel Vadot				nvidia,pins = "sys_clk_req_pz5";
953f126890aSEmmanuel Vadot				nvidia,function = "sysclk";
954f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
955f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
956f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
957f126890aSEmmanuel Vadot			};
958f126890aSEmmanuel Vadot
959f126890aSEmmanuel Vadot			pbb4 {
960f126890aSEmmanuel Vadot				nvidia,pins = "pbb4";
961f126890aSEmmanuel Vadot				nvidia,function = "vgp4";
962f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
963f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
964f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
965f126890aSEmmanuel Vadot			};
966f126890aSEmmanuel Vadot
967f126890aSEmmanuel Vadot			pbb5 {
968f126890aSEmmanuel Vadot				nvidia,pins = "pbb5";
969f126890aSEmmanuel Vadot				nvidia,function = "vgp5";
970f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
971f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
972f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
973f126890aSEmmanuel Vadot			};
974f126890aSEmmanuel Vadot
975f126890aSEmmanuel Vadot			pbb6 {
976f126890aSEmmanuel Vadot				nvidia,pins = "pbb6";
977f126890aSEmmanuel Vadot				nvidia,function = "vgp6";
978f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
979f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
980f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
981f126890aSEmmanuel Vadot			};
982f126890aSEmmanuel Vadot
983f126890aSEmmanuel Vadot			clk1_req_pee2 {
984f126890aSEmmanuel Vadot				nvidia,pins = "clk1_req_pee2";
985f126890aSEmmanuel Vadot				nvidia,function = "dap";
986f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
987f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
988f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
989f126890aSEmmanuel Vadot			};
990f126890aSEmmanuel Vadot
991f126890aSEmmanuel Vadot			clk2_req_pcc5 {
992f126890aSEmmanuel Vadot				nvidia,pins = "clk2_req_pcc5";
993f126890aSEmmanuel Vadot				nvidia,function = "dap";
994f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
995f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
996f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
997f126890aSEmmanuel Vadot			};
998f126890aSEmmanuel Vadot
999f126890aSEmmanuel Vadot			clk3_req_pee1 {
1000f126890aSEmmanuel Vadot				nvidia,pins = "clk3_req_pee1";
1001f126890aSEmmanuel Vadot				nvidia,function = "dev3";
1002f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1003f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1004f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1005f126890aSEmmanuel Vadot			};
1006f126890aSEmmanuel Vadot
1007f126890aSEmmanuel Vadot			owr {
1008f126890aSEmmanuel Vadot				nvidia,pins = "owr";
1009f126890aSEmmanuel Vadot				nvidia,function = "owr";
1010f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1011f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1012f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1013f126890aSEmmanuel Vadot			};
1014f126890aSEmmanuel Vadot
1015f126890aSEmmanuel Vadot			pv2 {
1016f126890aSEmmanuel Vadot				nvidia,pins = "pv2",
1017f126890aSEmmanuel Vadot						"kb_row5_pr5";
1018f126890aSEmmanuel Vadot				nvidia,function = "owr";
1019f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1020f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1021f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1022f126890aSEmmanuel Vadot			};
1023f126890aSEmmanuel Vadot
1024f126890aSEmmanuel Vadot			pbb3 {
1025f126890aSEmmanuel Vadot				nvidia,pins = "pbb3";
1026f126890aSEmmanuel Vadot				nvidia,function = "vgp3";
1027f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1028f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1029f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1030f126890aSEmmanuel Vadot			};
1031f126890aSEmmanuel Vadot
1032f126890aSEmmanuel Vadot			pbb7 {
1033f126890aSEmmanuel Vadot				nvidia,pins = "pbb7";
1034f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
1035f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1036f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1037f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1038f126890aSEmmanuel Vadot			};
1039f126890aSEmmanuel Vadot
1040f126890aSEmmanuel Vadot			cam_mclk_pcc0 {
1041f126890aSEmmanuel Vadot				nvidia,pins = "cam_mclk_pcc0";
1042f126890aSEmmanuel Vadot				nvidia,function = "vi_alt3";
1043f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1044f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1046f126890aSEmmanuel Vadot			};
1047f126890aSEmmanuel Vadot
1048f126890aSEmmanuel Vadot			/* GPIO power/drive control */
1049f126890aSEmmanuel Vadot			drive_dap1 {
1050f126890aSEmmanuel Vadot				nvidia,pins = "drive_dap1",
1051f126890aSEmmanuel Vadot						"drive_dap2",
1052f126890aSEmmanuel Vadot						"drive_dbg",
1053f126890aSEmmanuel Vadot						"drive_at5",
1054f126890aSEmmanuel Vadot						"drive_gme",
1055f126890aSEmmanuel Vadot						"drive_ddc",
1056f126890aSEmmanuel Vadot						"drive_ao1",
1057f126890aSEmmanuel Vadot						"drive_uart3";
1058f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <0>;
1059f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
1060f126890aSEmmanuel Vadot				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
1061f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <31>;
1062f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <31>;
1063f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1064f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1065f126890aSEmmanuel Vadot			};
1066f126890aSEmmanuel Vadot
1067f126890aSEmmanuel Vadot			drive_sdio1 {
1068f126890aSEmmanuel Vadot				nvidia,pins = "drive_sdio1";
1069f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <0>;
1070f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1071f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <5>;
1072f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <5>;
1073f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
1074f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
1075f126890aSEmmanuel Vadot			};
1076f126890aSEmmanuel Vadot
1077f126890aSEmmanuel Vadot			drive_sdio3 {
1078f126890aSEmmanuel Vadot				nvidia,pins = "drive_sdio3";
1079f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <0>;
1080f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1081f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <46>;
1082f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <42>;
1083f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
1084f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
1085f126890aSEmmanuel Vadot			};
1086f126890aSEmmanuel Vadot
1087f126890aSEmmanuel Vadot			drive_gma {
1088f126890aSEmmanuel Vadot				nvidia,pins = "drive_gma",
1089f126890aSEmmanuel Vadot						"drive_gmb",
1090f126890aSEmmanuel Vadot						"drive_gmc",
1091f126890aSEmmanuel Vadot						"drive_gmd";
1092f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <9>;
1093f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <9>;
1094f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
1095f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
1096f126890aSEmmanuel Vadot			};
1097f126890aSEmmanuel Vadot
1098f126890aSEmmanuel Vadot			drive_lcd2 {
1099f126890aSEmmanuel Vadot				nvidia,pins = "drive_lcd2";
1100f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <0>;
1101f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
1102f126890aSEmmanuel Vadot				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_4>;
1103f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <20>;
1104f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <20>;
1105f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1106f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1107f126890aSEmmanuel Vadot			};
1108f126890aSEmmanuel Vadot		};
1109f126890aSEmmanuel Vadot	};
1110f126890aSEmmanuel Vadot
1111f126890aSEmmanuel Vadot	uartb: serial@70006040 {
1112f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-hsuart";
1113*aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
1114f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
1115f126890aSEmmanuel Vadot		status = "okay";
1116f126890aSEmmanuel Vadot
1117f126890aSEmmanuel Vadot		/* Broadcom GPS BCM47511 */
1118f126890aSEmmanuel Vadot	};
1119f126890aSEmmanuel Vadot
1120f126890aSEmmanuel Vadot	uartc: serial@70006200 {
1121f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-hsuart";
1122*aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
1123f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
1124f126890aSEmmanuel Vadot		status = "okay";
1125f126890aSEmmanuel Vadot
1126f126890aSEmmanuel Vadot		nvidia,adjust-baud-rates = <0 9600 100>,
1127f126890aSEmmanuel Vadot					   <9600 115200 200>,
1128f126890aSEmmanuel Vadot					   <1000000 4000000 136>;
1129f126890aSEmmanuel Vadot
1130f126890aSEmmanuel Vadot		/* Azurewave AW-AH663 BCM4330B1 */
1131f126890aSEmmanuel Vadot		bluetooth {
1132f126890aSEmmanuel Vadot			compatible = "brcm,bcm4330-bt";
1133f126890aSEmmanuel Vadot			max-speed = <4000000>;
1134f126890aSEmmanuel Vadot
1135f126890aSEmmanuel Vadot			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1136f126890aSEmmanuel Vadot			clock-names = "txco";
1137f126890aSEmmanuel Vadot
1138f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1139f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
1140f126890aSEmmanuel Vadot			interrupt-names = "host-wakeup";
1141f126890aSEmmanuel Vadot
1142f126890aSEmmanuel Vadot			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
1143f126890aSEmmanuel Vadot			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
1144f126890aSEmmanuel Vadot
1145f126890aSEmmanuel Vadot			vbat-supply  = <&vdd_3v3_sys>;
1146f126890aSEmmanuel Vadot			vddio-supply = <&vdd_1v8_vio>;
1147f126890aSEmmanuel Vadot		};
1148f126890aSEmmanuel Vadot	};
1149f126890aSEmmanuel Vadot
1150f126890aSEmmanuel Vadot	pwm: pwm@7000a000 {
1151f126890aSEmmanuel Vadot		status = "okay";
1152f126890aSEmmanuel Vadot	};
1153f126890aSEmmanuel Vadot
1154f126890aSEmmanuel Vadot	lcd_ddc: i2c@7000c000 {
1155f126890aSEmmanuel Vadot		status = "okay";
1156f126890aSEmmanuel Vadot		clock-frequency = <400000>;
1157f126890aSEmmanuel Vadot
1158f126890aSEmmanuel Vadot		/* Wolfson Microelectronics WM8903 audio codec */
1159f126890aSEmmanuel Vadot		wm8903: audio-codec@1a {
1160f126890aSEmmanuel Vadot			compatible = "wlf,wm8903";
1161f126890aSEmmanuel Vadot			reg = <0x1a>;
1162f126890aSEmmanuel Vadot
1163f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1164f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_BOTH>;
1165f126890aSEmmanuel Vadot
1166f126890aSEmmanuel Vadot			gpio-controller;
1167f126890aSEmmanuel Vadot			#gpio-cells = <2>;
1168f126890aSEmmanuel Vadot
1169f126890aSEmmanuel Vadot			micdet-cfg = <0>;
1170f126890aSEmmanuel Vadot			micdet-delay = <100>;
1171f126890aSEmmanuel Vadot
1172f126890aSEmmanuel Vadot			gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
1173f126890aSEmmanuel Vadot
1174f126890aSEmmanuel Vadot			AVDD-supply  = <&vdd_1v8_vio>;
1175f126890aSEmmanuel Vadot			CPVDD-supply = <&vdd_1v8_vio>;
1176f126890aSEmmanuel Vadot			DBVDD-supply = <&vdd_1v8_vio>;
1177f126890aSEmmanuel Vadot			DCVDD-supply = <&vdd_1v8_vio>;
1178f126890aSEmmanuel Vadot		};
1179f126890aSEmmanuel Vadot	};
1180f126890aSEmmanuel Vadot
1181f126890aSEmmanuel Vadot	i2c2: i2c@7000c400 {
1182f126890aSEmmanuel Vadot		status = "okay";
1183f126890aSEmmanuel Vadot		clock-frequency = <400000>;
1184f126890aSEmmanuel Vadot
1185f126890aSEmmanuel Vadot		/* Atmel touchscreen */
1186f126890aSEmmanuel Vadot		touchscreen@4d {
1187f126890aSEmmanuel Vadot			compatible = "atmel,maxtouch";
1188f126890aSEmmanuel Vadot			reg = <0x4d>;
1189f126890aSEmmanuel Vadot
1190f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1191f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
1192f126890aSEmmanuel Vadot			reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>;
1193f126890aSEmmanuel Vadot
1194f126890aSEmmanuel Vadot			vdda-supply = <&vdd_3v3_sys>;
1195f126890aSEmmanuel Vadot			vdd-supply  = <&vdd_3v3_sys>;
1196f126890aSEmmanuel Vadot		};
1197f126890aSEmmanuel Vadot	};
1198f126890aSEmmanuel Vadot
1199f126890aSEmmanuel Vadot	i2c3: i2c@7000c500 {
1200f126890aSEmmanuel Vadot		status = "okay";
1201f126890aSEmmanuel Vadot		clock-frequency = <400000>;
1202f126890aSEmmanuel Vadot
1203f126890aSEmmanuel Vadot		/* AsahiKASEI AK8975 magnetometer sensor */
1204f126890aSEmmanuel Vadot		magnetometer@c {
1205f126890aSEmmanuel Vadot			compatible = "asahi-kasei,ak8975";
1206f126890aSEmmanuel Vadot			reg = <0x0c>;
1207f126890aSEmmanuel Vadot
1208f126890aSEmmanuel Vadot			vdd-supply = <&vdd_3v3_sen>;
1209f126890aSEmmanuel Vadot			vid-supply = <&vdd_1v8_vio>;
1210f126890aSEmmanuel Vadot
1211f126890aSEmmanuel Vadot			mount-matrix =   "0",  "1",  "0",
1212f126890aSEmmanuel Vadot					 "1",  "0",  "0",
1213f126890aSEmmanuel Vadot					 "0",  "0", "-1";
1214f126890aSEmmanuel Vadot		};
1215f126890aSEmmanuel Vadot
1216f126890aSEmmanuel Vadot		light-sensor@44 {
1217f126890aSEmmanuel Vadot			compatible = "isil,isl29023";
1218f126890aSEmmanuel Vadot			reg = <0x44>;
1219f126890aSEmmanuel Vadot
1220f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1221f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(Q, 3) IRQ_TYPE_LEVEL_HIGH>;
1222f126890aSEmmanuel Vadot
1223f126890aSEmmanuel Vadot			vcc-supply = <&vdd_3v3_sen>;
1224f126890aSEmmanuel Vadot		};
1225f126890aSEmmanuel Vadot
1226f126890aSEmmanuel Vadot		gyroscope@68 {
1227f126890aSEmmanuel Vadot			compatible = "invensense,mpu3050";
1228f126890aSEmmanuel Vadot			reg = <0x68>;
1229f126890aSEmmanuel Vadot
1230f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1231f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>;
1232f126890aSEmmanuel Vadot
1233f126890aSEmmanuel Vadot			vdd-supply = <&vdd_3v3_sen>;
1234f126890aSEmmanuel Vadot			vlogic-supply = <&vdd_1v8_vio>;
1235f126890aSEmmanuel Vadot
1236f126890aSEmmanuel Vadot			mount-matrix =   "0",  "1",  "0",
1237f126890aSEmmanuel Vadot					 "1",  "0",  "0",
1238f126890aSEmmanuel Vadot					 "0",  "0", "-1";
1239f126890aSEmmanuel Vadot
1240f126890aSEmmanuel Vadot			/* External I2C interface */
1241f126890aSEmmanuel Vadot			i2c-gate {
1242f126890aSEmmanuel Vadot				#address-cells = <1>;
1243f126890aSEmmanuel Vadot				#size-cells = <0>;
1244f126890aSEmmanuel Vadot
1245f126890aSEmmanuel Vadot				accelerometer@f {
1246f126890aSEmmanuel Vadot					compatible = "kionix,kxtf9";
1247f126890aSEmmanuel Vadot					reg = <0x0f>;
1248f126890aSEmmanuel Vadot
1249f126890aSEmmanuel Vadot					interrupt-parent = <&gpio>;
1250f126890aSEmmanuel Vadot					interrupts = <TEGRA_GPIO(L, 1) IRQ_TYPE_EDGE_RISING>;
1251f126890aSEmmanuel Vadot
1252f126890aSEmmanuel Vadot					vdd-supply = <&vdd_1v8_vio>;
1253f126890aSEmmanuel Vadot					vddio-supply = <&vdd_1v8_vio>;
1254f126890aSEmmanuel Vadot
1255f126890aSEmmanuel Vadot					mount-matrix =  "-1",  "0",  "0",
1256f126890aSEmmanuel Vadot							 "0",  "1",  "0",
1257f126890aSEmmanuel Vadot							 "0",  "0",  "1";
1258f126890aSEmmanuel Vadot				};
1259f126890aSEmmanuel Vadot			};
1260f126890aSEmmanuel Vadot		};
1261f126890aSEmmanuel Vadot	};
1262f126890aSEmmanuel Vadot
1263f126890aSEmmanuel Vadot	hdmi_ddc: i2c@7000c700 {
1264f126890aSEmmanuel Vadot		status = "okay";
1265f126890aSEmmanuel Vadot		clock-frequency = <93750>;
1266f126890aSEmmanuel Vadot	};
1267f126890aSEmmanuel Vadot
1268f126890aSEmmanuel Vadot	i2c5: i2c@7000d000 {
1269f126890aSEmmanuel Vadot		status = "okay";
1270f126890aSEmmanuel Vadot		clock-frequency = <400000>;
1271f126890aSEmmanuel Vadot
1272f126890aSEmmanuel Vadot		/* Texas Instruments TPS659110 PMIC */
1273f126890aSEmmanuel Vadot		pmic: pmic@2d {
1274f126890aSEmmanuel Vadot			compatible = "ti,tps65911";
1275f126890aSEmmanuel Vadot			reg = <0x2d>;
1276f126890aSEmmanuel Vadot
1277f126890aSEmmanuel Vadot			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1278f126890aSEmmanuel Vadot			#interrupt-cells = <2>;
1279f126890aSEmmanuel Vadot			interrupt-controller;
1280f126890aSEmmanuel Vadot			wakeup-source;
1281f126890aSEmmanuel Vadot
1282f126890aSEmmanuel Vadot			ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
1283f126890aSEmmanuel Vadot			ti,system-power-controller;
1284f126890aSEmmanuel Vadot			ti,sleep-keep-ck32k;
1285f126890aSEmmanuel Vadot			ti,sleep-enable;
1286f126890aSEmmanuel Vadot
1287f126890aSEmmanuel Vadot			#gpio-cells = <2>;
1288f126890aSEmmanuel Vadot			gpio-controller;
1289f126890aSEmmanuel Vadot
1290f126890aSEmmanuel Vadot			vcc1-supply = <&vdd_5v0_sys>;
1291f126890aSEmmanuel Vadot			vcc2-supply = <&vdd_5v0_sys>;
1292f126890aSEmmanuel Vadot			vcc3-supply = <&vdd_1v8_vio>;
1293f126890aSEmmanuel Vadot			vcc4-supply = <&vdd_1v8_vio>;
1294f126890aSEmmanuel Vadot			vcc5-supply = <&vdd_5v0_sys>;
1295f126890aSEmmanuel Vadot			vcc6-supply = <&vddio_1v2_ddr>;
1296f126890aSEmmanuel Vadot			vcc7-supply = <&vdd_5v0_sys>;
1297f126890aSEmmanuel Vadot			vccio-supply = <&vdd_5v0_sys>;
1298f126890aSEmmanuel Vadot
1299f126890aSEmmanuel Vadot			pmic-sleep-hog {
1300f126890aSEmmanuel Vadot				gpio-hog;
1301f126890aSEmmanuel Vadot				gpios = <0 GPIO_ACTIVE_HIGH>,
1302f126890aSEmmanuel Vadot					<2 GPIO_ACTIVE_HIGH>,
1303f126890aSEmmanuel Vadot					<6 GPIO_ACTIVE_HIGH>,
1304f126890aSEmmanuel Vadot					<8 GPIO_ACTIVE_HIGH>;
1305f126890aSEmmanuel Vadot				output-high;
1306f126890aSEmmanuel Vadot			};
1307f126890aSEmmanuel Vadot
1308f126890aSEmmanuel Vadot			regulators {
1309f126890aSEmmanuel Vadot				/* VDD1 is not used by Chagall */
1310f126890aSEmmanuel Vadot
1311f126890aSEmmanuel Vadot				vddio_1v2_ddr: vdd2 {
1312f126890aSEmmanuel Vadot					regulator-name = "vddio_1v2_ddr";
1313f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1314f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1315f126890aSEmmanuel Vadot					regulator-always-on;
1316f126890aSEmmanuel Vadot					regulator-boot-on;
1317f126890aSEmmanuel Vadot				};
1318f126890aSEmmanuel Vadot
1319f126890aSEmmanuel Vadot				vdd_cpu: vddctrl {
1320f126890aSEmmanuel Vadot					regulator-name = "vdd_cpu,vdd_sys";
1321f126890aSEmmanuel Vadot					regulator-min-microvolt = <600000>;
1322f126890aSEmmanuel Vadot					regulator-max-microvolt = <1400000>;
1323f126890aSEmmanuel Vadot					regulator-coupled-with = <&vdd_core>;
1324f126890aSEmmanuel Vadot					regulator-coupled-max-spread = <300000>;
1325f126890aSEmmanuel Vadot					regulator-max-step-microvolt = <100000>;
1326f126890aSEmmanuel Vadot					regulator-always-on;
1327f126890aSEmmanuel Vadot					regulator-boot-on;
1328f126890aSEmmanuel Vadot					ti,regulator-ext-sleep-control = <1>;
1329f126890aSEmmanuel Vadot
1330f126890aSEmmanuel Vadot					nvidia,tegra-cpu-regulator;
1331f126890aSEmmanuel Vadot				};
1332f126890aSEmmanuel Vadot
1333f126890aSEmmanuel Vadot				vdd_1v8_vio: vio {
1334f126890aSEmmanuel Vadot					regulator-name = "vdd_1v8_gen";
1335f126890aSEmmanuel Vadot					/* FIXME: eMMC won't work, if set to 1.8 V */
1336f126890aSEmmanuel Vadot					regulator-min-microvolt = <1500000>;
1337f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
1338f126890aSEmmanuel Vadot					regulator-always-on;
1339f126890aSEmmanuel Vadot					regulator-boot-on;
1340f126890aSEmmanuel Vadot				};
1341f126890aSEmmanuel Vadot
1342f126890aSEmmanuel Vadot				/* eMMC VDD */
1343f126890aSEmmanuel Vadot				vcore_emmc: ldo1 {
1344f126890aSEmmanuel Vadot					regulator-name = "vdd_emmc_core";
1345f126890aSEmmanuel Vadot					regulator-min-microvolt = <1000000>;
1346f126890aSEmmanuel Vadot					regulator-max-microvolt = <3300000>;
1347f126890aSEmmanuel Vadot					regulator-always-on;
1348f126890aSEmmanuel Vadot				};
1349f126890aSEmmanuel Vadot
1350f126890aSEmmanuel Vadot				/* uSD slot VDD */
1351f126890aSEmmanuel Vadot				vdd_usd: ldo2 {
1352f126890aSEmmanuel Vadot					regulator-name = "vdd_usd";
1353f126890aSEmmanuel Vadot					regulator-min-microvolt = <3200000>;
1354f126890aSEmmanuel Vadot					regulator-max-microvolt = <3200000>;
1355f126890aSEmmanuel Vadot				};
1356f126890aSEmmanuel Vadot
1357f126890aSEmmanuel Vadot				/* uSD slot VDDIO */
1358f126890aSEmmanuel Vadot				vddio_usd: ldo3 {
1359f126890aSEmmanuel Vadot					regulator-name = "vddio_usd";
1360f126890aSEmmanuel Vadot					regulator-min-microvolt = <1900000>;
1361f126890aSEmmanuel Vadot					regulator-max-microvolt = <3200000>;
1362f126890aSEmmanuel Vadot				};
1363f126890aSEmmanuel Vadot
1364f126890aSEmmanuel Vadot				ldo4 {
1365f126890aSEmmanuel Vadot					regulator-name = "vdd_rtc";
1366f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1367f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1368f126890aSEmmanuel Vadot					regulator-always-on;
1369f126890aSEmmanuel Vadot				};
1370f126890aSEmmanuel Vadot
1371f126890aSEmmanuel Vadot				ldo5 {
1372f126890aSEmmanuel Vadot					regulator-name = "vdd_1v3_cam_isp";
1373f126890aSEmmanuel Vadot					regulator-min-microvolt = <1300000>;
1374f126890aSEmmanuel Vadot					regulator-max-microvolt = <1300000>;
1375f126890aSEmmanuel Vadot				};
1376f126890aSEmmanuel Vadot
1377f126890aSEmmanuel Vadot				ldo6 {
1378f126890aSEmmanuel Vadot					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
1379f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1380f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1381f126890aSEmmanuel Vadot				};
1382f126890aSEmmanuel Vadot
1383f126890aSEmmanuel Vadot				ldo7 {
1384f126890aSEmmanuel Vadot					regulator-name = "vdd_pllm,x,u,a_p_c_s";
1385f126890aSEmmanuel Vadot					regulator-min-microvolt = <1200000>;
1386f126890aSEmmanuel Vadot					regulator-max-microvolt = <1200000>;
1387f126890aSEmmanuel Vadot					regulator-always-on;
1388f126890aSEmmanuel Vadot					regulator-boot-on;
1389f126890aSEmmanuel Vadot					ti,regulator-ext-sleep-control = <8>;
1390f126890aSEmmanuel Vadot				};
1391f126890aSEmmanuel Vadot
1392f126890aSEmmanuel Vadot				ldo8 {
1393f126890aSEmmanuel Vadot					regulator-name = "vdd_ddr_hs";
1394f126890aSEmmanuel Vadot					regulator-min-microvolt = <1000000>;
1395f126890aSEmmanuel Vadot					regulator-max-microvolt = <1000000>;
1396f126890aSEmmanuel Vadot					regulator-always-on;
1397f126890aSEmmanuel Vadot					ti,regulator-ext-sleep-control = <8>;
1398f126890aSEmmanuel Vadot				};
1399f126890aSEmmanuel Vadot			};
1400f126890aSEmmanuel Vadot		};
1401f126890aSEmmanuel Vadot
1402f126890aSEmmanuel Vadot		nct72: temperature-sensor@4c {
1403f126890aSEmmanuel Vadot			compatible = "onnn,nct1008";
1404f126890aSEmmanuel Vadot			reg = <0x4c>;
1405f126890aSEmmanuel Vadot
1406f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1407f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(U, 5) IRQ_TYPE_EDGE_FALLING>;
1408f126890aSEmmanuel Vadot
1409f126890aSEmmanuel Vadot			vcc-supply = <&vdd_3v3_sys>;
1410f126890aSEmmanuel Vadot			#thermal-sensor-cells = <1>;
1411f126890aSEmmanuel Vadot		};
1412f126890aSEmmanuel Vadot
1413f126890aSEmmanuel Vadot		vdd_core: core-regulator@60 {
1414f126890aSEmmanuel Vadot			compatible = "ti,tps62361";
1415f126890aSEmmanuel Vadot			reg = <0x60>;
1416f126890aSEmmanuel Vadot
1417f126890aSEmmanuel Vadot			regulator-name = "tps62361-vout";
1418f126890aSEmmanuel Vadot			regulator-min-microvolt = <500000>;
1419f126890aSEmmanuel Vadot			regulator-max-microvolt = <1770000>;
1420f126890aSEmmanuel Vadot			regulator-coupled-with = <&vdd_cpu>;
1421f126890aSEmmanuel Vadot			regulator-coupled-max-spread = <300000>;
1422f126890aSEmmanuel Vadot			regulator-max-step-microvolt = <100000>;
1423f126890aSEmmanuel Vadot			regulator-boot-on;
1424f126890aSEmmanuel Vadot			regulator-always-on;
1425f126890aSEmmanuel Vadot			ti,enable-vout-discharge;
1426f126890aSEmmanuel Vadot			ti,vsel0-state-high;
1427f126890aSEmmanuel Vadot			ti,vsel1-state-high;
1428f126890aSEmmanuel Vadot
1429f126890aSEmmanuel Vadot			nvidia,tegra-core-regulator;
1430f126890aSEmmanuel Vadot		};
1431f126890aSEmmanuel Vadot	};
1432f126890aSEmmanuel Vadot
1433f126890aSEmmanuel Vadot	vdd_5v0_sys: regulator-5v {
1434f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1435f126890aSEmmanuel Vadot		regulator-name = "vdd_5v0_sys";
1436f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1437f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1438f126890aSEmmanuel Vadot		regulator-always-on;
1439f126890aSEmmanuel Vadot		regulator-boot-on;
1440f126890aSEmmanuel Vadot	};
1441f126890aSEmmanuel Vadot
1442f126890aSEmmanuel Vadot	vdd_3v3_sys: regulator-3v {
1443f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1444f126890aSEmmanuel Vadot		regulator-name = "vdd_3v3_sys";
1445f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1446f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1447f126890aSEmmanuel Vadot		regulator-always-on;
1448f126890aSEmmanuel Vadot		regulator-boot-on;
1449f126890aSEmmanuel Vadot	};
1450f126890aSEmmanuel Vadot
1451f126890aSEmmanuel Vadot	vdd_pnl: regulator-panel {
1452f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1453f126890aSEmmanuel Vadot		regulator-name = "vdd_panel";
1454f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1455f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1456f126890aSEmmanuel Vadot		regulator-enable-ramp-delay = <300000>;
1457f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>;
1458f126890aSEmmanuel Vadot		enable-active-high;
1459f126890aSEmmanuel Vadot		vin-supply = <&vdd_3v3_sys>;
1460f126890aSEmmanuel Vadot	};
1461f126890aSEmmanuel Vadot
1462f126890aSEmmanuel Vadot	vdd_3v3_sen: regulator-sensors {
1463f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1464f126890aSEmmanuel Vadot		regulator-name = "sen_3v3_en";
1465f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1466f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1467f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(K, 5) GPIO_ACTIVE_HIGH>;
1468f126890aSEmmanuel Vadot		enable-active-high;
1469f126890aSEmmanuel Vadot		vin-supply = <&vdd_3v3_sys>;
1470f126890aSEmmanuel Vadot	};
1471f126890aSEmmanuel Vadot
1472f126890aSEmmanuel Vadot	vdd_5v0_bl: regulator-bl {
1473f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1474f126890aSEmmanuel Vadot		regulator-name = "vdd_5v0_bl";
1475f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1476f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1477f126890aSEmmanuel Vadot		regulator-boot-on;
1478f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
1479f126890aSEmmanuel Vadot		enable-active-high;
1480f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1481f126890aSEmmanuel Vadot	};
1482f126890aSEmmanuel Vadot
1483f126890aSEmmanuel Vadot	hdmi_5v0_sys: regulator-hdmi {
1484f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1485f126890aSEmmanuel Vadot		regulator-name = "hdmi_5v0_sys";
1486f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1487f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1488f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1489f126890aSEmmanuel Vadot		enable-active-high;
1490f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1491f126890aSEmmanuel Vadot	};
1492f126890aSEmmanuel Vadot
1493f126890aSEmmanuel Vadot	vdd_vbus_usb1: regulator-usb1 {
1494f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1495f126890aSEmmanuel Vadot		regulator-name = "vdd_vbus_micro_usb";
1496f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1497f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1498f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(DD, 3) GPIO_ACTIVE_HIGH>;
1499f126890aSEmmanuel Vadot		enable-active-high;
1500f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1501f126890aSEmmanuel Vadot	};
1502f126890aSEmmanuel Vadot
1503f126890aSEmmanuel Vadot	vdd_vbus_usb3: regulator-usb3 {
1504f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1505f126890aSEmmanuel Vadot		regulator-name = "vdd_vbus_typea_usb";
1506f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1507f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1508f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>;
1509f126890aSEmmanuel Vadot		enable-active-high;
1510f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1511f126890aSEmmanuel Vadot	};
1512f126890aSEmmanuel Vadot
1513f126890aSEmmanuel Vadot	pmc@7000e400 {
1514f126890aSEmmanuel Vadot		status = "okay";
1515f126890aSEmmanuel Vadot		nvidia,invert-interrupt;
1516f126890aSEmmanuel Vadot		nvidia,suspend-mode = <2>;
1517f126890aSEmmanuel Vadot		nvidia,cpu-pwr-good-time = <2000>;
1518f126890aSEmmanuel Vadot		nvidia,cpu-pwr-off-time = <200>;
1519f126890aSEmmanuel Vadot		nvidia,core-pwr-good-time = <3845 3845>;
1520f126890aSEmmanuel Vadot		nvidia,core-pwr-off-time = <0>;
1521f126890aSEmmanuel Vadot		nvidia,core-power-req-active-high;
1522f126890aSEmmanuel Vadot		nvidia,sys-clock-req-active-high;
1523f126890aSEmmanuel Vadot		core-supply = <&vdd_core>;
1524f126890aSEmmanuel Vadot
1525f126890aSEmmanuel Vadot		/* Set DEV_OFF + PWR_OFF_SET bit in DCDC control register of TPS65911 PMIC  */
1526f126890aSEmmanuel Vadot		i2c-thermtrip {
1527f126890aSEmmanuel Vadot			nvidia,i2c-controller-id = <4>;
1528f126890aSEmmanuel Vadot			nvidia,bus-addr = <0x2d>;
1529f126890aSEmmanuel Vadot			nvidia,reg-addr = <0x3f>;
1530f126890aSEmmanuel Vadot			nvidia,reg-data = <0x81>;
1531f126890aSEmmanuel Vadot		};
1532f126890aSEmmanuel Vadot	};
1533f126890aSEmmanuel Vadot
1534f126890aSEmmanuel Vadot	memory-controller@7000f000 {
1535f126890aSEmmanuel Vadot		emc-timings-0 {
1536f126890aSEmmanuel Vadot			/* SAMSUNG K4P8G304EB FGC1 */
1537f126890aSEmmanuel Vadot			nvidia,ram-code = <0>;
1538f126890aSEmmanuel Vadot
1539f126890aSEmmanuel Vadot			timing-25500000 {
1540f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
1541f126890aSEmmanuel Vadot
1542f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00020001 0xc0000010
1543f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1544f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1545f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1546f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x73e30303 0x001f0000 >;
1547f126890aSEmmanuel Vadot			};
1548f126890aSEmmanuel Vadot
1549f126890aSEmmanuel Vadot			timing-51000000 {
1550f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
1551f126890aSEmmanuel Vadot
1552f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00010001 0xc0000010
1553f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1554f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1555f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1556f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x72c30303 0x001f0000 >;
1557f126890aSEmmanuel Vadot			};
1558f126890aSEmmanuel Vadot
1559f126890aSEmmanuel Vadot			timing-102000000 {
1560f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
1561f126890aSEmmanuel Vadot
1562f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000001 0xc0000018
1563f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000001
1564f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1565f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1566f126890aSEmmanuel Vadot					0x02020001 0x00060403 0x72430504 0x001f0000 >;
1567f126890aSEmmanuel Vadot			};
1568f126890aSEmmanuel Vadot
1569f126890aSEmmanuel Vadot			timing-204000000 {
1570f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
1571f126890aSEmmanuel Vadot
1572f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000003 0xc0000025
1573f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000006 0x00000003
1574f126890aSEmmanuel Vadot					0x00000005 0x00000001 0x00000002 0x00000004
1575f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000003 0x00000002
1576f126890aSEmmanuel Vadot					0x02030001 0x00070506 0x71e40a07 0x001f0000 >;
1577f126890aSEmmanuel Vadot			};
1578f126890aSEmmanuel Vadot
1579f126890aSEmmanuel Vadot			timing-400000000 {
1580f126890aSEmmanuel Vadot				clock-frequency = <400000000>;
1581f126890aSEmmanuel Vadot
1582f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000006 0xc0000048
1583f126890aSEmmanuel Vadot					0x00000002 0x00000003 0x0000000c 0x00000007
1584f126890aSEmmanuel Vadot					0x00000009 0x00000001 0x00000002 0x00000006
1585f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000004 0x00000004
1586f126890aSEmmanuel Vadot					0x04040001 0x000d090c 0x7026120d 0x001f0000 >;
1587f126890aSEmmanuel Vadot			};
1588f126890aSEmmanuel Vadot		};
1589f126890aSEmmanuel Vadot
1590f126890aSEmmanuel Vadot		emc-timings-1 {
1591f126890aSEmmanuel Vadot			/* ELPIDA EDB8132B2MA 8D_F */
1592f126890aSEmmanuel Vadot			nvidia,ram-code = <1>;
1593f126890aSEmmanuel Vadot
1594f126890aSEmmanuel Vadot			timing-25500000 {
1595f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
1596f126890aSEmmanuel Vadot
1597f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00020001 0xc0000010
1598f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1599f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1600f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1601f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x73e30303 0x001f0000 >;
1602f126890aSEmmanuel Vadot			};
1603f126890aSEmmanuel Vadot
1604f126890aSEmmanuel Vadot			timing-51000000 {
1605f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
1606f126890aSEmmanuel Vadot
1607f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00010001 0xc0000010
1608f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1609f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1610f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1611f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x72c30303 0x001f0000 >;
1612f126890aSEmmanuel Vadot			};
1613f126890aSEmmanuel Vadot
1614f126890aSEmmanuel Vadot			timing-102000000 {
1615f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
1616f126890aSEmmanuel Vadot
1617f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000001 0xc0000018
1618f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000001
1619f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1620f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1621f126890aSEmmanuel Vadot					0x02020001 0x00060403 0x72430504 0x001f0000 >;
1622f126890aSEmmanuel Vadot			};
1623f126890aSEmmanuel Vadot
1624f126890aSEmmanuel Vadot			timing-204000000 {
1625f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
1626f126890aSEmmanuel Vadot
1627f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000003 0xc0000025
1628f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000006 0x00000003
1629f126890aSEmmanuel Vadot					0x00000005 0x00000001 0x00000002 0x00000004
1630f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000003 0x00000002
1631f126890aSEmmanuel Vadot					0x02030001 0x00070506 0x71e40a07 0x001f0000 >;
1632f126890aSEmmanuel Vadot			};
1633f126890aSEmmanuel Vadot
1634f126890aSEmmanuel Vadot			timing-400000000 {
1635f126890aSEmmanuel Vadot				clock-frequency = <400000000>;
1636f126890aSEmmanuel Vadot
1637f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000006 0xc0000048
1638f126890aSEmmanuel Vadot					0x00000002 0x00000003 0x0000000c 0x00000007
1639f126890aSEmmanuel Vadot					0x00000009 0x00000001 0x00000002 0x00000006
1640f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000004 0x00000004
1641f126890aSEmmanuel Vadot					0x04040001 0x000d090c 0x7026120d 0x001f0000 >;
1642f126890aSEmmanuel Vadot			};
1643f126890aSEmmanuel Vadot		};
1644f126890aSEmmanuel Vadot
1645f126890aSEmmanuel Vadot		emc-timings-2 {
1646f126890aSEmmanuel Vadot			/* SAMSUNG K4P8G304EB FGC2 */
1647f126890aSEmmanuel Vadot			nvidia,ram-code = <2>;
1648f126890aSEmmanuel Vadot
1649f126890aSEmmanuel Vadot			timing-25500000 {
1650f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
1651f126890aSEmmanuel Vadot
1652f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00020001 0xc0000010
1653f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1654f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1655f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1656f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x73e30303 0x001f0000 >;
1657f126890aSEmmanuel Vadot			};
1658f126890aSEmmanuel Vadot
1659f126890aSEmmanuel Vadot			timing-51000000 {
1660f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
1661f126890aSEmmanuel Vadot
1662f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00010001 0xc0000010
1663f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1664f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1665f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1666f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x72c30303 0x001f0000 >;
1667f126890aSEmmanuel Vadot			};
1668f126890aSEmmanuel Vadot
1669f126890aSEmmanuel Vadot			timing-102000000 {
1670f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
1671f126890aSEmmanuel Vadot
1672f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000001 0xc0000018
1673f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000001
1674f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1675f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1676f126890aSEmmanuel Vadot					0x02020001 0x00060403 0x72430504 0x001f0000 >;
1677f126890aSEmmanuel Vadot			};
1678f126890aSEmmanuel Vadot
1679f126890aSEmmanuel Vadot			timing-204000000 {
1680f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
1681f126890aSEmmanuel Vadot
1682f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000003 0xc0000025
1683f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000006 0x00000003
1684f126890aSEmmanuel Vadot					0x00000005 0x00000001 0x00000002 0x00000004
1685f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000003 0x00000002
1686f126890aSEmmanuel Vadot					0x02030001 0x00070506 0x71e40a07 0x001f0000 >;
1687f126890aSEmmanuel Vadot			};
1688f126890aSEmmanuel Vadot
1689f126890aSEmmanuel Vadot			timing-533000000 {
1690f126890aSEmmanuel Vadot				clock-frequency = <533000000>;
1691f126890aSEmmanuel Vadot
1692f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000008 0xc0000060
1693f126890aSEmmanuel Vadot					0x00000003 0x00000004 0x00000010 0x0000000a
1694f126890aSEmmanuel Vadot					0x0000000d 0x00000002 0x00000002 0x00000008
1695f126890aSEmmanuel Vadot					0x00000002 0x00000000 0x00000004 0x00000005
1696f126890aSEmmanuel Vadot					0x05040002 0x00110b10 0x70281811 0x001f0000 >;
1697f126890aSEmmanuel Vadot			};
1698f126890aSEmmanuel Vadot		};
1699f126890aSEmmanuel Vadot
1700f126890aSEmmanuel Vadot		emc-timings-3 {
1701f126890aSEmmanuel Vadot			/* HYNIX H9TCNNN8JDMMPR NGM */
1702f126890aSEmmanuel Vadot			nvidia,ram-code = <3>;
1703f126890aSEmmanuel Vadot
1704f126890aSEmmanuel Vadot			timing-25500000 {
1705f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
1706f126890aSEmmanuel Vadot
1707f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00020001 0xc0000010
1708f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1709f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1710f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1711f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x73e30303 0x001f0000 >;
1712f126890aSEmmanuel Vadot			};
1713f126890aSEmmanuel Vadot
1714f126890aSEmmanuel Vadot			timing-51000000 {
1715f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
1716f126890aSEmmanuel Vadot
1717f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00010001 0xc0000010
1718f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1719f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1720f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1721f126890aSEmmanuel Vadot					0x02020001 0x00060402 0x72c30303 0x001f0000 >;
1722f126890aSEmmanuel Vadot			};
1723f126890aSEmmanuel Vadot
1724f126890aSEmmanuel Vadot			timing-102000000 {
1725f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
1726f126890aSEmmanuel Vadot
1727f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000001 0xc0000018
1728f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000001
1729f126890aSEmmanuel Vadot					0x00000003 0x00000001 0x00000002 0x00000004
1730f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000002 0x00000002
1731f126890aSEmmanuel Vadot					0x02020001 0x00060403 0x72430504 0x001f0000 >;
1732f126890aSEmmanuel Vadot			};
1733f126890aSEmmanuel Vadot
1734f126890aSEmmanuel Vadot			timing-204000000 {
1735f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
1736f126890aSEmmanuel Vadot
1737f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000003 0xc0000025
1738f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000006 0x00000003
1739f126890aSEmmanuel Vadot					0x00000005 0x00000001 0x00000002 0x00000004
1740f126890aSEmmanuel Vadot					0x00000001 0x00000000 0x00000003 0x00000002
1741f126890aSEmmanuel Vadot					0x02030001 0x00070506 0x71e40a07 0x001f0000 >;
1742f126890aSEmmanuel Vadot			};
1743f126890aSEmmanuel Vadot
1744f126890aSEmmanuel Vadot			timing-533000000 {
1745f126890aSEmmanuel Vadot				clock-frequency = <533000000>;
1746f126890aSEmmanuel Vadot
1747f126890aSEmmanuel Vadot				nvidia,emem-configuration = < 0x00000008 0xc0000060
1748f126890aSEmmanuel Vadot					0x00000003 0x00000004 0x00000010 0x0000000a
1749f126890aSEmmanuel Vadot					0x0000000d 0x00000002 0x00000002 0x00000008
1750f126890aSEmmanuel Vadot					0x00000002 0x00000000 0x00000004 0x00000005
1751f126890aSEmmanuel Vadot					0x05040002 0x00110b10 0x70281811 0x001f0000 >;
1752f126890aSEmmanuel Vadot			};
1753f126890aSEmmanuel Vadot		};
1754f126890aSEmmanuel Vadot	};
1755f126890aSEmmanuel Vadot
1756f126890aSEmmanuel Vadot	memory-controller@7000f400 {
1757f126890aSEmmanuel Vadot		emc-timings-0 {
1758f126890aSEmmanuel Vadot			/* SAMSUNG K4P8G304EB FGC1 */
1759f126890aSEmmanuel Vadot			nvidia,ram-code = <0>;
1760f126890aSEmmanuel Vadot
1761f126890aSEmmanuel Vadot			timing-25500000 {
1762f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
1763f126890aSEmmanuel Vadot
1764f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1765f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
1766f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
1767f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1768f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
1769f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
1770f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1771f126890aSEmmanuel Vadot
1772f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000001
1773f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000004
1774f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
1775f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
1776f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
1777f126890aSEmmanuel Vadot					0x00000009 0x00000060 0x00000000 0x00000018
1778f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1779f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000004 0x00000004
1780f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
1781f126890aSEmmanuel Vadot					0x00000002 0x0000006b 0x00000004 0x00000004
1782f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
1783f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
1784f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
1785f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
1786f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1787f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1788f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1789f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
1790f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
1791f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
1792f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
1793f126890aSEmmanuel Vadot					0x0000000a 0x00090009 0xa0f10000 0x00000000
1794f126890aSEmmanuel Vadot					0x00000000 0x800001c5 0xe0000000 0xff00ff00 >;
1795f126890aSEmmanuel Vadot			};
1796f126890aSEmmanuel Vadot
1797f126890aSEmmanuel Vadot			timing-51000000 {
1798f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
1799f126890aSEmmanuel Vadot
1800f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1801f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
1802f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
1803f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1804f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
1805f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
1806f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1807f126890aSEmmanuel Vadot
1808f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000003
1809f126890aSEmmanuel Vadot					0x00000006 0x00000002 0x00000002 0x00000004
1810f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
1811f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
1812f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
1813f126890aSEmmanuel Vadot					0x00000009 0x000000c0 0x00000000 0x00000030
1814f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1815f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000008 0x00000008
1816f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
1817f126890aSEmmanuel Vadot					0x00000002 0x000000d5 0x00000004 0x00000004
1818f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
1819f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
1820f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
1821f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
1822f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1823f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1824f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1825f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
1826f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
1827f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
1828f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
1829f126890aSEmmanuel Vadot					0x00000013 0x00090009 0xa0f10000 0x00000000
1830f126890aSEmmanuel Vadot					0x00000000 0x80000287 0xe0000000 0xff00ff00 >;
1831f126890aSEmmanuel Vadot			};
1832f126890aSEmmanuel Vadot
1833f126890aSEmmanuel Vadot			timing-102000000 {
1834f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
1835f126890aSEmmanuel Vadot
1836f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1837f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
1838f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
1839f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1840f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x0000000a>;
1841f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
1842f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1843f126890aSEmmanuel Vadot
1844f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000006
1845f126890aSEmmanuel Vadot					0x0000000d 0x00000004 0x00000002 0x00000004
1846f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
1847f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
1848f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
1849f126890aSEmmanuel Vadot					0x00000009 0x00000181 0x00000000 0x00000060
1850f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1851f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000000f 0x0000000f
1852f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
1853f126890aSEmmanuel Vadot					0x00000002 0x000001a9 0x00000004 0x00000004
1854f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
1855f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
1856f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
1857f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
1858f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1859f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1860f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1861f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
1862f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
1863f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
1864f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
1865f126890aSEmmanuel Vadot					0x00000025 0x00090009 0xa0f10000 0x00000000
1866f126890aSEmmanuel Vadot					0x00000000 0x8000040b 0xe0000000 0xff00ff00 >;
1867f126890aSEmmanuel Vadot			};
1868f126890aSEmmanuel Vadot
1869f126890aSEmmanuel Vadot			timing-204000000 {
1870f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
1871f126890aSEmmanuel Vadot
1872f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1873f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010042>;
1874f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
1875f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1876f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000013>;
1877f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
1878f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1879f126890aSEmmanuel Vadot
1880f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x0000000c
1881f126890aSEmmanuel Vadot					0x0000001a 0x00000008 0x00000003 0x00000005
1882f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000006 0x00000003
1883f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000000
1884f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000c
1885f126890aSEmmanuel Vadot					0x0000000a 0x00000303 0x00000000 0x000000c0
1886f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000000
1887f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000001d 0x0000001d
1888f126890aSEmmanuel Vadot					0x00000004 0x0000000b 0x00000005 0x00000004
1889f126890aSEmmanuel Vadot					0x00000002 0x00000351 0x00000004 0x00000006
1890f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x004400a4
1891f126890aSEmmanuel Vadot					0x00008000 0x00080000 0x00080000 0x00080000
1892f126890aSEmmanuel Vadot					0x00080000 0x00080000 0x00080000 0x00080000
1893f126890aSEmmanuel Vadot					0x00080000 0x00000000 0x00000000 0x00000000
1894f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1895f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1896f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1897f126890aSEmmanuel Vadot					0x00000000 0x00080000 0x00080000 0x00080000
1898f126890aSEmmanuel Vadot					0x00080000 0x000e0220 0x0800201c 0x00000000
1899f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
1900f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
1901f126890aSEmmanuel Vadot					0x0000004a 0x00090009 0xa0f10000 0x00000000
1902f126890aSEmmanuel Vadot					0x00000000 0x80000713 0xe0000000 0xff00ff00 >;
1903f126890aSEmmanuel Vadot			};
1904f126890aSEmmanuel Vadot
1905f126890aSEmmanuel Vadot			timing-400000000 {
1906f126890aSEmmanuel Vadot				clock-frequency = <400000000>;
1907f126890aSEmmanuel Vadot
1908f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1909f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010082>;
1910f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020004>;
1911f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1912f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000024>;
1913f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1914f126890aSEmmanuel Vadot
1915f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000017
1916f126890aSEmmanuel Vadot					0x00000033 0x00000010 0x00000007 0x00000007
1917f126890aSEmmanuel Vadot					0x00000007 0x00000002 0x0000000a 0x00000007
1918f126890aSEmmanuel Vadot					0x00000007 0x00000003 0x00000002 0x00000000
1919f126890aSEmmanuel Vadot					0x00000003 0x00000007 0x00000004 0x0000000d
1920f126890aSEmmanuel Vadot					0x0000000e 0x000005e9 0x00000000 0x0000017a
1921f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000007 0x00000000
1922f126890aSEmmanuel Vadot					0x00000001 0x0000000c 0x00000038 0x00000038
1923f126890aSEmmanuel Vadot					0x00000006 0x00000014 0x00000009 0x00000004
1924f126890aSEmmanuel Vadot					0x00000002 0x00000680 0x00000000 0x00000006
1925f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00006282 0x001d0084
1926f126890aSEmmanuel Vadot					0x00008000 0x00034000 0x00034000 0x00034000
1927f126890aSEmmanuel Vadot					0x00034000 0x00034000 0x00034000 0x00034000
1928f126890aSEmmanuel Vadot					0x00034000 0x00000000 0x00000000 0x00000000
1929f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1930f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1931f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1932f126890aSEmmanuel Vadot					0x00000000 0x00038000 0x00038000 0x00038000
1933f126890aSEmmanuel Vadot					0x00038000 0x00080220 0x0800003d 0x00000000
1934f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f408 0x00000000 0x00000007
1935f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
1936f126890aSEmmanuel Vadot					0x00000090 0x000c000c 0xa0f10404 0x00000000
1937f126890aSEmmanuel Vadot					0x00000000 0x80000ce6 0xe0000000 0xff00ff88 >;
1938f126890aSEmmanuel Vadot			};
1939f126890aSEmmanuel Vadot		};
1940f126890aSEmmanuel Vadot
1941f126890aSEmmanuel Vadot		emc-timings-1 {
1942f126890aSEmmanuel Vadot			/* ELPIDA EDB8132B2MA 8D_F */
1943f126890aSEmmanuel Vadot			nvidia,ram-code = <1>;
1944f126890aSEmmanuel Vadot
1945f126890aSEmmanuel Vadot			timing-25500000 {
1946f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
1947f126890aSEmmanuel Vadot
1948f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1949f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
1950f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
1951f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1952f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
1953f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
1954f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1955f126890aSEmmanuel Vadot
1956f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000001
1957f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000004
1958f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
1959f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
1960f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
1961f126890aSEmmanuel Vadot					0x0000000a 0x00000060 0x00000000 0x00000018
1962f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1963f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000004 0x00000004
1964f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
1965f126890aSEmmanuel Vadot					0x00000002 0x0000006b 0x00000004 0x00000004
1966f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
1967f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
1968f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
1969f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
1970f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1971f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1972f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
1973f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
1974f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
1975f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
1976f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
1977f126890aSEmmanuel Vadot					0x0000000a 0x00090009 0xa0f10000 0x00000000
1978f126890aSEmmanuel Vadot					0x00000000 0x800001c5 0xe0000000 0xff00ff00 >;
1979f126890aSEmmanuel Vadot			};
1980f126890aSEmmanuel Vadot
1981f126890aSEmmanuel Vadot			timing-51000000 {
1982f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
1983f126890aSEmmanuel Vadot
1984f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
1985f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
1986f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
1987f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
1988f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
1989f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
1990f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
1991f126890aSEmmanuel Vadot
1992f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000003
1993f126890aSEmmanuel Vadot					0x00000006 0x00000002 0x00000002 0x00000004
1994f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
1995f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
1996f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
1997f126890aSEmmanuel Vadot					0x0000000a 0x000000c0 0x00000000 0x00000030
1998f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
1999f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000008 0x00000008
2000f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2001f126890aSEmmanuel Vadot					0x00000002 0x000000d5 0x00000004 0x00000004
2002f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2003f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2004f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2005f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2006f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2007f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2008f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2009f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2010f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2011f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2012f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2013f126890aSEmmanuel Vadot					0x00000013 0x00090009 0xa0f10000 0x00000000
2014f126890aSEmmanuel Vadot					0x00000000 0x80000287 0xe0000000 0xff00ff00 >;
2015f126890aSEmmanuel Vadot			};
2016f126890aSEmmanuel Vadot
2017f126890aSEmmanuel Vadot			timing-102000000 {
2018f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
2019f126890aSEmmanuel Vadot
2020f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2021f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2022f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2023f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2024f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x0000000a>;
2025f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2026f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2027f126890aSEmmanuel Vadot
2028f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000006
2029f126890aSEmmanuel Vadot					0x0000000d 0x00000004 0x00000002 0x00000004
2030f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2031f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2032f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2033f126890aSEmmanuel Vadot					0x0000000a 0x00000181 0x00000000 0x00000060
2034f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2035f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000000f 0x0000000f
2036f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2037f126890aSEmmanuel Vadot					0x00000002 0x000001a9 0x00000004 0x00000004
2038f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2039f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2040f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2041f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2042f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2043f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2044f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2045f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2046f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2047f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2048f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2049f126890aSEmmanuel Vadot					0x00000025 0x00090009 0xa0f10000 0x00000000
2050f126890aSEmmanuel Vadot					0x00000000 0x8000040b 0xe0000000 0xff00ff00 >;
2051f126890aSEmmanuel Vadot			};
2052f126890aSEmmanuel Vadot
2053f126890aSEmmanuel Vadot			timing-204000000 {
2054f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
2055f126890aSEmmanuel Vadot
2056f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2057f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010042>;
2058f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2059f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2060f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000013>;
2061f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2062f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2063f126890aSEmmanuel Vadot
2064f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x0000000c
2065f126890aSEmmanuel Vadot					0x0000001a 0x00000008 0x00000003 0x00000005
2066f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000006 0x00000003
2067f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000000
2068f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000c
2069f126890aSEmmanuel Vadot					0x0000000a 0x00000303 0x00000000 0x000000c0
2070f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000000
2071f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000001d 0x0000001d
2072f126890aSEmmanuel Vadot					0x00000004 0x0000000b 0x00000005 0x00000004
2073f126890aSEmmanuel Vadot					0x00000002 0x00000351 0x00000004 0x00000006
2074f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x004400a4
2075f126890aSEmmanuel Vadot					0x00008000 0x00070000 0x00070000 0x00070000
2076f126890aSEmmanuel Vadot					0x00070000 0x00070000 0x00070000 0x00070000
2077f126890aSEmmanuel Vadot					0x00070000 0x00000000 0x00000000 0x00000000
2078f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2079f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2080f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2081f126890aSEmmanuel Vadot					0x00000000 0x00080000 0x00080000 0x00080000
2082f126890aSEmmanuel Vadot					0x00080000 0x000e0220 0x0800201c 0x00000000
2083f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2084f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2085f126890aSEmmanuel Vadot					0x0000004a 0x00090009 0xa0f10000 0x00000000
2086f126890aSEmmanuel Vadot					0x00000000 0x80000713 0xe0000000 0xff00ff00 >;
2087f126890aSEmmanuel Vadot			};
2088f126890aSEmmanuel Vadot
2089f126890aSEmmanuel Vadot			timing-400000000 {
2090f126890aSEmmanuel Vadot				clock-frequency = <400000000>;
2091f126890aSEmmanuel Vadot
2092f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2093f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010082>;
2094f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020004>;
2095f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2096f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000024>;
2097f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2098f126890aSEmmanuel Vadot
2099f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000017
2100f126890aSEmmanuel Vadot					0x00000033 0x00000010 0x00000007 0x00000007
2101f126890aSEmmanuel Vadot					0x00000007 0x00000002 0x0000000a 0x00000007
2102f126890aSEmmanuel Vadot					0x00000007 0x00000003 0x00000002 0x00000000
2103f126890aSEmmanuel Vadot					0x00000003 0x00000007 0x00000004 0x0000000d
2104f126890aSEmmanuel Vadot					0x0000000e 0x000005e9 0x00000000 0x0000017a
2105f126890aSEmmanuel Vadot					0x00000002 0x00000002 0x00000007 0x00000000
2106f126890aSEmmanuel Vadot					0x00000001 0x0000000c 0x00000038 0x00000038
2107f126890aSEmmanuel Vadot					0x00000006 0x00000014 0x00000009 0x00000004
2108f126890aSEmmanuel Vadot					0x00000002 0x00000680 0x00000000 0x00000004
2109f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00006282 0x001d0084
2110f126890aSEmmanuel Vadot					0x00008000 0x00034000 0x00034000 0x00034000
2111f126890aSEmmanuel Vadot					0x00034000 0x00034000 0x00034000 0x00034000
2112f126890aSEmmanuel Vadot					0x00034000 0x00000000 0x00000000 0x00000000
2113f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2114f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2115f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2116f126890aSEmmanuel Vadot					0x00000000 0x00048000 0x00048000 0x00048000
2117f126890aSEmmanuel Vadot					0x00048000 0x00060220 0x0800003d 0x00000000
2118f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f408 0x00000000 0x00000007
2119f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2120f126890aSEmmanuel Vadot					0x00000090 0x000c000c 0xa0f10000 0x00000000
2121f126890aSEmmanuel Vadot					0x00000000 0x80000ce6 0xe0000000 0xff00ff88 >;
2122f126890aSEmmanuel Vadot			};
2123f126890aSEmmanuel Vadot		};
2124f126890aSEmmanuel Vadot
2125f126890aSEmmanuel Vadot		emc-timings-2 {
2126f126890aSEmmanuel Vadot			/* SAMSUNG K4P8G304EB FGC2 */
2127f126890aSEmmanuel Vadot			nvidia,ram-code = <2>;
2128f126890aSEmmanuel Vadot
2129f126890aSEmmanuel Vadot			timing-25500000 {
2130f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
2131f126890aSEmmanuel Vadot
2132f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2133f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2134f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2135f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2136f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
2137f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2138f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2139f126890aSEmmanuel Vadot
2140f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000001
2141f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000004
2142f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2143f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2144f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2145f126890aSEmmanuel Vadot					0x0000000a 0x00000060 0x00000000 0x00000018
2146f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2147f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000004 0x00000004
2148f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2149f126890aSEmmanuel Vadot					0x00000002 0x0000006b 0x00000004 0x00000004
2150f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2151f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2152f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2153f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2154f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2155f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2156f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2157f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2158f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2159f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2160f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2161f126890aSEmmanuel Vadot					0x0000000a 0x00090009 0xa0f10000 0x00000000
2162f126890aSEmmanuel Vadot					0x00000000 0x800001c5 0xe0000000 0xff00ff00 >;
2163f126890aSEmmanuel Vadot			};
2164f126890aSEmmanuel Vadot
2165f126890aSEmmanuel Vadot			timing-51000000 {
2166f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
2167f126890aSEmmanuel Vadot
2168f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2169f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2170f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2171f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2172f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
2173f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2174f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2175f126890aSEmmanuel Vadot
2176f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000003
2177f126890aSEmmanuel Vadot					0x00000006 0x00000002 0x00000002 0x00000004
2178f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2179f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2180f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2181f126890aSEmmanuel Vadot					0x0000000a 0x000000c0 0x00000000 0x00000030
2182f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2183f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000008 0x00000008
2184f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2185f126890aSEmmanuel Vadot					0x00000002 0x000000d5 0x00000004 0x00000004
2186f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2187f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2188f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2189f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2190f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2191f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2192f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2193f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2194f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2195f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2196f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2197f126890aSEmmanuel Vadot					0x00000013 0x00090009 0xa0f10000 0x00000000
2198f126890aSEmmanuel Vadot					0x00000000 0x80000287 0xe0000000 0xff00ff00 >;
2199f126890aSEmmanuel Vadot			};
2200f126890aSEmmanuel Vadot
2201f126890aSEmmanuel Vadot			timing-102000000 {
2202f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
2203f126890aSEmmanuel Vadot
2204f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2205f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2206f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2207f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2208f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x0000000a>;
2209f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2210f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2211f126890aSEmmanuel Vadot
2212f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000006
2213f126890aSEmmanuel Vadot					0x0000000d 0x00000004 0x00000002 0x00000004
2214f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2215f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2216f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2217f126890aSEmmanuel Vadot					0x00000009 0x00000181 0x00000000 0x00000060
2218f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2219f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000000f 0x0000000f
2220f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2221f126890aSEmmanuel Vadot					0x00000002 0x000001a9 0x00000004 0x00000004
2222f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2223f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2224f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2225f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2226f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2227f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2228f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2229f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2230f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2231f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2232f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2233f126890aSEmmanuel Vadot					0x00000025 0x00090009 0xa0f10000 0x00000000
2234f126890aSEmmanuel Vadot					0x00000000 0x8000040b 0xe0000000 0xff00ff00 >;
2235f126890aSEmmanuel Vadot			};
2236f126890aSEmmanuel Vadot
2237f126890aSEmmanuel Vadot			timing-204000000 {
2238f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
2239f126890aSEmmanuel Vadot
2240f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2241f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010042>;
2242f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2243f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2244f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000013>;
2245f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2246f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2247f126890aSEmmanuel Vadot
2248f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x0000000c
2249f126890aSEmmanuel Vadot					0x0000001a 0x00000008 0x00000003 0x00000005
2250f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000006 0x00000003
2251f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000000
2252f126890aSEmmanuel Vadot					0x00000001 0x00000004 0x00000001 0x0000000c
2253f126890aSEmmanuel Vadot					0x0000000a 0x00000303 0x00000000 0x000000c0
2254f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000000
2255f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000001d 0x0000001d
2256f126890aSEmmanuel Vadot					0x00000004 0x0000000b 0x00000005 0x00000004
2257f126890aSEmmanuel Vadot					0x00000002 0x00000351 0x00000005 0x00000004
2258f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x004400a4
2259f126890aSEmmanuel Vadot					0x00008000 0x00080000 0x00080000 0x00080000
2260f126890aSEmmanuel Vadot					0x00080000 0x00080000 0x00080000 0x00080000
2261f126890aSEmmanuel Vadot					0x00080000 0x00000000 0x00000000 0x00000000
2262f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2263f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2264f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2265f126890aSEmmanuel Vadot					0x00000000 0x00080000 0x00080000 0x00080000
2266f126890aSEmmanuel Vadot					0x00080000 0x000e0220 0x0800201c 0x00000000
2267f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2268f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2269f126890aSEmmanuel Vadot					0x0000004a 0x00090009 0xa0f10000 0x00000000
2270f126890aSEmmanuel Vadot					0x00000000 0x80000713 0xe0000000 0xff00ff00 >;
2271f126890aSEmmanuel Vadot			};
2272f126890aSEmmanuel Vadot
2273f126890aSEmmanuel Vadot			timing-533000000 {
2274f126890aSEmmanuel Vadot				clock-frequency = <533000000>;
2275f126890aSEmmanuel Vadot
2276f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2277f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x000100c2>;
2278f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020006>;
2279f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2280f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000030>;
2281f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2282f126890aSEmmanuel Vadot
2283f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x0000001f
2284f126890aSEmmanuel Vadot					0x00000045 0x00000016 0x00000009 0x00000008
2285f126890aSEmmanuel Vadot					0x00000009 0x00000003 0x0000000d 0x00000009
2286f126890aSEmmanuel Vadot					0x00000009 0x00000005 0x00000003 0x00000000
2287f126890aSEmmanuel Vadot					0x00000004 0x0000000a 0x00000006 0x0000000d
2288f126890aSEmmanuel Vadot					0x00000010 0x000007df 0x00000000 0x000001f7
2289f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000009 0x00000000
2290f126890aSEmmanuel Vadot					0x00000001 0x0000000f 0x0000004b 0x0000004b
2291f126890aSEmmanuel Vadot					0x00000008 0x0000001b 0x0000000c 0x00000004
2292f126890aSEmmanuel Vadot					0x00000002 0x000008aa 0x00000000 0x00000004
2293f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00006282 0xf0120091
2294f126890aSEmmanuel Vadot					0x00008000 0x007f8008 0x007f8008 0x007f8008
2295f126890aSEmmanuel Vadot					0x007f8008 0x007f8008 0x007f8008 0x007f8008
2296f126890aSEmmanuel Vadot					0x007f8008 0x00000000 0x00000000 0x00000000
2297f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2298f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2299f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2300f126890aSEmmanuel Vadot					0x00000000 0x0000000c 0x0000000c 0x0000000c
2301f126890aSEmmanuel Vadot					0x0000000c 0x00080220 0x0200003d 0x00000000
2302f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f408 0x00000000 0x00000007
2303f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2304f126890aSEmmanuel Vadot					0x000000c0 0x000e000e 0xa0f10000 0x00000000
2305f126890aSEmmanuel Vadot					0x00000000 0x800010d9 0xf0000000 0xff00ff88 >;
2306f126890aSEmmanuel Vadot			};
2307f126890aSEmmanuel Vadot		};
2308f126890aSEmmanuel Vadot
2309f126890aSEmmanuel Vadot		emc-timings-3 {
2310f126890aSEmmanuel Vadot			/* HYNIX H9TCNNN8JDMMPR NGM */
2311f126890aSEmmanuel Vadot			nvidia,ram-code = <3>;
2312f126890aSEmmanuel Vadot
2313f126890aSEmmanuel Vadot			timing-25500000 {
2314f126890aSEmmanuel Vadot				clock-frequency = <25500000>;
2315f126890aSEmmanuel Vadot
2316f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2317f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2318f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2319f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2320f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
2321f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2322f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2323f126890aSEmmanuel Vadot
2324f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000001
2325f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000004
2326f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2327f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2328f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2329f126890aSEmmanuel Vadot					0x0000000a 0x00000060 0x00000000 0x00000018
2330f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2331f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000004 0x00000004
2332f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2333f126890aSEmmanuel Vadot					0x00000002 0x0000006b 0x00000004 0x00000004
2334f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2335f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2336f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2337f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2338f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2339f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2340f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2341f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2342f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2343f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2344f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2345f126890aSEmmanuel Vadot					0x0000000a 0x00090009 0xa0f10000 0x00000000
2346f126890aSEmmanuel Vadot					0x00000000 0x800001c5 0xe0000000 0xff00ff00 >;
2347f126890aSEmmanuel Vadot			};
2348f126890aSEmmanuel Vadot
2349f126890aSEmmanuel Vadot			timing-51000000 {
2350f126890aSEmmanuel Vadot				clock-frequency = <51000000>;
2351f126890aSEmmanuel Vadot
2352f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2353f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2354f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2355f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2356f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000009>;
2357f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2358f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2359f126890aSEmmanuel Vadot
2360f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000003
2361f126890aSEmmanuel Vadot					0x00000006 0x00000002 0x00000002 0x00000004
2362f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2363f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2364f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2365f126890aSEmmanuel Vadot					0x0000000a 0x000000c0 0x00000000 0x00000030
2366f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2367f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x00000008 0x00000008
2368f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2369f126890aSEmmanuel Vadot					0x00000002 0x000000d5 0x00000004 0x00000004
2370f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2371f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2372f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2373f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2374f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2375f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2376f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2377f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2378f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2379f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2380f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2381f126890aSEmmanuel Vadot					0x00000013 0x00090009 0xa0f10000 0x00000000
2382f126890aSEmmanuel Vadot					0x00000000 0x80000287 0xe0000000 0xff00ff00 >;
2383f126890aSEmmanuel Vadot			};
2384f126890aSEmmanuel Vadot
2385f126890aSEmmanuel Vadot			timing-102000000 {
2386f126890aSEmmanuel Vadot				clock-frequency = <102000000>;
2387f126890aSEmmanuel Vadot
2388f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2389f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010022>;
2390f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2391f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2392f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x0000000a>;
2393f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2394f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2395f126890aSEmmanuel Vadot
2396f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x00000006
2397f126890aSEmmanuel Vadot					0x0000000d 0x00000004 0x00000002 0x00000004
2398f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000005 0x00000002
2399f126890aSEmmanuel Vadot					0x00000002 0x00000001 0x00000001 0x00000000
2400f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000b
2401f126890aSEmmanuel Vadot					0x0000000a 0x00000181 0x00000000 0x00000060
2402f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000002 0x00000000
2403f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000000f 0x0000000f
2404f126890aSEmmanuel Vadot					0x00000003 0x00000008 0x00000004 0x00000004
2405f126890aSEmmanuel Vadot					0x00000002 0x000001a9 0x00000004 0x00000004
2406f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x007800a4
2407f126890aSEmmanuel Vadot					0x00008000 0x000fc000 0x000fc000 0x000fc000
2408f126890aSEmmanuel Vadot					0x000fc000 0x000fc000 0x000fc000 0x000fc000
2409f126890aSEmmanuel Vadot					0x000fc000 0x00000000 0x00000000 0x00000000
2410f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2411f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2412f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2413f126890aSEmmanuel Vadot					0x00000000 0x000fc000 0x000fc000 0x000fc000
2414f126890aSEmmanuel Vadot					0x000fc000 0x00100220 0x0800201c 0x00000000
2415f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2416f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2417f126890aSEmmanuel Vadot					0x00000025 0x00090009 0xa0f10000 0x00000000
2418f126890aSEmmanuel Vadot					0x00000000 0x8000040b 0xe0000000 0xff00ff00 >;
2419f126890aSEmmanuel Vadot			};
2420f126890aSEmmanuel Vadot
2421f126890aSEmmanuel Vadot			timing-204000000 {
2422f126890aSEmmanuel Vadot				clock-frequency = <204000000>;
2423f126890aSEmmanuel Vadot
2424f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2425f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x00010042>;
2426f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020001>;
2427f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2428f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000013>;
2429f126890aSEmmanuel Vadot				nvidia,emc-cfg-dyn-self-ref;
2430f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2431f126890aSEmmanuel Vadot
2432f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x0000000c
2433f126890aSEmmanuel Vadot					0x0000001a 0x00000008 0x00000003 0x00000005
2434f126890aSEmmanuel Vadot					0x00000004 0x00000001 0x00000006 0x00000003
2435f126890aSEmmanuel Vadot					0x00000003 0x00000002 0x00000002 0x00000000
2436f126890aSEmmanuel Vadot					0x00000001 0x00000003 0x00000001 0x0000000c
2437f126890aSEmmanuel Vadot					0x0000000b 0x00000303 0x00000000 0x000000c0
2438f126890aSEmmanuel Vadot					0x00000001 0x00000001 0x00000003 0x00000000
2439f126890aSEmmanuel Vadot					0x00000001 0x00000007 0x0000001d 0x0000001d
2440f126890aSEmmanuel Vadot					0x00000004 0x0000000b 0x00000005 0x00000004
2441f126890aSEmmanuel Vadot					0x00000002 0x00000351 0x00000004 0x00000006
2442f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00004282 0x004400a4
2443f126890aSEmmanuel Vadot					0x00008000 0x00072000 0x00072000 0x00072000
2444f126890aSEmmanuel Vadot					0x00072000 0x00072000 0x00072000 0x00072000
2445f126890aSEmmanuel Vadot					0x00072000 0x00000000 0x00000000 0x00000000
2446f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2447f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2448f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2449f126890aSEmmanuel Vadot					0x00000000 0x00080000 0x00080000 0x00080000
2450f126890aSEmmanuel Vadot					0x00080000 0x000e0220 0x0800201c 0x00000000
2451f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f008 0x00000000 0x00000007
2452f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2453f126890aSEmmanuel Vadot					0x0000004a 0x00090009 0xa0f10000 0x00000000
2454f126890aSEmmanuel Vadot					0x00000000 0x80000713 0xd0000000 0xff00ff00 >;
2455f126890aSEmmanuel Vadot			};
2456f126890aSEmmanuel Vadot
2457f126890aSEmmanuel Vadot			timing-533000000 {
2458f126890aSEmmanuel Vadot				clock-frequency = <533000000>;
2459f126890aSEmmanuel Vadot
2460f126890aSEmmanuel Vadot				nvidia,emc-auto-cal-interval = <0x001fffff>;
2461f126890aSEmmanuel Vadot				nvidia,emc-mode-1 = <0x000100c2>;
2462f126890aSEmmanuel Vadot				nvidia,emc-mode-2 = <0x00020006>;
2463f126890aSEmmanuel Vadot				nvidia,emc-mode-reset = <0x00000000>;
2464f126890aSEmmanuel Vadot				nvidia,emc-zcal-cnt-long = <0x00000030>;
2465f126890aSEmmanuel Vadot				nvidia,emc-cfg-periodic-qrst;
2466f126890aSEmmanuel Vadot
2467f126890aSEmmanuel Vadot				nvidia,emc-configuration =  < 0x0000001f
2468f126890aSEmmanuel Vadot					0x00000045 0x00000016 0x00000009 0x00000008
2469f126890aSEmmanuel Vadot					0x00000009 0x00000003 0x0000000d 0x00000009
2470f126890aSEmmanuel Vadot					0x00000009 0x00000005 0x00000003 0x00000000
2471f126890aSEmmanuel Vadot					0x00000004 0x00000009 0x00000006 0x0000000d
2472f126890aSEmmanuel Vadot					0x00000010 0x000007df 0x00000000 0x000001f7
2473f126890aSEmmanuel Vadot					0x00000003 0x00000003 0x00000009 0x00000000
2474f126890aSEmmanuel Vadot					0x00000001 0x0000000f 0x0000004b 0x0000004b
2475f126890aSEmmanuel Vadot					0x00000008 0x0000001b 0x0000000c 0x00000004
2476f126890aSEmmanuel Vadot					0x00000002 0x000008aa 0x00000000 0x00000006
2477f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00006282 0xf0120091
2478f126890aSEmmanuel Vadot					0x00008000 0x0000000a 0x0000000a 0x0000000a
2479f126890aSEmmanuel Vadot					0x0000000a 0x0000000a 0x0000000a 0x0000000a
2480f126890aSEmmanuel Vadot					0x0000000a 0x00000000 0x00000000 0x00000000
2481f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2482f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2483f126890aSEmmanuel Vadot					0x00000000 0x00000000 0x00000000 0x00000000
2484f126890aSEmmanuel Vadot					0x00000000 0x0000000c 0x0000000c 0x0000000c
2485f126890aSEmmanuel Vadot					0x0000000c 0x000a0220 0x0800003d 0x00000000
2486f126890aSEmmanuel Vadot					0x77ffc004 0x01f1f408 0x00000000 0x00000007
2487f126890aSEmmanuel Vadot					0x08000068 0x08000000 0x00000802 0x00064000
2488f126890aSEmmanuel Vadot					0x000000c0 0x000e000e 0xa0f10000 0x00000000
2489f126890aSEmmanuel Vadot					0x00000000 0x800010d9 0xe0000000 0xff00ff88 >;
2490f126890aSEmmanuel Vadot			};
2491f126890aSEmmanuel Vadot		};
2492f126890aSEmmanuel Vadot	};
2493f126890aSEmmanuel Vadot
2494f126890aSEmmanuel Vadot	hda@70030000 {
2495f126890aSEmmanuel Vadot		status = "okay";
2496f126890aSEmmanuel Vadot	};
2497f126890aSEmmanuel Vadot
2498f126890aSEmmanuel Vadot	ahub@70080000 {
2499f126890aSEmmanuel Vadot		i2s@70080400 { /* i2s1 */
2500f126890aSEmmanuel Vadot			status = "okay";
2501f126890aSEmmanuel Vadot		};
2502f126890aSEmmanuel Vadot
2503f126890aSEmmanuel Vadot		/* BT SCO */
2504f126890aSEmmanuel Vadot		i2s@70080600 { /* i2s3 */
2505f126890aSEmmanuel Vadot			status = "okay";
2506f126890aSEmmanuel Vadot		};
2507f126890aSEmmanuel Vadot	};
2508f126890aSEmmanuel Vadot
2509f126890aSEmmanuel Vadot	sdmmc1: mmc@78000000 {
2510f126890aSEmmanuel Vadot		status = "okay";
2511f126890aSEmmanuel Vadot
2512f126890aSEmmanuel Vadot		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
2513f126890aSEmmanuel Vadot		bus-width = <4>;
2514f126890aSEmmanuel Vadot
2515f126890aSEmmanuel Vadot		vmmc-supply = <&vdd_usd>; /* ldo2 */
2516f126890aSEmmanuel Vadot		vqmmc-supply = <&vddio_usd>; /* ldo3 */
2517f126890aSEmmanuel Vadot	};
2518f126890aSEmmanuel Vadot
2519f126890aSEmmanuel Vadot	sdmmc3: mmc@78000400 {
2520f126890aSEmmanuel Vadot		status = "okay";
2521f126890aSEmmanuel Vadot
2522f126890aSEmmanuel Vadot		#address-cells = <1>;
2523f126890aSEmmanuel Vadot		#size-cells = <0>;
2524f126890aSEmmanuel Vadot
2525f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
2526f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
2527f126890aSEmmanuel Vadot		assigned-clock-rates = <50000000>;
2528f126890aSEmmanuel Vadot
2529f126890aSEmmanuel Vadot		max-frequency = <50000000>;
2530f126890aSEmmanuel Vadot		keep-power-in-suspend;
2531f126890aSEmmanuel Vadot		bus-width = <4>;
2532f126890aSEmmanuel Vadot		non-removable;
2533f126890aSEmmanuel Vadot
2534f126890aSEmmanuel Vadot		mmc-pwrseq = <&brcm_wifi_pwrseq>;
2535f126890aSEmmanuel Vadot		vmmc-supply = <&vdd_3v3_sys>;
2536f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_1v8_vio>;
2537f126890aSEmmanuel Vadot
2538f126890aSEmmanuel Vadot		/* Azurewave AW-AH663 BCM4330B1 */
2539f126890aSEmmanuel Vadot		wifi@1 {
2540f126890aSEmmanuel Vadot			compatible = "brcm,bcm4329-fmac";
2541f126890aSEmmanuel Vadot			reg = <1>;
2542f126890aSEmmanuel Vadot
2543f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
2544f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
2545f126890aSEmmanuel Vadot			interrupt-names = "host-wake";
2546f126890aSEmmanuel Vadot		};
2547f126890aSEmmanuel Vadot	};
2548f126890aSEmmanuel Vadot
2549f126890aSEmmanuel Vadot	sdmmc4: mmc@78000600 {
2550f126890aSEmmanuel Vadot		status = "okay";
2551f126890aSEmmanuel Vadot		bus-width = <8>;
2552f126890aSEmmanuel Vadot		vmmc-supply = <&vcore_emmc>;
2553f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_1v8_vio>;
2554f126890aSEmmanuel Vadot		non-removable;
2555f126890aSEmmanuel Vadot	};
2556f126890aSEmmanuel Vadot
2557f126890aSEmmanuel Vadot	usb@7d000000 {
2558f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-udc";
2559f126890aSEmmanuel Vadot		status = "okay";
2560f126890aSEmmanuel Vadot		dr_mode = "otg";
2561f126890aSEmmanuel Vadot		vbus-supply = <&vdd_vbus_usb1>;
2562f126890aSEmmanuel Vadot	};
2563f126890aSEmmanuel Vadot
2564f126890aSEmmanuel Vadot	usb-phy@7d000000 {
2565f126890aSEmmanuel Vadot		status = "okay";
2566f126890aSEmmanuel Vadot		dr_mode = "otg";
2567f126890aSEmmanuel Vadot		nvidia,hssync-start-delay = <0>;
2568f126890aSEmmanuel Vadot		nvidia,xcvr-lsfslew = <2>;
2569f126890aSEmmanuel Vadot		nvidia,xcvr-lsrslew = <2>;
2570f126890aSEmmanuel Vadot	};
2571f126890aSEmmanuel Vadot
2572f126890aSEmmanuel Vadot	usb@7d008000 {
2573f126890aSEmmanuel Vadot		status = "okay";
2574f126890aSEmmanuel Vadot	};
2575f126890aSEmmanuel Vadot
2576f126890aSEmmanuel Vadot	usb-phy@7d008000 {
2577f126890aSEmmanuel Vadot		status = "okay";
2578f126890aSEmmanuel Vadot		vbus-supply = <&vdd_vbus_usb3>;
2579f126890aSEmmanuel Vadot	};
2580f126890aSEmmanuel Vadot
2581f126890aSEmmanuel Vadot	mains: ac-adapter-detect {
2582f126890aSEmmanuel Vadot		compatible = "gpio-charger";
2583f126890aSEmmanuel Vadot		charger-type = "mains";
2584f126890aSEmmanuel Vadot		gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
2585f126890aSEmmanuel Vadot	};
2586f126890aSEmmanuel Vadot
2587f126890aSEmmanuel Vadot	backlight: backlight {
2588f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
2589f126890aSEmmanuel Vadot
2590f126890aSEmmanuel Vadot		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
2591f126890aSEmmanuel Vadot		power-supply = <&vdd_5v0_bl>;
2592f126890aSEmmanuel Vadot		pwms = <&pwm 0 5000000>;
2593f126890aSEmmanuel Vadot
2594f126890aSEmmanuel Vadot		brightness-levels = <1 255>;
2595f126890aSEmmanuel Vadot		num-interpolated-steps = <254>;
2596f126890aSEmmanuel Vadot		default-brightness-level = <15>;
2597f126890aSEmmanuel Vadot	};
2598f126890aSEmmanuel Vadot
2599f126890aSEmmanuel Vadot	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
2600f126890aSEmmanuel Vadot	clk32k_in: clock-32k {
2601f126890aSEmmanuel Vadot		compatible = "fixed-clock";
2602f126890aSEmmanuel Vadot		#clock-cells = <0>;
2603f126890aSEmmanuel Vadot		clock-frequency = <32768>;
2604f126890aSEmmanuel Vadot		clock-output-names = "pmic-oscillator";
2605f126890aSEmmanuel Vadot	};
2606f126890aSEmmanuel Vadot
2607f126890aSEmmanuel Vadot	cpus {
2608f126890aSEmmanuel Vadot		cpu0: cpu@0 {
2609f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
2610f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
2611f126890aSEmmanuel Vadot			#cooling-cells = <2>;
2612f126890aSEmmanuel Vadot		};
2613f126890aSEmmanuel Vadot		cpu1: cpu@1 {
2614f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
2615f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
2616f126890aSEmmanuel Vadot			#cooling-cells = <2>;
2617f126890aSEmmanuel Vadot		};
2618f126890aSEmmanuel Vadot		cpu2: cpu@2 {
2619f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
2620f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
2621f126890aSEmmanuel Vadot			#cooling-cells = <2>;
2622f126890aSEmmanuel Vadot		};
2623f126890aSEmmanuel Vadot		cpu3: cpu@3 {
2624f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
2625f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
2626f126890aSEmmanuel Vadot			#cooling-cells = <2>;
2627f126890aSEmmanuel Vadot		};
2628f126890aSEmmanuel Vadot	};
2629f126890aSEmmanuel Vadot
2630f126890aSEmmanuel Vadot	display-panel {
2631*aa1a8ff2SEmmanuel Vadot		compatible = "hannstar,hsd101pww2", "panel-lvds";
2632f126890aSEmmanuel Vadot
2633f126890aSEmmanuel Vadot		width-mm = <217>;
2634f126890aSEmmanuel Vadot		height-mm = <136>;
2635f126890aSEmmanuel Vadot
2636f126890aSEmmanuel Vadot		data-mapping = "jeida-24";
2637f126890aSEmmanuel Vadot
2638f126890aSEmmanuel Vadot		panel-timing {
2639f126890aSEmmanuel Vadot			/* 1280x800@60Hz */
2640f126890aSEmmanuel Vadot			clock-frequency = <68000000>;
2641f126890aSEmmanuel Vadot			hactive = <1280>;
2642f126890aSEmmanuel Vadot			vactive = <800>;
2643f126890aSEmmanuel Vadot			hfront-porch = <48>;
2644f126890aSEmmanuel Vadot			hback-porch = <18>;
2645f126890aSEmmanuel Vadot			hsync-len = <30>;
2646f126890aSEmmanuel Vadot			vsync-len = <5>;
2647f126890aSEmmanuel Vadot			vfront-porch = <3>;
2648f126890aSEmmanuel Vadot			vback-porch = <12>;
2649f126890aSEmmanuel Vadot		};
2650f126890aSEmmanuel Vadot	};
2651f126890aSEmmanuel Vadot
2652f126890aSEmmanuel Vadot	extcon-keys {
2653f126890aSEmmanuel Vadot		compatible = "gpio-keys";
2654f126890aSEmmanuel Vadot
2655f126890aSEmmanuel Vadot		switch-dock-insert {
2656f126890aSEmmanuel Vadot			label = "Chagall Dock";
2657f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>;
2658f126890aSEmmanuel Vadot			linux,input-type = <EV_SW>;
2659f126890aSEmmanuel Vadot			linux,code = <SW_DOCK>;
2660f126890aSEmmanuel Vadot			debounce-interval = <10>;
2661f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
2662f126890aSEmmanuel Vadot			wakeup-source;
2663f126890aSEmmanuel Vadot		};
2664f126890aSEmmanuel Vadot
2665f126890aSEmmanuel Vadot		switch-lineout-detect {
2666f126890aSEmmanuel Vadot			label = "Audio dock line-out detect";
2667f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(S, 3) GPIO_ACTIVE_LOW>;
2668f126890aSEmmanuel Vadot			linux,input-type = <EV_SW>;
2669f126890aSEmmanuel Vadot			linux,code = <SW_LINEOUT_INSERT>;
2670f126890aSEmmanuel Vadot			debounce-interval = <10>;
2671f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
2672f126890aSEmmanuel Vadot			wakeup-source;
2673f126890aSEmmanuel Vadot		};
2674f126890aSEmmanuel Vadot	};
2675f126890aSEmmanuel Vadot
2676f126890aSEmmanuel Vadot	gpio-keys {
2677f126890aSEmmanuel Vadot		compatible = "gpio-keys";
2678f126890aSEmmanuel Vadot
2679f126890aSEmmanuel Vadot		key-power {
2680f126890aSEmmanuel Vadot			label = "Power";
2681f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
2682f126890aSEmmanuel Vadot			linux,code = <KEY_POWER>;
2683f126890aSEmmanuel Vadot			debounce-interval = <10>;
2684f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
2685f126890aSEmmanuel Vadot			wakeup-source;
2686f126890aSEmmanuel Vadot		};
2687f126890aSEmmanuel Vadot
2688f126890aSEmmanuel Vadot		key-volume-down {
2689f126890aSEmmanuel Vadot			label = "Volume Down";
2690f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 1) GPIO_ACTIVE_LOW>;
2691f126890aSEmmanuel Vadot			linux,code = <KEY_VOLUMEDOWN>;
2692f126890aSEmmanuel Vadot			debounce-interval = <10>;
2693f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
2694f126890aSEmmanuel Vadot			wakeup-source;
2695f126890aSEmmanuel Vadot		};
2696f126890aSEmmanuel Vadot
2697f126890aSEmmanuel Vadot		key-volume-up {
2698f126890aSEmmanuel Vadot			label = "Volume Up";
2699f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
2700f126890aSEmmanuel Vadot			linux,code = <KEY_VOLUMEUP>;
2701f126890aSEmmanuel Vadot			debounce-interval = <10>;
2702f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
2703f126890aSEmmanuel Vadot			wakeup-source;
2704f126890aSEmmanuel Vadot		};
2705f126890aSEmmanuel Vadot	};
2706f126890aSEmmanuel Vadot
2707f126890aSEmmanuel Vadot	haptic-feedback {
2708f126890aSEmmanuel Vadot		compatible = "gpio-vibrator";
2709f126890aSEmmanuel Vadot		enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
2710f126890aSEmmanuel Vadot		vcc-supply = <&vdd_3v3_sys>;
2711f126890aSEmmanuel Vadot	};
2712f126890aSEmmanuel Vadot
2713f126890aSEmmanuel Vadot	opp-table-actmon {
2714f126890aSEmmanuel Vadot		/delete-node/ opp-625000000;
2715f126890aSEmmanuel Vadot		/delete-node/ opp-667000000;
2716f126890aSEmmanuel Vadot		/delete-node/ opp-750000000;
2717f126890aSEmmanuel Vadot		/delete-node/ opp-800000000;
2718f126890aSEmmanuel Vadot		/delete-node/ opp-900000000;
2719f126890aSEmmanuel Vadot	};
2720f126890aSEmmanuel Vadot
2721f126890aSEmmanuel Vadot	opp-table-emc {
2722f126890aSEmmanuel Vadot		/delete-node/ opp-625000000-1200;
2723f126890aSEmmanuel Vadot		/delete-node/ opp-625000000-1250;
2724f126890aSEmmanuel Vadot		/delete-node/ opp-667000000-1200;
2725f126890aSEmmanuel Vadot		/delete-node/ opp-750000000-1300;
2726f126890aSEmmanuel Vadot		/delete-node/ opp-800000000-1300;
2727f126890aSEmmanuel Vadot		/delete-node/ opp-900000000-1350;
2728f126890aSEmmanuel Vadot	};
2729f126890aSEmmanuel Vadot
2730f126890aSEmmanuel Vadot	brcm_wifi_pwrseq: pwrseq-wifi {
2731f126890aSEmmanuel Vadot		compatible = "mmc-pwrseq-simple";
2732f126890aSEmmanuel Vadot
2733f126890aSEmmanuel Vadot		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
2734f126890aSEmmanuel Vadot		clock-names = "ext_clock";
2735f126890aSEmmanuel Vadot
2736f126890aSEmmanuel Vadot		reset-gpios = <&gpio TEGRA_GPIO(D, 3) GPIO_ACTIVE_LOW>;
2737f126890aSEmmanuel Vadot		post-power-on-delay-ms = <300>;
2738f126890aSEmmanuel Vadot		power-off-delay-us = <300>;
2739f126890aSEmmanuel Vadot	};
2740f126890aSEmmanuel Vadot
2741f126890aSEmmanuel Vadot	sound {
2742f126890aSEmmanuel Vadot		compatible = "pegatron,tegra-audio-wm8903-chagall",
2743f126890aSEmmanuel Vadot			     "nvidia,tegra-audio-wm8903";
2744f126890aSEmmanuel Vadot		nvidia,model = "Pegatron Chagall WM8903";
2745f126890aSEmmanuel Vadot
2746f126890aSEmmanuel Vadot		nvidia,audio-routing =
2747f126890aSEmmanuel Vadot			"Headphone Jack", "HPOUTR",
2748f126890aSEmmanuel Vadot			"Headphone Jack", "HPOUTL",
2749f126890aSEmmanuel Vadot			"Int Spk", "ROP",
2750f126890aSEmmanuel Vadot			"Int Spk", "RON",
2751f126890aSEmmanuel Vadot			"Int Spk", "LOP",
2752f126890aSEmmanuel Vadot			"Int Spk", "LON",
2753f126890aSEmmanuel Vadot			"IN1R", "Mic Jack",
2754f126890aSEmmanuel Vadot			"DMICDAT", "Int Mic";
2755f126890aSEmmanuel Vadot
2756f126890aSEmmanuel Vadot		nvidia,i2s-controller = <&tegra_i2s1>;
2757f126890aSEmmanuel Vadot		nvidia,audio-codec = <&wm8903>;
2758f126890aSEmmanuel Vadot
2759f126890aSEmmanuel Vadot		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
2760f126890aSEmmanuel Vadot		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
2761f126890aSEmmanuel Vadot		nvidia,headset;
2762f126890aSEmmanuel Vadot
2763f126890aSEmmanuel Vadot		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
2764f126890aSEmmanuel Vadot			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2765f126890aSEmmanuel Vadot			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2766f126890aSEmmanuel Vadot		clock-names = "pll_a", "pll_a_out0", "mclk";
2767f126890aSEmmanuel Vadot
2768f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
2769f126890aSEmmanuel Vadot				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2770f126890aSEmmanuel Vadot
2771f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2772f126890aSEmmanuel Vadot					 <&tegra_car TEGRA30_CLK_EXTERN1>;
2773f126890aSEmmanuel Vadot	};
2774f126890aSEmmanuel Vadot
2775f126890aSEmmanuel Vadot	thermal-zones {
2776f126890aSEmmanuel Vadot		/*
2777f126890aSEmmanuel Vadot		 * NCT72 has two sensors:
2778f126890aSEmmanuel Vadot		 *
2779f126890aSEmmanuel Vadot		 *	0: internal that monitors ambient/skin temperature
2780f126890aSEmmanuel Vadot		 *	1: external that is connected to the CPU's diode
2781f126890aSEmmanuel Vadot		 *
2782f126890aSEmmanuel Vadot		 * Ideally we should use userspace thermal governor,
2783f126890aSEmmanuel Vadot		 * but it's a much more complex solution.  The "skin"
2784f126890aSEmmanuel Vadot		 * zone exists as a simpler solution which prevents
2785f126890aSEmmanuel Vadot		 * Chagall from getting too hot from a user's tactile
2786f126890aSEmmanuel Vadot		 * perspective. The CPU zone is intended to protect
2787f126890aSEmmanuel Vadot		 * silicon from damage.
2788f126890aSEmmanuel Vadot		 */
2789f126890aSEmmanuel Vadot
2790f126890aSEmmanuel Vadot		skin-thermal {
2791f126890aSEmmanuel Vadot			polling-delay-passive = <1000>; /* milliseconds */
2792f126890aSEmmanuel Vadot			polling-delay = <5000>; /* milliseconds */
2793f126890aSEmmanuel Vadot
2794f126890aSEmmanuel Vadot			thermal-sensors = <&nct72 0>;
2795f126890aSEmmanuel Vadot
2796f126890aSEmmanuel Vadot			trips {
2797f126890aSEmmanuel Vadot				trip0: skin-alert {
2798f126890aSEmmanuel Vadot					/* throttle at 57C until temperature drops to 56.8C */
2799f126890aSEmmanuel Vadot					temperature = <57000>;
2800f126890aSEmmanuel Vadot					hysteresis = <200>;
2801f126890aSEmmanuel Vadot					type = "passive";
2802f126890aSEmmanuel Vadot				};
2803f126890aSEmmanuel Vadot
2804f126890aSEmmanuel Vadot				trip1: skin-crit {
2805f126890aSEmmanuel Vadot					/* shut down at 65C */
2806f126890aSEmmanuel Vadot					temperature = <65000>;
2807f126890aSEmmanuel Vadot					hysteresis = <2000>;
2808f126890aSEmmanuel Vadot					type = "critical";
2809f126890aSEmmanuel Vadot				};
2810f126890aSEmmanuel Vadot			};
2811f126890aSEmmanuel Vadot
2812f126890aSEmmanuel Vadot			cooling-maps {
2813f126890aSEmmanuel Vadot				map0 {
2814f126890aSEmmanuel Vadot					trip = <&trip0>;
2815f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2816f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2817f126890aSEmmanuel Vadot							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2818f126890aSEmmanuel Vadot							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2819f126890aSEmmanuel Vadot							 <&actmon THERMAL_NO_LIMIT
2820f126890aSEmmanuel Vadot								  THERMAL_NO_LIMIT>;
2821f126890aSEmmanuel Vadot				};
2822f126890aSEmmanuel Vadot			};
2823f126890aSEmmanuel Vadot		};
2824f126890aSEmmanuel Vadot
2825f126890aSEmmanuel Vadot		cpu-thermal {
2826f126890aSEmmanuel Vadot			polling-delay-passive = <1000>; /* milliseconds */
2827f126890aSEmmanuel Vadot			polling-delay = <5000>; /* milliseconds */
2828f126890aSEmmanuel Vadot
2829f126890aSEmmanuel Vadot			thermal-sensors = <&nct72 1>;
2830f126890aSEmmanuel Vadot
2831f126890aSEmmanuel Vadot			trips {
2832f126890aSEmmanuel Vadot				trip2: cpu-alert {
2833f126890aSEmmanuel Vadot					/* throttle at 85C until temperature drops to 84.8C */
2834f126890aSEmmanuel Vadot					temperature = <85000>;
2835f126890aSEmmanuel Vadot					hysteresis = <200>;
2836f126890aSEmmanuel Vadot					type = "passive";
2837f126890aSEmmanuel Vadot				};
2838f126890aSEmmanuel Vadot
2839f126890aSEmmanuel Vadot				trip3: cpu-crit {
2840f126890aSEmmanuel Vadot					/* shut down at 90C */
2841f126890aSEmmanuel Vadot					temperature = <90000>;
2842f126890aSEmmanuel Vadot					hysteresis = <2000>;
2843f126890aSEmmanuel Vadot					type = "critical";
2844f126890aSEmmanuel Vadot				};
2845f126890aSEmmanuel Vadot			};
2846f126890aSEmmanuel Vadot
2847f126890aSEmmanuel Vadot			cooling-maps {
2848f126890aSEmmanuel Vadot				map1 {
2849f126890aSEmmanuel Vadot					trip = <&trip2>;
2850f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2851f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2852f126890aSEmmanuel Vadot							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2853f126890aSEmmanuel Vadot							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
2854f126890aSEmmanuel Vadot							 <&actmon THERMAL_NO_LIMIT
2855f126890aSEmmanuel Vadot								  THERMAL_NO_LIMIT>;
2856f126890aSEmmanuel Vadot				};
2857f126890aSEmmanuel Vadot			};
2858f126890aSEmmanuel Vadot		};
2859f126890aSEmmanuel Vadot	};
2860f126890aSEmmanuel Vadot};
2861