Home
last modified time | relevance | path

Searched +full:spin +full:- +full:table (Results 1 – 25 of 130) sorted by relevance

123456

/freebsd-src/sys/contrib/device-tree/src/arm64/arm/
H A Dfoundation-v8-spin-table.dtsi4 * ARMv8 Foundation model DTS (spin table configuration)
8 enable-method = "spin-table";
9 cpu-release-addr = <0x0 0x8000fff8>;
13 enable-method = "spin-table";
14 cpu-release-addr = <0x0 0x8000fff8>;
18 enable-method = "spin-table";
19 cpu-release-addr = <0x0 0x8000fff8>;
23 enable-method = "spin-table";
24 cpu-release-addr = <0x0 0x8000fff8>;
H A Drtsm_ve-aemv8a.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Architecture Envelope Model (AEM) ARMv8-A
11 /dts-v1/;
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include "rtsm_ve-motherboard.dtsi"
22 interrupt-paren
[all...]
H A Dfoundation-v8.dts1 // SPDX-License-Identifier: GPL-2.0
8 #include "foundation-v8.dtsi"
9 #include "foundation-v8-gicv2.dtsi"
10 #include "foundation-v8-spin-table.dtsi"
H A Dfoundation-v8-gicv3.dts1 // SPDX-License-Identifier: GPL-2.0
8 #include "foundation-v8.dtsi"
9 #include "foundation-v8-gicv3.dtsi"
10 #include "foundation-v8-spin-table.dtsi"
/freebsd-src/sys/contrib/device-tree/Bindings/arm/
H A Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bi
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/cpu/
H A Dcpu-topology.txt6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
39 2 - cpu-map node
42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
46 - cpu-map node
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/apple/
H A Dt6002.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
15 #include "multi-die-cpp.h"
17 #include "t600x-common.dtsi"
20 compatible = "apple,t6002", "apple,arm-platform";
22 #address-cells = <2>;
23 #size-cells = <2>;
[all …]
H A Dt600x-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
18 cpu-map {
63 enable-method = "spin-table";
64 cpu-release-addr = <0 0>; /* To be filled by loader */
65 next-level-cache = <&l2_cache_0>;
66 i-cache-size = <0x20000>;
[all …]
H A Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
23 #size-cells = <0>;
[all …]
H A Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/altera/
H A Dsocfpga_stratix10_swvp.dts1 // SPDX-License-Identifier: GPL-2.0
10 compatible = "altr,socfpga-stratix10-swvp", "altr,socfpga-stratix10";
27 stdout-path = "serial1:115200n8";
28 linux,initrd-start = <0x10000000>;
29 linux,initrd-end = <0x125c8324>;
39 enable-method = "spin-table";
40 cpu-release-addr = <0x0 0x0000fff8>;
44 enable-method = "spin-table";
45 cpu-release-addr = <0x0 0x0000fff8>;
49 enable-method = "spin-table";
[all …]
/freebsd-src/share/man/man9/
H A Dlocking.91 .\" Copyright (c) 2007 Julian Elischer (julian - freebsd org )
45 then a thread attempting to acquire the mutex will spin rather than yielding
52 .Ss Spin Mutexes
53 Spin mutexes are a variation of basic mutexes; the main difference between
54 the two is that spin mutexes never block.
55 Instead, they spin while waiting for the lock to be released.
56 To avoid deadlock, a thread that holds a spin mutex must never yield its CPU.
57 Unlike ordinary mutexes, spin mutexes disable interrupts when acquired.
60 Spin mutexes should be used only when absolutely necessary,
98 .Ss Read-Mostly Locks
[all …]
H A DLOCK_PROFILING.91 .\"-
2 .\" Copyright (c) 2004 Dag-Erling Smørgrav
50 .Bl -bullet
59 The total number of non-recursive acquisitions.
62 when this point was reached, requiring a spin or a sleep.
77 .Bl -tag -width indent
86 .Bl -tag -width ".Va cnt_hold"
114 The number of acquisition points that were ignored after the table
117 Disable or enable the lock profiling code for the spin locks.
118 This defaults to 0 (do profiling for the spin locks).
[all …]
H A Dsleepqueue.91 .\" Copyright (c) 2000-2004 John H. Baldwin <jhb@FreeBSD.org>
95 The implementation of each wait channel splits its sleepqueue into 2 sub-queues
116 Active sleep queues are stored in a hash table hashed on the addresses pointed
118 Each bucket in the hash table contains a sleep queue chain.
119 A sleep queue chain contains a spin mutex and a list of sleep queues that hash
121 Active sleep queues are protected by their chain's spin mutex.
124 function initializes the hash table of sleep queue chains.
180 parameter specifies the sub-queue, in which the contending thread will be
185 .Bl -tag -width ".Dv SLEEPQ_CONDVAR" -compact
201 .Bl -tag -width ".Dv SLEEPQ_INTERRUPTIBLE" -compact
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Ds32v234.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2015-2016 Freescale Semiconductor, Inc.
4 * Copyright 2016-2018 NXP
7 #include <dt-bindings/interrupt-controller/arm-gi
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
10 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
12 local_intc: interrupt-controller@40000000 {
13 compatible = "brcm,bcm2836-l1-intc";
15 interrupt-controller;
16 #interrupt-cells = <2>;
17 interrupt-parent = <&local_intc>;
21 arm-pmu {
22 compatible = "arm,cortex-a5
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/microchip/
H A Dsparx5_pcb_common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
14 enable-method = "spin-table";
18 enable-method = "spin-table";
/freebsd-src/sys/contrib/device-tree/src/arm64/toshiba/
H A Dtmpv7708.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * (C) Copyright 2018 - 2020, Toshiba Corporation.
10 #include <dt-bindings/clock/toshiba,tmpv770x.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gi
[all...]
/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Diss4xx-mpic.dts15 /dts-v1/;
20 #address-cells = <2>;
21 #size-cells = <1>;
22 model = "ibm,iss-4xx";
23 compatible = "ibm,iss-4xx";
24 dcr-parent = <&{/cpus/cpu@0}>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/broadcom/bcm4908/
H A Dbcm4908.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/phy/phy.h>
6 #include <dt-bindings/soc/bcm-pmb.h>
8 /dts-v1/;
11 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
21 stdout-path = "serial0:115200n8";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/apm/
H A Dapm-shadowcat.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Shadowcat SOC
9 compatible = "apm,xgene-shadowcat";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cell
[all...]
H A Dapm-storm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cell
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/broadcom/bcmbca/
H A Dbcm4908.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gi
[all...]
/freebsd-src/sys/arm/annapurna/alpine/
H A Dalpine_pci_msix.c1 /*-
48 #define ERR_NOT_IN_MAP -1
66 {"annapurna-labs,al-msix", true},
67 {"annapurna-labs,alpine-msix", true},
97 /* Table of isrcs maps isrc pointer to vmem_alloc'd irq number */
120 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in al_msix_probe()
123 device_set_desc(dev, "Annapurna-Labs MSI- in al_msix_probe()
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8939.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,gcc-msm8939.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-binding
[all...]

123456