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/freebsd-src/sys/contrib/device-tree/Bindings/net/dsa/
H A Drealtek-smi.txt1 Realtek SMI-based Switches
4 The SMI "Simple Management Interface" is a two-wire protocol using
5 bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does
6 not use the MDIO protocol. This binding defines how to specify the
7 SMI-based Realtek devices.
11 - compatible: must be exactly one of:
23 - mdc-gpios: GPIO line for the MDC clock line.
24 - mdio-gpios: GPIO line for the MDIO data line.
25 - reset-gpios: GPIO line for the reset signal.
28 - realtek,disable-leds: if the LED drivers are not used in the
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H A Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dmarvell-orion-mdio.txt1 * Marvell MDIO Ethernet Controller interface
5 identical unit that provides an interface with the MDIO bus.
11 - compatible: "marvell,orion-mdio" or "marvell,xmdio"
12 - reg: address and length of the MDIO registers. When an interrupt is
13 not present, the length is the size of the SMI register (4 bytes)
18 - interrupts: interrupt line number for the SMI error/done interrupt
19 - clocks: phandle for up to four required clocks for the MDIO instance
21 The child nodes of the MDIO driver are the individual PHY devices
22 connected to this MDIO bus. They must have a "reg" property given the
23 PHY address on the MDIO bus.
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H A Dcavium-mdio.txt1 * System Management Interface (SMI) / MDIO
4 - compatible: One of:
6 "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX
9 "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.
11 - reg: The base address of the MDIO bus controller register bank.
13 - #address-cells: Must be <1>.
15 - #size-cells: Must be <0>. MDIO addresses have no size component.
17 Typically an MDIO bus might have several children.
20 mdio@1180000001800 {
21 compatible = "cavium,octeon-3860-mdio";
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/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmarvell,armada-98dx3236-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl"
8 - reg: register specifier of MPP registers
18 mpp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0)
45 mpp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1)
46 mpp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1)
H A Dmarvell,armada-39x-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,88f6920-pinctrl", "marvell,88f6925-pinctrl" or
8 "marvell,88f6928-pinctrl" depending on the specific variant of the
10 - reg: register specifier of MPP registers
22 mpp4 4 gpio, ua1(txd), ua0(rts), smi(mdc)
23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
24 mpp6 6 gpio, dev(cs3), xsmi(mdio)
35 mpp17 17 gpio, ua1(rxd), spi0(sck), sata1(prsnt) [1], sata0(prsnt) [1], smi(mdio)
38 mpp20 20 gpio, sata0(prsnt) [1], ua0(rts), ua1(txd), smi(mdc)
/freebsd-src/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm47094-asus-rt-ac88u.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "bcm47094-asus-rt-ac3100.dtsi"
11 compatible = "asus,rt-ac88
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/freebsd-src/sys/contrib/device-tree/src/arm/gemini/
H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D4
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/freebsd-src/sys/dev/vnic/
H A Dthunder_mdio.c1 /*-
126 MALLOC_DEFINE(M_THUNDER_MDIO, "ThunderX MDIO",
127 "Cavium ThunderX MDIO dynamic memory");
130 mtx_init(&(sc)->mtx, name, NULL, MTX_DEF)
133 mtx_destroy(&(sc)->mtx)
135 #define MDIO_LOCK(sc) mtx_lock(&(sc)->mtx)
136 #define MDIO_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
139 mtx_assert(&(sc)->mtx, MA_OWNED)
142 bus_read_8((sc)->reg_base, (reg))
145 bus_write_8((sc)->reg_bas
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H A Dthunder_mdio_var.h1 /*-
33 #define THUNDER_MDIO_DEVSTR "Cavium ThunderX SMI/MDIO driver"
/freebsd-src/share/man/man4/
H A Dadm6996fc.41 .\"-
33 .Cd "device mdio"
42 This driver use smi interface by ethernet interface.
H A De6060sw.41 .\"-
33 .Cd "device mdio"
42 This driver use smi interface by ethernet interface.
/freebsd-src/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cell
355 mdio: mdio@32004 { global() label
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H A Darmada-8040-clearfog-gt-8k.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-8040.dtsi"
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/gpio/gpio.h>
16 compatible = "solidrun,clearfog-gt-8k", "marvell,armada8040",
17 "marvell,armada-ap806-quad", "marvell,armada-ap806";
20 stdout-path = "serial0:115200n8";
35 compatible = "pwm-fan";
37 cooling-levels = <0 51 102 153 204 255>;
38 #cooling-cells = <2>;
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/freebsd-src/sys/dev/etherswitch/e6000sw/
H A De6060sw.c1 /*-
2 * Copyright (c) 2016-2017 Hiroki Mori
4 * Copyright (c) 2011-2012 Stefan Bethke.
60 #include <dev/mdio/mdio.h>
135 mtx_lock(&(_sc)->sc_mtx)
137 mtx_unlock(&(_sc)->sc_mtx)
139 mtx_assert(&(_sc)->sc_mtx, (_what))
141 mtx_trylock(&(_sc)->sc_mtx)
180 sc->sw_mode in e6060sw_probe()
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/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Ddove-cm-a510.dtsi2 * Device Tree include for Compulab CM-A510 System-on-Module
6 * This file is dual-licensed: you can use it either under the terms
46 * The CM-A510 comes with several optional components:
56 * E1: PHY RTL8211D on internal GbE (SMI address 0x03)
66 * U2: 2 dual-role USB2.0 ports
70 * W: Broadcom BCM4319 802.11b/g/n (USI WM-N-BM-01 on SDIO1)
72 * GPIOs used on CM-A510:
86 model = "Compulab CM-A510";
87 compatible = "compulab,cm-a510", "marvell,dove";
99 compatible = "gpio-leds";
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/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Dcharon.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
12 /dts-v1/;
17 #address-cells = <1>;
18 #size-cells = <1>;
19 interrupt-parent = <&mpc5200_pic>;
22 #address-cells = <1>;
23 #size-cells = <0>;
28 d-cache-line-size = <32>;
29 i-cache-line-size = <32>;
30 d-cache-size = <0x4000>; // L1, 16K
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/freebsd-src/sys/dev/mge/
H A Dif_mge.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (C) 2009-2015 Semihalf
76 #include <dev/mdio/mdio.h>
85 #define MGE_DELAY(x) pause("SMI access sleep", (x) / tick_sbt)
166 /* MDIO interfac
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/freebsd-src/sys/dev/neta/
H A Dif_mvneta.c71 #include <dev/mdio/mdio.h>
191 #define mvneta_sc_lock(sc) mtx_lock(&sc->mtx)
192 #define mvneta_sc_unlock(sc) mtx_unlock(&sc->mtx)
209 /* MDIO interface */
220 DRIVER_MODULE(mdio, mvneta, mdio_driver, 0, 0);
221 MODULE_DEPEND(mvneta, mdio, 1, 1, 1);
284 "rx_frame_1_64", "Frame Size 1 - 64"},
286 "rx_frame_65_127", "Frame Size 65 - 127"},
288 "rx_frame_128_255", "Frame Size 128 - 25
879 uint32_t smi, val; mvneta_miibus_readreg() local
947 uint32_t smi; mvneta_miibus_writereg() local
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/freebsd-src/sys/dev/etherswitch/rtl8366/
H A Drtl8366rb.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Hiroki Mori.
5 * Copyright (c) 2011-2012 Stefan Bethke.
57 #include <dev/mdio/mdio.h>
70 int smi_acquired; /* serialize access to SMI/I2
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/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controlle
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/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dstih407-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "st-pincfg.h"
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 /* 0-5: PIO_SBC */
18 /* 10-1
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/freebsd-src/sys/dev/cxgb/common/
H A Dcxgb_vsc8211.c2 SPDX-License-Identifier: BSD-2-Clause
57 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
135 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
145 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
208 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status_fiber()
218 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status_fiber()
272 * Enable/disable auto MDI/MDI-X in forced link speed mode.
404 struct cphy *phy = &portinfo->phy; in t3_vsc8211_fifo_depth()
431 struct cphy *phy = &pinfo->phy; in t3_vsc8211_phy_prep()
435 cphy_init(&pinfo->phy, pinfo->adapter, pinfo, phy_addr, &vsc8211_ops, mdio_ops, in t3_vsc8211_phy_prep()
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/freebsd-src/sys/dev/msk/
H A Dif_mskreg.h17 * are provided to you under the BSD-type license terms provided
22 * - Redistributions of source code must retain the above copyright
24 * - Redistributions in binary form must reproduce the above
28 * - Neither the name of Marvell nor the names of its contributors
48 /*-
49 * SPDX-License-Identifier: BSD-4-Clause AND BSD-3-Clause
65 * 4. Neither the name of the author nor the names of any co-contributors
82 /*-
110 * D-Link PCI vendor ID
154 * D-Link gigabit ethernet device ID
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/freebsd-src/sys/dev/axgbe/
H A Dif_axgbe_pci.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
54 #include "xgbe-common.h"
138 * MSI-X table bar (BAR5) to iflib. iflib will do the allocation for MSI-X
144 { -1, 0 }
320 struct xgbe_prv_data *pdata = &sc->pdat in axgbe_miibus_readreg()
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