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/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Drenesas,intc-irqpin.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,intc-irqpin.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - enum:
16 - renesas,intc-irqpin-r8a7740 # R-Mobile A1
17 - renesas,intc-irqpin-r8a7778 # R-Car M1A
18 - renesas,intc-irqpin-r8a7779 # R-Car H1
19 - renesas,intc-irqpin-sh73a0 # SH-Mobile AG5
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/freebsd-src/contrib/llvm-project/clang/lib/AST/
H A DRecordLayoutBuilder.cpp1 //=== RecordLayoutBuilder.cpp - Helper class for building record layouts ---==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===--
3014 unsigned Width = FD->getBitWidthValue(Context); layoutBitField() local
3574 PrintBitFieldOffset(raw_ostream & OS,CharUnits Offset,unsigned Begin,unsigned Width,unsigned IndentLevel) PrintBitFieldOffset() argument
3684 unsigned Width = Field.getBitWidthValue(C); DumpRecordLayout() local
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H A DASTContext.cpp1 //===- ASTContext.cpp - Context to hold long-lived AST nodes -------
1771 uint64_t Width = EltInfo.Width.getQuantity() * Size; getConstantArrayInfoInChars() local
1882 uint64_t Width = 0; getTypeInfoImpl() local
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/freebsd-src/contrib/llvm-project/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/
H A DAppleObjCTypeEncodingParser.cpp1 //===-- AppleObjCTypeEncodingParser.cpp --------
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/freebsd-src/share/misc/
H A Dscsi_modes35 # 'i' is a byte-sized integral types, followed by a field width of
38 # 'b' is a bit-sized integral type
39 # 't' is a bitfield type- followed by a bit field width
42 # 'z' values are null-padded strings
81 {Extended Self-Test Completion Time} i2
92 {Maximum Sense Data Length} i1
95 0x02 "Disconnect-Reconnect" {
111 0x16 "Extended Device-Type Specific";
154 0x18 "Protocol-Specific Logical Unit";
156 0x19 "Protocol-Specific Port";
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/freebsd-src/share/man/man9/
H A Dbus_dma.9170 API is a bus, device, and machine-independent (MI) interface to
182 For example, if a DMA engine in a device is limited to 32-bit addresses,
190 For example, a device might require 16-byte alignment of its descriptor ring
201 The per-group tags can then inherit these restrictions from this
203 tag rather than having to list them explicitly when creating the per-group tags.
234 Sync operations also handle architecture-specific details such as CPU cache
239 Static transactions are used with a long-lived memory region that is reused
285 to track the mappings of any in-flight transactions.
315 .Bl -tag -width indent
317 A machine-dependent (MD) opaque type that describes the
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstructions.h1 //===- llvm/Instructions.h - Instruction subclass definitions ---*- C++ -*-===//
5 // SPDX-License-Identifie
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/freebsd-src/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7778.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M1A (R8A77781) SoC
14 #include <dt-bindings/clock/r8a7778-clock.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-binding
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H A Dr8a7779.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H1 (R8A77790) SoC
9 #include <dt-bindings/clock/r8a7779-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-binding
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/freebsd-src/sys/contrib/xen/
H A Dxen.h30 #include "xen-compat.h"
33 #include "arch-x86/xen.h"
35 #include "arch-arm.h"
135 /* Architecture-specific hypercall definitions. */
157 /* New event-channel and physdev hypercalls introduced in 0x00030202. */
175 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
176 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
178 * allocated to VCPU0 but can subsequently be re-bound.
195 /* Architecture-specific VIRQ definitions. */
223 * x != 0 => PFD == x - 1
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/freebsd-src/contrib/llvm-project/clang/lib/Sema/
H A DSemaChecking.cpp1 //===- SemaChecking.cpp - Extra Semantic Checking --------
14030 unsigned Width; global() member
14488 if (const auto *BitField = E->getSourceBitField()) GetExprRange() local
14999 AnalyzeBitFieldAssignment(Sema & S,FieldDecl * Bitfield,Expr * Init,SourceLocation InitLoc) AnalyzeBitFieldAssignment() argument
15144 if (FieldDecl *Bitfield = E->getLHS()->getSourceBitField()) { AnalyzeAssignment() local
17562 CheckBitFieldInitialization(SourceLocation InitLoc,FieldDecl * BitField,Expr * Init) CheckBitFieldInitialization() argument
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DX86.cpp1 //===- X86.cpp ---------
2081 bool BitField = i->isBitField(); classify() local
3195 uint64_t Width = getContext().getTypeSize(Ty); EmitMSVAArg() local
3228 uint64_t Width = Info.Width; classify() local
3397 uint64_t Width = getContext().getTypeSize(Ty); EmitVAArg() local
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/freebsd-src/contrib/llvm-project/clang/include/clang/AST/
H A DASTContext.h1 //===- ASTContext.h - Context to hold long-lived AST nodes ------*-
153 uint64_t Width = 0; global() member
167 CharUnits Width; global() member
2987 unsigned Width = getIntWidth(Type); MakeIntValue() local
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H A DType.h1 //===- Type.h - C Language Family Type Representation --------
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H A DDeclBase.h1 //===- DeclBase.h - Base Classes for representing declarations --*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.
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/freebsd-src/contrib/llvm-project/clang/lib/Basic/Targets/
H A DARM.cpp1 //===--- ARM.cpp - Implement ARM target feature support ------
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonConstPropagation.cpp1 //===- HexagonConstPropagation.cpp ----------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
55 // of bits make sense, for example Zero and NonZero are mutually exclusive,
102 // Lattice cell, based on that was described in the W-Z paper on constant
201 // Mapping: vreg -> cell
221 // All non-virtual registers are considered "bottom". in has()
233 return F->second; in get()
289 // as well as some helper functions that are target-independent.
298 // - A set of three "evaluate" functions. Each returns "true" if the
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1 //===-- AArch64ISelDAGToDAG.cpp - A dag to dag inst selector for AArch64 --===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===-
2400 unsigned Width = cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits(); isBitfieldExtractOpFromSExtInReg() local
2737 uint64_t Width = MSB - Imm + 1; getUsefulBitsFromBFM() local
2754 uint64_t Width = MSB + 1; getUsefulBitsFromBFM() local
2895 isBitfieldPositioningOp(SelectionDAG * CurDAG,SDValue Op,bool BiggerPattern,SDValue & Src,int & DstLSB,int & Width) isBitfieldPositioningOp() argument
2927 isBitfieldPositioningOpFromAnd(SelectionDAG * CurDAG,SDValue Op,bool BiggerPattern,const uint64_t NonZeroBits,SDValue & Src,int & DstLSB,int & Width) isBitfieldPositioningOpFromAnd() argument
3015 isSeveralBitsPositioningOpFromShl(const uint64_t ShlImm,SDValue Op,SDValue & Src,int & DstLSB,int & Width) isSeveralBitsPositioningOpFromShl() argument
3049 isBitfieldPositioningOpFromShl(SelectionDAG * CurDAG,SDValue Op,bool BiggerPattern,const uint64_t NonZeroBits,SDValue & Src,int & DstLSB,int & Width) isBitfieldPositioningOpFromShl() argument
3133 int Width = BitWidth - APInt(BitWidth, NotKnownZero).popcount(); tryBitfieldInsertOpFromOrAndImm() local
3394 int DstLSB, Width; tryBitfieldInsertOpFromOr() local
3489 int Width = BitWidth - APInt(BitWidth, Mask0Imm).popcount(); tryBitfieldInsertOpFromOr() local
3554 int DstLSB, Width; tryBitfieldInsertInZeroOp() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp1 //===- AMDGPURegisterBankInfo.cpp ---------
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/
H A DCGDebugInfo.cpp1 //===--- CGDebugInfo.cpp - Emit Debug Information for a Module ------
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DSROA.cpp1 //===- SROA.cpp - Scalar Replacement Of Aggregates --------
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineAndOrXor.cpp1 //===- InstCombineAndOrXor.cpp ---------
2059 unsigned Width = Ty->getScalarSizeInBits(); canonicalizeLogicFirst() local
2274 unsigned Width = Ty->getScalarSizeInBits(); visitAnd() local
2734 unsigned Width = Or.getType()->getScalarSizeInBits(); matchFunnelShift() local
2767 __anon4f77c6d20d02(Value *L, Value *R, unsigned Width) matchFunnelShift() argument
2915 unsigned Width = Ty->getScalarSizeInBits(); matchOrConcat() local
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H A DInstCombineLoadStoreAlloca.cpp1 //===- InstCombineLoadStoreAlloca.cpp ---------
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/freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DSimplifyLibCalls.cpp1 //===------ SimplifyLibCalls.cpp - Library calls simplifier ---
1456 unsigned char Width = NextPowerOf2(std::max((unsigned char)7, Max)); optimizeMemChr() local
1459 APInt Bitfield(Width, 0); optimizeMemChr() local
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/freebsd-src/contrib/llvm-project/lldb/source/Plugins/TypeSystem/Clang/
H A DTypeSystemClang.cpp1 //===-- TypeSystemClang.cpp --------
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