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/freebsd-src/sys/contrib/device-tree/Bindings/rtc/
H A Disil,isl12026.txt5 at bus address 0x57. The canonical "reg" value will be for the RTC portion.
9 - "compatible": must be "isil,isl12026"
10 - "reg": I2C bus address of the device (always 0x6f)
14 - "isil,pwr-bsw": If present PWR.BSW bit must be set to the specified
17 - "isil,pwr-sbib": If present PWR.SBIB bit must be set to the specified
25 reg = <0x6f>;
26 isil,pwr-bsw = <0>;
27 isil,pwr-sbib = <1>;
/freebsd-src/sys/contrib/device-tree/Bindings/regulator/
H A Dst,stm32mp1-pwr-reg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pw
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/freebsd-src/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/freebsd-src/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pm
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/freebsd-src/sys/contrib/device-tree/Bindings/gpu/
H A Dnvidia,gk20a.txt4 - compatible: "nvidia,<gpu>"
6 - nvidia,gk20a
7 - nvidia,gm20b
8 - nvidia,gp10b
9 - nvidia,gv11b
10 - reg: Physical base address and length of the controller's registers.
12 - first entry for bar0
13 - second entry for bar1
14 - interrupts: Must contain an entry for each entry in interrupt-names.
15 See ../interrupt-controller/interrupts.txt for details.
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/freebsd-src/sys/contrib/device-tree/Bindings/ata/
H A Dahci-st.txt6 - compatible : Must be "st,ahci"
7 - reg : Physical base addresses and length of register sets
8 - interrupts : Interrupt associated with the SATA device
9 - interrupt-names : Associated name must be; "hostc"
10 - clocks : The phandle for the clock
11 - clock-names : Associated name must be; "ahci_clk"
12 - phys : The phandle for the PHY port
13 - phy-names : Associated name must be; "ahci_phy"
16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dbrcm,iproc-gpio.txt5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
[all …]
H A Dbrcm,nsp-gpio.txt4 - compatible:
5 Must be "brcm,nsp-gpio-a"
7 - reg:
11 - #gpio-cells:
16 - gpio-controller:
19 - ngpios:
23 - interrupts:
26 - interrupt-controller:
29 - gpio-ranges:
30 Specifies the mapping between gpio controller and pin-controllers pins.
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/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-xp-synology-ds414.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
12 * were delivered with an older version of u-boot that left internal
17 * installing it from u-boot prompt) or adjust the Devive Tree
21 /dts-v1/;
23 #include <dt-bindings/input/input.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "armada-xp-mv78230.dtsi"
29 compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30 "marvell,armadaxp", "marvell,armada-370-xp";
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H A Darmada-388-gp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * (RD-88F6820-GP)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 /dts-v1/;
12 #include "armada-388.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Marvell Armada 388 DB-88F6820-GP";
17 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380";
20 stdout-path = "serial0:115200n8";
25 reg = <0x00000000 0x80000000>; /* 2 GB */
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H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-1
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H A Darmada-370-dlink-dns327l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
30 reg = <0x00000000 0x20000000>; /* 512 MiB */
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H A Darmada-370-mirabox.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include "armada-370.dtsi"
14 compatible = "globalscale,mirabox", "marvell,armada370", "marvell,armada-370-xp";
17 stdout-path = "serial0:115200n8";
22 reg = <0x00000000 0x20000000>; /* 512 MB */
30 internal-regs {
35 clock-frequency = <600000000>;
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/freebsd-src/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray-board-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright(c) 2016-2018 Broadcom
7 #include <dt-bindings/gpio/gpio.h>
18 stdout-path = "serial0:115200n8";
23 reg = <0x00000000 0x80000000 0x0 0x80000000>, /* 2G @ 2G */
28 phy-mode = "rgmii-id";
29 phy-handle = <&gphy0>;
37 non-removable;
38 full-pwr-cycle;
42 full-pwr-cycle;
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx53-cx9020.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * based on imx53-qsb.dts
7 /dts-v1/;
15 stdout-path = &uart2;
20 reg = <0x70000000 0x20000000>,
24 display-0 {
25 #address-cells = <1>;
26 #size-cells = <0>;
27 compatible = "fsl,imx-parallel-display";
28 interface-pix-fmt = "rgb24";
[all …]
/freebsd-src/sys/arm/nvidia/tegra124/
H A Dtegra124_pmc.c1 /*-
135 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, (_r), (_v))
136 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, (_r))
138 #define PMC_LOCK(_sc) mtx_lock(&(_sc)->mtx)
139 #define PMC_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
140 #define PMC_LOCK_INIT(_sc) mtx_init(&(_sc)->mtx, \
141 device_get_nameunit(_sc->dev), "tegra124_pmc", MTX_DEF)
142 #define PMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx);
143 #define PMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED);
144 #define PMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->mtx, MA_NOTOWNED);
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/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8150-sony-xperia-kumano.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 /delete-node/ &cdsp_mem;
17 /delete-node/ &gpu_mem;
18 /delete-node/ &ipa_fw_mem;
19 /delete-node/ &ipa_gsi_mem;
20 /delete-node/ &mpss_mem;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/pci/
H A Drcar-gen4-pci-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Renesas Electronics Corp.
4 ---
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H A Drcar-gen4-pci-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022-2023 Renesas Electronics Corp.
4 ---
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/freebsd-src/sys/dev/rtwn/rtl8192c/
H A Dr92c_chan.c3 /*-
62 if (sc->sc_debug & RTWN_DEBUG_TXPWR) { in r92c_get_power_group()
87 for (i = 0; i < sc->ntxchains; i++) { in r92c_get_txpower()
89 "TX [%d]: MCS%d-%d: %d %d %d %d %d %d %d %d\n", in r92c_get_txpower()
119 return (-1); in r92c_get_txpower()
122 KASSERT(0, ("wrong channel band (flags %08X)\n", c->ic_flags)); in r92c_get_txpower()
123 return (-1); in r92c_get_txpower()
134 const struct ieee80211com *ic = &sc->sc_ic; in r92c_get_txpower()
135 struct r92c_softc *rs = sc->sc_priv; in r92c_get_txpower()
136 struct rtwn_r92c_txpwr *rt = rs->rs_txpw in r92c_get_txpower()
159 uint32_t reg; r92c_write_txpower() local
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/freebsd-src/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3066a-rayeager.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
12 compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
22 reg = <0x60000000 0x40000000>;
25 ir: ir-receiver {
26 compatible = "gpio-ir-receiver";
28 pinctrl-names = "default";
29 pinctrl-0 = <&ir_int>;
32 keys: gpio-keys {
[all …]
/freebsd-src/sys/arm64/nvidia/tegra210/
H A Dtegra210_pmc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
142 #define PMC_LOCK(_sc) mtx_lock(&(_sc)->mtx)
143 #define PMC_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
144 #define PMC_LOCK_INIT(_sc) mtx_init(&(_sc)->mtx, \
145 device_get_nameunit(_sc->dev), "tegra210_pmc", MTX_DEF)
146 #define PMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mt
222 uint32_t reg; tegra210_pmc_set_powergate() local
263 uint32_t reg; tegra_powergate_remove_clamping() local
306 uint32_t reg; tegra_powergate_is_powered() local
546 uint32_t reg; tegra210_pmc_attach() local
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/freebsd-src/sys/contrib/device-tree/Bindings/usb/
H A Dfsl-usb.txt9 - compatible : Should be "fsl-usb2-mph" for multi port host USB
10 controllers, or "fsl-usb2-dr" for dual role USB controllers
11 or "fsl,mpc5121-usb2-dr" for dual role USB controllers of MPC5121.
13 also be mentioned (for eg. fsl-usb2-dr-v2.2 for bsc9132).
14 - phy_type : For multi port host USB controllers, should be one of
17 - reg : Offset and length of the register set for the device
18 - port0 : boolean; if defined, indicates port0 is connected for
19 fsl-usb2-mph compatible controllers. Either this property or
20 "port1" (or both) must be defined for "fsl-usb2-mph" compatible
22 - port1 : boolean; if defined, indicates port1 is connected for
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lp55xx.txt4 - compatible: one of
11 - reg: I2C slave address
12 - clock-mode: Input clock mode, (0: automode, 1: internal, 2: external)
15 - led-cur: Current setting at each led channel (mA x10, 0 if led is not connected)
16 - max-cur: Maximun current at each led channel.
19 - enable-gpio: GPIO attached to the chip's enable pin
20 - label: Used for naming LEDs
21 - pwr-sel: LP8501 specific property. Power selection for output channels.
28 - chan-name (optional): name of channel
29 - linux,default-trigger (optional): see
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nspire/
H A Dnspire.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&intc>;
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,arm926ej-
194 pwr: pwr@900b0000 { global() label
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