Lines Matching +full:pwr +full:- +full:reg
3 /*-
62 if (sc->sc_debug & RTWN_DEBUG_TXPWR) {
87 for (i = 0; i < sc->ntxchains; i++) {
89 "TX [%d]: MCS%d-%d: %d %d %d %d %d %d %d %d\n",
119 return (-1);
122 KASSERT(0, ("wrong channel band (flags %08X)\n", c->ic_flags));
123 return (-1);
134 const struct ieee80211com *ic = &sc->sc_ic;
135 struct r92c_softc *rs = sc->sc_priv;
136 struct rtwn_r92c_txpwr *rt = rs->rs_txpwr;
137 const struct rtwn_r92c_txagc *base = rs->rs_txagc;
143 if (group == -1) { /* shouldn't happen */
144 device_printf(sc->sc_dev, "%s: incorrect channel\n", __func__);
155 max_mcs = RTWN_RIDX_HT_MCS(sc->ntxchains * 8 - 1);
158 if (rs->regulatory == 0) {
160 power[ridx] = base[chain].pwr[0][ridx];
163 if (rs->regulatory == 3) {
164 power[ridx] = base[chain].pwr[0][ridx];
167 max = rt->ht40_max_pwr[chain][group];
169 max = rt->ht20_max_pwr[chain][group];
172 } else if (rs->regulatory == 1) {
174 power[ridx] = base[chain].pwr[group][ridx];
175 } else if (rs->regulatory != 2)
176 power[ridx] = base[chain].pwr[0][ridx];
179 /* Compute per-CCK rate Tx power. */
181 power[ridx] += rt->cck_tx_pwr[chain][group];
183 htpow = rt->ht40_1s_tx_pwr[chain][group];
184 if (sc->ntxchains > 1) {
186 diff = rt->ht40_2s_tx_pwr_diff[chain][group];
187 htpow = (htpow > diff) ? htpow - diff : 0;
190 /* Compute per-OFDM rate Tx power. */
191 diff = rt->ofdm_tx_pwr_diff[chain][group];
192 ofdmpow = htpow + diff; /* HT->OFDM correction. */
196 /* Compute per-MCS Tx power. */
198 diff = rt->ht20_tx_pwr_diff[chain][group];
199 htpow += diff; /* HT40->HT20 correction. */
209 if (power[ridx] > ic->ic_txpowlimit)
210 power[ridx] = ic->ic_txpowlimit;
219 uint32_t reg;
221 /* Write per-CCK rate Tx power. */
223 reg = rtwn_bb_read(sc, R92C_TXAGC_A_CCK1_MCS32);
224 reg = RW(reg, R92C_TXAGC_A_CCK1, power[RTWN_RIDX_CCK1]);
225 rtwn_bb_write(sc, R92C_TXAGC_A_CCK1_MCS32, reg);
226 reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11);
227 reg = RW(reg, R92C_TXAGC_A_CCK2, power[RTWN_RIDX_CCK2]);
228 reg = RW(reg, R92C_TXAGC_A_CCK55, power[RTWN_RIDX_CCK55]);
229 reg = RW(reg, R92C_TXAGC_A_CCK11, power[RTWN_RIDX_CCK11]);
230 rtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg);
232 reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK1_55_MCS32);
233 reg = RW(reg, R92C_TXAGC_B_CCK1, power[RTWN_RIDX_CCK1]);
234 reg = RW(reg, R92C_TXAGC_B_CCK2, power[RTWN_RIDX_CCK2]);
235 reg = RW(reg, R92C_TXAGC_B_CCK55, power[RTWN_RIDX_CCK55]);
236 rtwn_bb_write(sc, R92C_TXAGC_B_CCK1_55_MCS32, reg);
237 reg = rtwn_bb_read(sc, R92C_TXAGC_B_CCK11_A_CCK2_11);
238 reg = RW(reg, R92C_TXAGC_B_CCK11, power[RTWN_RIDX_CCK11]);
239 rtwn_bb_write(sc, R92C_TXAGC_B_CCK11_A_CCK2_11, reg);
241 /* Write per-OFDM rate Tx power. */
252 /* Write per-MCS Tx power. */
263 if (sc->ntxchains >= 2) {
283 for (i = 0; i < sc->ntxchains; i++) {
285 /* Compute per-rate Tx power values. */
289 /* Write per-rate Tx power values to hardware. */
302 if (vap->iv_bss == NULL)
304 if (vap->iv_bss->ni_chan == IEEE80211_CHAN_ANYC)
308 r92c_set_txpower(sc, vap->iv_bss->ni_chan);
316 struct r92c_softc *rs = sc->sc_priv;
339 (rs->rf_chnlbw[0] & ~0xfff) | chan);
345 struct r92c_softc *rs = sc->sc_priv;
357 (rs->rf_chnlbw[0] & ~0xfff) | chan | R92C_RF_CHNLBW_BW20);
363 struct r92c_softc *rs = sc->sc_priv;
372 for (i = 0; i < sc->nrxchains; i++) {
374 RW(rs->rf_chnlbw[i], R92C_RF_CHNLBW_CHNL, chan));
395 struct rtwn_softc *sc = ic->ic_softc;
396 struct r92c_softc *rs = sc->sc_priv;
403 rs->rs_scan_start(ic);
409 struct rtwn_softc *sc = ic->ic_softc;
410 struct r92c_softc *rs = sc->sc_priv;
417 rs->rs_scan_end(ic);