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/llvm-project/llvm/test/Analysis/CostModel/X86/
H A Dicmp0.ll20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = icmp eq i8 %arg8, 0
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> …
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> …
23 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> …
24 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8…
25 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = icmp eq i16 %arg16, 0
26 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> …
27 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16…
28 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16…
29 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64I16 = icmp eq <64 x i16…
[all …]
H A Darith-int.ll16 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
17 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> und…
18 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = add <4 x i64> und…
19 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = add <8 x i64> und…
20 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
21 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> und…
22 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8I32 = add <8 x i32> und…
23 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16I32 = add <16 x i32> u…
24 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
25 ; SSSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> und…
[all …]
H A Dfcmp.ll18 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fcmp oeq float undef…
19 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F32 = fcmp oeq <2 x floa…
20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F32 = fcmp oeq <4 x floa…
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F32 = fcmp oeq <8 x floa…
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F32 = fcmp oeq <16 x fl…
23 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fcmp oeq double unde…
24 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2F64 = fcmp oeq <2 x doub…
25 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F64 = fcmp oeq <4 x doub…
26 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F64 = fcmp oeq <8 x doub…
27 ; SSE2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F64 = fcmp oeq <16 x d…
[all …]
H A Darith-int-codesize.ll16 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
17 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2I64 = add <2 x i64> undef…
18 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4I64 = add <4 x i64> undef…
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8I64 = add <8 x i64> undef…
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> und…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef…
[all …]
H A Dload_store.ll13 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i8 undef, ptr undef, …
14 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i16 undef, ptr undef,…
15 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i32 undef, ptr undef,…
16 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store i64 undef, ptr undef,…
17 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: store i128 undef, ptr undef…
18 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: store i256 undef, ptr undef…
19 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: store i512 undef, ptr undef…
20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store float undef, ptr unde…
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store double undef, ptr und…
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: store ptr undef, ptr undef,…
[all …]
H A Dextend.ll20 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> unde…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i32> unde…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = zext <8 x i32> unde…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = zext <16 x i32> un…
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V32i64 = zext <32 x i32> u…
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
29 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %I64 = zext i32 undef to i64
30 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i32> und…
31 ; AVX1-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4i64 = zext <4 x i32> und…
[all …]
H A Dicmp.ll20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = icmp eq i8 %arg8, %arg8
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> %argv16i8, %argv16i8
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> %argv32i8, %argv32i8
23 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> %argv64i8, %argv64i8
24 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> %argv128i8, %argv128i8
25 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = icmp eq i16 %arg16, %arg16
26 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> %argv8i16, %argv8i16
27 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> %argv16i16, %argv16i16
28 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> %argv32i16, %argv32i16
29 ; SSE2-NEXT: Cost Model: Found an estimated cost of
[all...]
H A Darith-int-latency.ll16 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
17 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = add <2 x i64> undef…
18 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = add <4 x i64> undef…
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = add <8 x i64> undef…
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> und…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef…
[all …]
H A Darith-int-sizelatency.ll16 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = add i64 undef, undef
17 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2I64 = add <2 x i64> undef…
18 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4I64 = add <4 x i64> undef…
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8I64 = add <8 x i64> undef…
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = add i32 undef, undef
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4I32 = add <4 x i32> undef…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I32 = add <8 x i32> undef…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I32 = add <16 x i32> und…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = add i16 undef, undef
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = add <8 x i16> undef…
[all …]
H A Dfcmp-codesize.ll18 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fcmp oeq float undef,…
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp oeq <2 x float…
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp oeq <4 x float…
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fcmp oeq <8 x float…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fcmp oeq <16 x flo…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fcmp oeq double undef…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp oeq <2 x doubl…
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fcmp oeq <4 x doubl…
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fcmp oeq <8 x doubl…
27 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F64 = fcmp oeq <16 x dou…
[all …]
H A Dfcmp-sizelatency.ll18 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = fcmp oeq float undef,…
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = fcmp oeq <2 x float…
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = fcmp oeq <4 x float…
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = fcmp oeq <8 x float…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = fcmp oeq <16 x flo…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = fcmp oeq double undef…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = fcmp oeq <2 x doubl…
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = fcmp oeq <4 x doubl…
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = fcmp oeq <8 x doubl…
27 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F64 = fcmp oeq <16 x dou…
[all …]
H A Dicmp-codesize.ll20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = icmp eq i8 %arg8, %arg8
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> %argv16i8, %argv16i8
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> %argv32i8, %argv32i8
23 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> %argv64i8, %argv64i8
24 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> %argv128i8, %argv128i8
25 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = icmp eq i16 %arg16, %arg16
26 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> %argv8i16, %argv8i16
27 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> %argv16i16, %argv16i16
28 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> %argv32i16, %argv32i16
29 ; SSE2-NEXT: Cost Model: Found an estimated cost of
[all...]
H A Dicmp-sizelatency.ll20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = icmp eq i8 %arg8, %arg8
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> %argv16i8, %argv16i8
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> %argv32i8, %argv32i8
23 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> %argv64i8, %argv64i8
24 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> %argv128i8, %argv128i8
25 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = icmp eq i16 %arg16, %arg16
26 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> %argv8i16, %argv8i16
27 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> %argv16i16, %argv16i16
28 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> %argv32i16, %argv32i16
29 ; SSE2-NEXT: Cost Model: Found an estimated cost of
[all...]
H A Dtrunc.ll20 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i32
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> und…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = trunc <4 x i64> und…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = trunc <8 x i64> und…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16i64 = trunc <16 x i64> u…
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
28 ; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i…
29 ; AVX1-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> un…
30 ; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = trunc <4 x i64> un…
31 ; AVX1-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V8i64 = trunc <8 x i64> un…
[all …]
H A Dfcmp-latency.ll18 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %F32 = fcmp oeq float undef,…
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2F32 = fcmp oeq <2 x float…
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V4F32 = fcmp oeq <4 x float…
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8F32 = fcmp oeq <8 x floa…
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V16F32 = fcmp oeq <16 x fl…
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %F64 = fcmp oeq double undef…
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2F64 = fcmp oeq <2 x doubl…
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4F64 = fcmp oeq <4 x doub…
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V8F64 = fcmp oeq <8 x doub…
27 ; SSE-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V16F64 = fcmp oeq <16 x do…
[all …]
H A Dicmp-latency.ll20 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = icmp eq i8 %arg8, %arg8
21 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16I8 = icmp eq <16 x i8> %argv16i8, %argv16i8
22 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32I8 = icmp eq <32 x i8> %argv32i8, %argv32i8
23 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64I8 = icmp eq <64 x i8> %argv64i8, %argv64i8
24 ; SSE2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128I8 = icmp eq <128 x i8> %argv128i8, %argv128i8
25 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = icmp eq i16 %arg16, %arg16
26 ; SSE2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8I16 = icmp eq <8 x i16> %argv8i16, %argv8i16
27 ; SSE2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16I16 = icmp eq <16 x i16> %argv16i16, %argv16i16
28 ; SSE2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32I16 = icmp eq <32 x i16> %argv32i16, %argv32i16
29 ; SSE2-NEXT: Cost Model: Found an estimated cost of
[all...]
H A Dvector-insert.ll18 ; SSE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_a = insertelement <2 x double> undef, double undef, i32 %arg
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v2f64_0 = insertelement <2 x double> undef, double undef, i32 0
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_1 = insertelement <2 x double> undef, double undef, i32 1
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f64_a = insertelement <4 x double> undef, double undef, i32 %arg
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v4f64_0 = insertelement <4 x double> undef, double undef, i32 0
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_3 = insertelement <4 x double> undef, double undef, i32 3
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8f64_a = insertelement <8 x double> undef, double undef, i32 %arg
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v8f64_0 = insertelement <8 x double> undef, double undef, i32 0
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_3 = insertelement <8 x double> undef, double undef, i32 3
27 ; SSE-NEXT: Cost Model: Found an estimated cost of
[all...]
H A Dvector-insert-inseltpoison.ll18 ; SSE-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2f64_a = insertelement <2 x double> poison, double undef, i32 %arg
19 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v2f64_0 = insertelement <2 x double> poison, double undef, i32 0
20 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2f64_1 = insertelement <2 x double> poison, double undef, i32 1
21 ; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %v4f64_a = insertelement <4 x double> poison, double undef, i32 %arg
22 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v4f64_0 = insertelement <4 x double> poison, double undef, i32 0
23 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4f64_3 = insertelement <4 x double> poison, double undef, i32 3
24 ; SSE-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %v8f64_a = insertelement <8 x double> poison, double undef, i32 %arg
25 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %v8f64_0 = insertelement <8 x double> poison, double undef, i32 0
26 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v8f64_3 = insertelement <8 x double> poison, double undef, i32 3
27 ; SSE-NEXT: Cost Model: Found an estimated cost of
[all...]
/llvm-project/llvm/test/MC/Disassembler/X86/apx/
H A Dccmp.txt10 # ATT: ccmpoq {dfv=of} %rax, %rbx
11 # INTEL: ccmpo {dfv=of} rbx, rax
26 # ATT: ccmpoq {dfv=of,sf} %rax, %rbx
27 # INTEL: ccmpo {dfv=of,sf} rbx, rax
30 # ATT: ccmpoq {dfv=of,sf,zf} %rax, %rbx
31 # INTEL: ccmpo {dfv=of,sf,zf} rbx, rax
34 # ATT: ccmpoq {dfv=of,sf,zf,cf} %rax, %rbx
35 # INTEL: ccmpo {dfv=of,sf,zf,cf} rbx, rax
40 # ATT: ccmpbb {dfv=of} $123, 123(%r8,%rax,4)
41 # INTEL: ccmpb {dfv=of} byt
[all...]
H A Dctest.txt4 # ATT: ctestbb {dfv=of} $123, 123(%r8,%rax,4)
5 # INTEL: ctestb {dfv=of} byte ptr [r8 + 4*rax + 123], 123
8 # ATT: ctestbw {dfv=of} $1234, 123(%r8,%rax,4)
9 # INTEL: ctestb {dfv=of} word ptr [r8 + 4*rax + 123], 1234
12 # ATT: ctestbl {dfv=of} $123456, 123(%r8,%rax,4)
13 # INTEL: ctestb {dfv=of} dword ptr [r8 + 4*rax + 123], 123456
16 # ATT: ctestbq {dfv=of} $123456, 123(%r8,%rax,4)
17 # INTEL: ctestb {dfv=of} qword ptr [r8 + 4*rax + 123], 123456
20 # ATT: ctestbb {dfv=of} %bl, 123(%r8,%rax,4)
21 # INTEL: ctestb {dfv=of} byte ptr [r8 + 4*rax + 123], bl
[all …]
/llvm-project/llvm/test/MC/X86/apx/
H A Dctest-intel.s3 # CHECK: ctestb {dfv=of} byte ptr [r8 + 4*rax + 123], 123
5 ctestb {dfv=of} byte ptr [r8 + 4*rax + 123], 123
6 # CHECK: ctestb {dfv=of} word ptr [r8 + 4*rax + 123], 1234
8 ctestb {dfv=of} word ptr [r8 + 4*rax + 123], 1234
9 # CHECK: ctestb {dfv=of} qword ptr [r8 + 4*rax + 123], 123456
11 ctestb {dfv=of} qword ptr [r8 + 4*rax + 123], 123456
12 # CHECK: ctestb {dfv=of} dword ptr [r8 + 4*rax + 123], 123456
14 ctestb {dfv=of} dword ptr [r8 + 4*rax + 123], 123456
15 # CHECK: ctestb {dfv=of} byte ptr [r8 + 4*rax + 123], bl
17 ctestb {dfv=of} byt
[all...]
H A Dccmp-att.s11 # CHECK: ccmpoq {dfv=of} %rax, %rbx
13 ccmpoq {dfv=of} %rax, %rbx
23 # CHECK: ccmpoq {dfv=of,sf} %rax, %rbx
25 ccmpoq {dfv=of,sf} %rax, %rbx
26 # CHECK: ccmpoq {dfv=of,sf} %rax, %rbx
28 ccmpoq {dfv=sf,of} %rax, %rbx
29 # CHECK: ccmpoq {dfv=of,sf,zf} %rax, %rbx
31 ccmpoq {dfv=of,sf,zf} %rax, %rbx
32 # CHECK: ccmpoq {dfv=of,sf,zf} %rax, %rbx
34 ccmpoq {dfv=zf,of,s
[all...]
H A Dccmp-intel.s8 # CHECK: ccmpo {dfv=of} rbx, rax
10 ccmpo {dfv=of} rbx, rax
20 # CHECK: ccmpo {dfv=of,sf} rbx, rax
22 ccmpo {dfv=of,sf} rbx, rax
23 # CHECK: ccmpo {dfv=of,sf} rbx, rax
25 ccmpo {dfv=sf,of} rbx, rax
26 # CHECK: ccmpo {dfv=of,sf,zf} rbx, rax
28 ccmpo {dfv=of,sf,zf} rbx, rax
29 # CHECK: ccmpo {dfv=of,sf,zf} rbx, rax
31 ccmpo {dfv=zf,of,s
[all...]
/llvm-project/llvm/test/Analysis/CostModel/ARM/
H A Darith.ll14 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %c = add i1 undef, undef
15 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %d = sub i1 undef, undef
16 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %e = mul i1 undef, undef
17 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %f = ashr i1 undef, undef
18 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %g = lshr i1 undef, undef
19 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %h = shl i1 undef, undef
20 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %i = and i1 undef, undef
21 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %j = or i1 undef, undef
22 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %k = xor i1 undef, undef
23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
[all …]
/llvm-project/llvm/docs/CommandGuide/
H A Dllvm-bcanalyzer.rst16 :program:`llvm-as` tool) and produces a statistical report on the contents of
18 version of the bitcode file. This tool is probably not of much interest or
35 provides details about the encoding of the bitcode file.
39 Print a summary of command line options.
53 **Bitcode Analysis Of Module**
55 This just provides the name of the module for which bitcode analysis is being
60 The bitcode version (not LLVM version) of the file read by the analyzer.
64 The size, in bytes, of the entire bitcode file.
68 The size, in bytes, of the module block. Percentage is relative to File Size.
72 The size, in bytes, of all the function blocks. Percentage is relative to File
[all …]

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