| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | arm,pl353-smc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM PL353 Static Memory Controller (SMC) device-tree bindings
10 - Miquel Raynal <miquel.raynal@bootlin.com>
11 - Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
14 The PL353 Static Memory Controller is a bus where you can connect two kinds
15 of memory interfaces, which are NAND and memory mapped interfaces (such as
23 const: arm,pl353-smc-r2p1
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| H A D | renesas,dbsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas DDR Bus Controllers
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 Renesas SoCs contain one or more memory controllers. These memory
14 controllers differ from one SoC variant to another, and are called by
21 - renesas,dbsc-r8a73a4 # R-Mobile APE6
22 - renesas,dbsc3-r8a7740 # R-Mobile A1
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| H A D | arm,pl35x-smc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm PL35x Series Static Memory Controller (SMC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 The PL35x Static Memory Controller is a bus where you can connect two kinds
14 of memory interfaces, which are NAND and memory mapped interfaces (such as
18 https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa
26 - arm,pl353-smc-r2p1
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| H A D | xlnx,versal-ddrmc-edac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/xlnx,versal-ddrmc-edac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Versal DDRMC (Integrated DDR Memory Controller)
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11 - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
14 The integrated DDR Memory Controllers (DDRMCs) support both DDR4 and LPDDR4/
15 4X memory interfaces. Versal DDR memory controller has an optional ECC support
20 const: xlnx,versal-ddrmc
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| H A D | synopsys,ddrc-ecc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/synopsys,ddrc-ecc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys IntelliDDR Multi Protocol memory controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Manish Narani <manish.narani@xilinx.com>
12 - Michal Simek <michal.simek@xilinx.com>
15 The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and
16 32-bit bus width configurations.
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| H A D | mc-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controller
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| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr-channel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel
24 - jedec,lpddr5-channel
26 io-width:
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| /freebsd-src/sys/contrib/device-tree/Bindings/mips/brcm/ |
| H A D | soc.txt | 5 - compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843"
6 "brcm,bcm3384-viper", "brcm,bcm33843-viper"
12 The experimental -viper variants are for running Linux on the 3384's
16 ----------------
21 = Always-On control block (AON CTRL)
23 This hardware provides control registers for the "always-on" (even in low-power
27 - compatible : should be one of
28 "brcm,bcm7425-aon-ctrl"
29 "brcm,bcm7429-aon-ctrl"
30 "brcm,bcm7435-aon-ctrl" and
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| /freebsd-src/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,brcmstb.txt | 2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
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| /freebsd-src/sys/contrib/device-tree/Bindings/net/ |
| H A D | gpmc-eth.txt | 3 Besides being used to interface with external memory devices, the
4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
5 such as ethernet controllers to processors using the TI GPMC as a data bus.
7 Ethernet controllers connected to TI GPMC are represented as child nodes of
12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
18 Child nodes need to specify the GPMC bus address width using the "bank-width"
20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
21 address width, it supports devices with 32-bit word registers.
23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit
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| /freebsd-src/share/man/man4/ |
| H A D | sym.4 | 3 .\" PCI SCSI controllers.
5 .\" Copyright (C) 1999-2000 Gerard Roudier <groudier@club-internet.fr>
12 .\" This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13 .\" Copyright (C) 1998-1999 Gerard Roudier
16 .\" a port of the FreeBSD ncr driver to Linux-1.2.13.
20 .\" Stefan Esser <se@mi.Uni-Koeln.de>
24 .\" FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
32 .\" ----------------------------------------------------------------------------
67 .Bd -ragged -offset indent
82 .Bd -literal -offset indent
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| H A D | agp.4 | 44 .Bl -tag -width "NVIDIA:" -compact
54 i810, i810-DC100, i810E, i815, 830M, 845G, 845M, 852GM, 852GME, 855GM, 855GME, 865G, 915G and 915GM SVGA controllers
58 nForce and nForce2 AGP controllers
68 .Xr X 7 Pq Pa ports/x11/xorg-docs
69 on the Intel i81x controllers.
77 .Bl -tag -widt
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| H A D | imcsmb.4 | 2 .\" SPDX-License-Identifier: BSD-2-Clause
31 .Nd Intel integrated Memory Controller (iMC) SMBus controller driver
40 .Bd -literal -offset indent
48 support for the SMBus controller functionality in the integrated Memory
49 Controllers (iMCs) embedded in Intel Sandybridge-Xeon, Ivybridge-Xeon,
50 Haswell-Xeon, and Broadwell-Xeon CPUs.
52 each iMC implements two SMBus controllers (iMC-SMBs).
53 The iMC-SMBs are used by the iMCs to read configuration information from the
58 The iMC-SMBs are
60 general-purpose SMBus controllers.
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| H A D | ahc.4 | 37 .Bd -ragged -offset indent
48 .Bd -literal -offset indent
64 .Tn SCSI-Select
72 For systems that store non-volatile settings in a system specific manner
78 many chip-down motherboard configurations.
88 .Bd -ragged -offset indent
89 .Bl -colum
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| H A D | sis.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
56 controllers based on the Silicon Integrated Systems SiS 900
63 The SiS 900 is a 100Mbps Ethernet MAC and MII-compliant transceiver
70 The SiS 900 and SiS 7016 both have a 128-bit multicast hash filter
81 .Bl -tag -width 10baseTXUTP
93 .Sq full-duplex
95 .Sq half-duplex
103 .Sq full-duplex
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| /freebsd-src/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | aspeed-smc.txt | 1 * Aspeed Firmware Memory controller
2 * Aspeed SPI Flash Memory Controller
4 The Firmware Memory Controller in the Aspeed AST2500 SoC supports
8 The two SPI flash memory controllers in the AST2500 each support two
12 - compatible : Should be one of
13 "aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller
14 "aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller
15 "aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller
16 "aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers
18 - reg : the first contains the control register location and length,
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| /freebsd-src/sys/dev/imcsmb/ |
| H A D | imcsmb_pci.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
6 * Copyright (c) 2017-2018 Panasas
52 /* (Sandy,Ivy)bridge-Xeon and (Has,Broad)well-Xeon CPUs contain one or two
53 * "Integrated Memory Controllers" (iMC
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| /freebsd-src/sys/contrib/device-tree/Bindings/dma/ |
| H A D | adi,axi-dmac.txt | 1 Analog Devices AXI-DMAC DMA controller
4 - compatible: Must be "adi,axi-dmac-1.00.a".
5 - reg: Specification for the controllers memory mapped register map.
6 - interrupts: Specification for the controllers interrupt.
7 - clocks: Phandle and specifier to the controllers AXI interface clock
8 - #dma-cells: Must be 1.
10 Required sub-nodes:
11 - adi,channels: This sub-node must contain a sub-node for each DMA channel. For
12 the channel sub-nodes the following bindings apply. They must match the
15 Required properties for adi,channels sub-node:
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| /freebsd-src/sys/i386/conf/ |
| H A D | GENERIC | 2 # GENERIC -- Generic kernel configuration file for FreeBSD/i386
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
42 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
52 options PSEUDOFS # Pseudo-filesystem framework
53 options TMPFS # Efficient memory filesystem
69 options SYSVSHM # SYSV-style shared memory
70 options SYSVMSG # SYSV-styl
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| /freebsd-src/sys/amd64/conf/ |
| H A D | GENERIC | 2 # GENERIC -- Generic kernel configuration file for FreeBSD/amd64
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
23 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
27 options NUMA # Non-Uniform Memory Architecture support
46 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
56 options PSEUDOFS # Pseudo-filesystem framework
57 options TMPFS # Efficient memory filesystem
75 options SYSVSHM # SYSV-styl
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| /freebsd-src/sys/powerpc/conf/ |
| H A D | GENERIC64LE | 2 # GENERIC64LE -- Generic kernel configuration file for FreeBSD/powerpc64le
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
31 options PSERIES # PAPR-compliant systems (e.g. IBM p)
32 options POWERNV # Non-virtualized OpenPOWER systems
37 options NUMA # Non-Uniform Memory Architecture support
53 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
64 options PSEUDOFS # Pseudo-filesyste
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| H A D | GENERIC | 2 # GENERIC -- Generic kernel configuration file for FreeBSD/powerpc
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
25 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
32 options PSERIES # PAPR-compliant systems
48 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
58 options PSEUDOFS # Pseudo-filesystem framework
59 options TMPFS # Efficient memory filesystem
74 options SYSVSHM # SYSV-style shared memory
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| /freebsd-src/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | wd,mbl-gpio.txt | 1 Bindings for the Western Digital's MyBook Live memory-mapped GPIO controllers.
3 The Western Digital MyBook Live has two memory-mapped GPIO controllers.
4 Both GPIO controller only have a single 8-bit data register, where GPIO
8 - compatible: should be "wd,mbl-gpio"
9 - reg-names: must contain
10 "dat" - data register
11 - reg: address + size pairs describing the GPIO register sets;
12 order must correspond with the order of entries in reg-names
13 - #gpio-cells: must be set to 2. The first cell is the pin number and
17 - gpio-controller: Marks the device node as a gpio controller.
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| H A D | gpio-ath79.txt | 4 - compatible: has to be "qca,<soctype>-gpio" and one of the following
6 - "qca,ar7100-gpio"
7 - "qca,ar9340-gpio"
8 - reg: Base address and size of the controllers memory area
9 - gpio-controller : Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two. The first cell is the pin number and the
12 - ngpios: Should be set to the number of GPIOs available on the SoC.
15 - interrupts: Interrupt specifier for the controllers interrupt.
16 - interrupt-controller : Identifies the node as an interrupt controller
17 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
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| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ti/ |
| H A D | emif.txt | 1 * EMIF family of TI SDRAM controllers
3 EMIF - External Memory Interface - is an SDRAM controller used in
6 of the EMIF IP and memory parts attached to it. Certain revisions
11 - compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
12 is the IP revision of the specific EMIF instance. For newer controllers,
14 "ti,emif-am3352"
15 "ti,emif-am4372"
16 "ti,emif-dra7xx"
17 "ti,emif-keystone"
19 - phy-type : <u32> indicating the DDR phy type. Following are the
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