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/freebsd-src/sys/contrib/device-tree/Bindings/riscv/
H A Dextensions.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/riscv/extensions.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V ISA extension
[all...]
H A Dcpus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palme
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/freebsd-src/sys/contrib/device-tree/src/riscv/sophgo/
H A Dsg2042-cpus.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #address-cells = <1>;
9 #size-cells = <0>;
10 timebase-frequency = <50000000>;
12 cpu-map {
259 riscv,isa = "rv64imafdc";
260 riscv,isa-base = "rv64i";
261 riscv,isa-extensions = "i", "m", "a", "f", "d", "c",
265 i-cache-block-size = <64>;
266 i-cache-size = <65536>;
[all …]
H A Dcv18xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/clock/sophgo,cv1800.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cell
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/freebsd-src/sys/riscv/riscv/
H A Didentcpu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
11 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
75 /* Supervisor-mod
148 parse_ext_s(struct cpu_desc * desc,char * isa,int idx,int len) parse_ext_s() argument
180 parse_ext_x(struct cpu_desc * desc __unused,char * isa,int idx,int len) parse_ext_x() argument
194 parse_ext_z(struct cpu_desc * desc __unused,char * isa,int idx,int len) parse_ext_z() argument
210 parse_ext_version(char * isa,int idx,u_int * majorp __unused,u_int * minorp __unused) parse_ext_version() argument
233 parse_riscv_isa(struct cpu_desc * desc,char * isa,int len) parse_riscv_isa() argument
322 char isa[1024]; identify_cpu_features_fdt() local
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/freebsd-src/sys/contrib/device-tree/src/riscv/sifive/
H A Dfu540-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2018-2019 SiFive, Inc */
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu540-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu540-c000", "sifive,fu540";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
[all …]
H A Dfu740-c000.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
6 #include <dt-bindings/clock/sifive-fu740-prci.h>
9 #address-cells = <2>;
10 #size-cells = <2>;
11 compatible = "sifive,fu740-c000", "sifive,fu740";
23 #address-cells = <1>;
24 #size-cells = <0>;
28 i-cache-block-size = <64>;
29 i-cache-sets = <128>;
[all …]
/freebsd-src/crypto/openssl/util/perl/TLSProxy/
H A DCertificateRequest.pm12 use vars '@ISA';
13 push @ISA, 'TLSProxy::Message';
24 my $self = $class->SUPER::new(
32 $self->{extension_data} = "";
42 if (TLSProxy::Proxy->is_tls13()) {
43 my $request_ctx_len = unpack('C', $self->data);
44 my $request_ctx = substr($self->data, $ptr, $request_ctx_len);
47 my $extensions_len = unpack('n', substr($self->data, $ptr));
49 my $extension_data = substr($self->data, $ptr);
53 my %extensions = ();
[all …]
H A DEncryptedExtensions.pm12 use vars '@ISA';
13 push @ISA, 'TLSProxy::Message';
24 my $self = $class->SUPER::new(
32 $self->{extension_data} = "";
41 my $extensions_len = unpack('n', $self->data);
48 $extension_data = substr($self->data, 2);
54 if (length($self->data) != 2) {
59 my %extensions = ();
64 $extensions{$type} = $extdata;
67 $self->extension_data(\%extensions);
[all …]
H A DCertificate.pm12 use vars '@ISA';
13 push @ISA, 'TLSProxy::Message';
24 my $self = $class->SUPER::new(
32 $self->{first_certificate} = "";
33 $self->{extension_data} = "";
34 $self->{remaining_certdata} = "";
43 if (TLSProxy::Proxy->is_tls13()) {
44 my $context_len = unpack('C', $self->data);
45 my $context = substr($self->data, 1, $context_len);
47 my $remdata = substr($self->data, 1 + $context_len);
[all …]
H A DServerHello.pm1 # Copyright 2016-2018 The OpenSSL Project Authors. All Rights Reserved.
12 use vars '@ISA';
13 push @ISA, 'TLSProxy::Message';
29 my $self = $class->SUPER::new(
37 $self->{server_version} = 0;
38 $self->{random} = [];
39 $self->{session_id_len} = 0;
40 $self->{session} = "";
41 $self->{ciphersuite} = 0;
42 $self->{comp_meth} = 0;
[all …]
H A DClientHello.pm12 use vars '@ISA';
13 push @ISA, 'TLSProxy::Message';
24 my $self = $class->SUPER::new(
32 $self->{client_version} = 0;
33 $self->{random} = [];
34 $self->{session_id_len} = 0;
35 $self->{session} = "";
36 $self->{ciphersuite_len} = 0;
37 $self->{ciphersuites} = [];
38 $self->{comp_meth_len} = 0;
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Support/
H A DRISCVISAInfo.cpp
/freebsd-src/sys/contrib/device-tree/src/riscv/microchip/
H A Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cell
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/Support/
H A DARMBuildAttributes.h1 //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 // ELF for the ARM Architecture r2.09 - November 30, 2012
16 //===----------------------------------------------------------------------===//
105 v6S_M = 12, // v6_M with the System extensions
106 v7E_M = 13, // v7_M with DSP extensions
116 Not_Applicable = 0, // pre v7, or cross-profile code
120 SystemProfile = (0x53) // 'S' Application or real-time profile
131 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions)
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H A DRISCVISAInfo.h
/freebsd-src/sys/contrib/device-tree/src/riscv/thead/
H A Dth1520.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
12 #address-cells = <2>;
13 #size-cell
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/freebsd-src/contrib/llvm-project/lld/ELF/Arch/
H A DMipsArchTree.cpp1 //===- MipsArchTree.cpp --------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===---------------------------------------------------------------------===//
11 //===---------------------------------------------------------------------===//
66 assert(!files.empty() && "expected non-empty file list"); in checkFlags()
73 if (config->is64 && f.flags & EF_MIPS_MICROMIPS) in checkFlags()
74 error(toString(f.file) + ": microMIPS 64-bit is not supported"); in checkFlags()
83 error(toString(f.file) + ": -mnan=" + getNanName(nan2) + in checkFlags()
84 " is incompatible with target -mnan=" + getNanName(nan)); in checkFlags()
88 error(toString(f.file) + ": -mfp" + getFpName(fp2) + in checkFlags()
[all …]
/freebsd-src/sys/contrib/device-tree/src/riscv/renesas/
H A Dr9a07g043f.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cell
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/freebsd-src/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7100.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive-jh7100.h>
9 #include <dt-bindings/reset/starfive-jh7100.h>
13 #address-cells = <2>;
14 #size-cell
[all...]
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-cr
[all...]
/freebsd-src/sys/contrib/device-tree/src/riscv/allwinner/
H A Dsun20i-d1s.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cells = <0>;
19 d-cache-block-size = <64>;
20 d-cache-sets = <256>;
21 d-cache-size = <32768>;
22 i-cache-block-size = <64>;
[all …]
/freebsd-src/crypto/openssl/util/perl/
H A Dcheckhandshake.pm2 # Copyright 2015-2018 The OpenSSL Project Authors. All Rights Reserved.
16 our @ISA = 'Exporter';
17 our @EXPORT = qw(@handmessages @extensions checkhandshake);
61 our @extensions = ();
91 # In non-TLSv1.3 we always treat reneg CH and SH like the first CH
102 if (scalar @{$proxy->message_list} > $nextmess) {
103 $message = ${$proxy->message_list}[$nextmess];
112 $chnum++ if $message->mt() == TLSProxy::Message::MT_CLIENT_HELLO;
113 $shnum++ if $message->mt() == TLSProxy::Message::MT_SERVER_HELLO;
115 next if ($message->mt() != TLSProxy::Message::MT_CLIENT_HELLO
[all …]
/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/
H A DRISCVTargetDefEmitter.cpp1 //===- RISCVTargetDefEmitter.cpp - Generate lists of RISC-V CPUs -------
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/freebsd-src/share/man/man4/
H A Dvga.43 .\" Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
45 .Cd hint.vga.0.at="isa"
61 addition, the driver can utilize VESA BIOS extensions if the video card
83 .Bl -tag -width MOUSE
90 It makes the driver perform byte-wide I/O to VGA registers and
99 .Bl -tag -width MOUSE
114 .Bl -tag -width MOUSE
138 .Dl hint.vga.0.at="isa"
175 .An -nosplit

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