Home
last modified time | relevance | path

Searched +full:iommu +full:- +full:map (Results 1 – 25 of 181) sorted by relevance

12345678

/freebsd-src/sys/contrib/device-tree/Bindings/pci/
H A Dpci-iommu.txt2 relationship between PCI(e) devices and IOMMU(s).
17 Requester ID. While a given PCI device can only master through one IOMMU, a
18 root complex may split masters across a set of IOMMUs (e.g. with one IOMMU per
22 and a mechanism is required to map from a PCI device to its IOMMU and sideband
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
33 -------------------
35 - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
39 (rid-base,iommu,iommu-base,length).
41 Any RID r in the interval [rid-base, rid-base + length) is associated with
[all …]
H A Dapple,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/misc/
H A Dfsl,qoriq-mc.txt3 The Freescale Management Complex (fsl-mc) is a hardware resource
5 network-oriented packet processing applications. After the fsl-mc
12 For an overview of the DPAA2 architecture and fsl-mc bus see:
16 same hardware "isolation context" and a 10-bit value called an ICID
21 between ICIDs and IOMMUs, so an iommu-map property is used to define
22 the set of possible ICIDs under a root DPRC and how they map to
23 an IOMMU.
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
28 For arm-smmu binding, see:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/virtio/
H A Diommu.txt1 * virtio IOMMU PCI device
3 When virtio-iommu uses the PCI transport, its programming interface is
5 device tree statically describes the relation between IOMMU and DMA
6 masters. Therefore, the PCI root complex that hosts the virtio-iommu
7 contains a child node representing the IOMMU device explicitly.
11 - compatible: Should be "virtio,pci-iommu"
12 - reg: PCI address of the IOMMU. As defined in the PCI Bus
13 Binding reference [1], the reg property is a five-cell
18 - #iommu-cells: Each platform DMA master managed by the IOMMU is assigned
20 For virtio-iommu, #iommu-cells must be 1.
[all …]
H A Dpci-iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: virtio-iommu device using the virtio-pci transport
10 - Jean-Philippe Brucker <jean-philippe@linaro.org>
13 When virtio-iommu uses the PCI transport, its programming interface is
15 device tree statically describes the relation between IOMMU and DMA
16 masters. Therefore, the PCI root complex that hosts the virtio-iommu
17 contains a child node representing the IOMMU device explicitly.
[all …]
H A Dmmio.txt3 See https://ozlabs.org/~rusty/virtio-spec/ for more details.
7 - compatible: "virtio,mmio" compatibility string
8 - reg: control registers base address and size including configuration space
9 - interrupts: interrupt generated by the device
11 Required properties for virtio-iommu:
13 - #iommu-cells: When the node corresponds to a virtio-iommu device, it is
14 linked to DMA masters using the "iommus" or "iommu-map"
15 properties [1][2]. #iommu-cells specifies the size of the
16 "iommus" property. For virtio-iommu #iommu-cells must be
21 - iommus: If the device accesses memory through an IOMMU, it should
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/bus/
H A Dxlnx,versal-net-cdx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 on run-time.
17 All devices on the CDX bus will have a unique streamid (for IOMMU)
20 are used to configure SMMU and GIC-ITS respectively.
22 iommu-map property is used to define the set of stream ids
23 corresponding to each device and the associated IOMMU.
26 The msi-map property is used to associate the devices with the
[all …]
/freebsd-src/sys/dev/iommu/
H A Dbusdma_iommu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
59 #include <dev/iommu/iommu.h>
63 #include <machine/iommu.h>
64 #include <dev/iommu/busdma_iommu.h>
68 * IOMMU unit
429 struct bus_dmamap_iommu *map; iommu_bus_dmamap_create() local
463 struct bus_dmamap_iommu *map; iommu_bus_dmamap_destroy() local
486 struct bus_dmamap_iommu *map; iommu_bus_dmamem_alloc() local
526 struct bus_dmamap_iommu *map; iommu_bus_dmamem_free() local
546 iommu_bus_dmamap_load_something1(struct bus_dma_tag_iommu * tag,struct bus_dmamap_iommu * map,vm_page_t * ma,int offset,bus_size_t buflen,int flags,bus_dma_segment_t * segs,int * segp,struct iommu_map_entries_tailq * entries) iommu_bus_dmamap_load_something1() argument
633 iommu_bus_dmamap_load_something(struct bus_dma_tag_iommu * tag,struct bus_dmamap_iommu * map,vm_page_t * ma,int offset,bus_size_t buflen,int flags,bus_dma_segment_t * segs,int * segp) iommu_bus_dmamap_load_something() argument
679 struct bus_dmamap_iommu *map; iommu_bus_dmamap_load_ma() local
693 struct bus_dmamap_iommu *map; iommu_bus_dmamap_load_phys() local
744 struct bus_dmamap_iommu *map; iommu_bus_dmamap_load_buffer() local
795 struct bus_dmamap_iommu *map; iommu_bus_dmamap_waitok() local
811 struct bus_dmamap_iommu *map; iommu_bus_dmamap_complete() local
847 struct bus_dmamap_iommu *map; iommu_bus_dmamap_unload() local
890 struct bus_dmamap_iommu *map; iommu_bus_dmamap_load_kmsan() local
924 struct bus_dmamap_iommu *map; iommu_bus_task_dmamap() local
951 iommu_bus_schedule_dmamap(struct iommu_unit * unit,struct bus_dmamap_iommu * map) iommu_bus_schedule_dmamap() argument
997 struct bus_dmamap_iommu *map; bus_dma_iommu_load_ident() local
[all...]
H A Dbusdma_iommu.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <dev/iommu/iommu.h>
35 #include <dev/iommu/iommu_gas.h>
61 #define IOMMU_DMAMAP_INIT(map) mtx_init(&(map)->lock, \ argument
62 "iommu dmamap", NULL, MTX_DEF)
63 #define IOMMU_DMAMAP_DESTROY(map) mtx_destroy(&(map)->lock) argument
64 #define IOMMU_DMAMAP_LOCK(map) mtx_lock(&(map)->lock) argument
65 #define IOMMU_DMAMAP_UNLOCK(map) mtx_unlock(&(map)->lock) argument
H A Diommu.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
37 #include <dev/iommu/iommu_types.h>
62 TAILQ_ENTRY(iommu_map_entry) dmamap_link; /* DMA map entries */
79 /* Busdma delayed map load */
87 * entries. This is a client-controlled quirk to support some
94 int (*map)(struc
88 int (*map)(struct iommu_domain *domain, iommu_gaddr_t base, global() member
102 struct iommu_unit *iommu; /* (c) */ global() member
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/apple/
H A Dt600x-die0.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
[all …]
/freebsd-src/sys/powerpc/pseries/
H A Dplpar_iommu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
42 #include <powerpc/pseries/phyp-hvcall.h>
45 MALLOC_DEFINE(M_PHYPIOMMU, "iommu", "IOMMU data for PAPR LPARs");
55 static int papr_supports_stuff_tce = -1;
65 struct iommu_map *map; member
80 if (ofw_bus_has_prop(p, "ibm,my-dma-window")) in phyp_iommu_set_dma_tag()
82 if (ofw_bus_has_prop(p, "ibm,dma-window")) in phyp_iommu_set_dma_tag()
90 if (OF_getencprop(node, "ibm,#dma-size-cells", &dma_scells, in phyp_iommu_set_dma_tag()
92 OF_searchencprop(node, "#size-cells", &dma_scells, in phyp_iommu_set_dma_tag()
[all …]
/freebsd-src/sys/powerpc/powerpc/
H A Dbusdma_machdep.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 device_t iommu; member
102 #define dmat_alignment(dmat) ((dmat)->alignment)
104 #define dmat_boundary(dmat) ((dmat)->boundary)
105 #define dmat_flags(dmat) ((dmat)->flags)
106 #define dmat_highaddr(dmat) ((dmat)->highadd
375 bus_dmamap_destroy(bus_dma_tag_t dmat,bus_dmamap_t map) bus_dmamap_destroy() argument
461 bus_dmamem_free(bus_dma_tag_t dmat,void * vaddr,bus_dmamap_t map) bus_dmamem_free() argument
473 _bus_dmamap_count_phys(bus_dma_tag_t dmat,bus_dmamap_t map,vm_paddr_t buf,bus_size_t buflen,int flags) _bus_dmamap_count_phys() argument
504 _bus_dmamap_count_pages(bus_dma_tag_t dmat,bus_dmamap_t map,pmap_t pmap,void * buf,bus_size_t buflen,int flags) _bus_dmamap_count_pages() argument
548 _bus_dmamap_load_phys(bus_dma_tag_t dmat,bus_dmamap_t map,vm_paddr_t buf,bus_size_t buflen,int flags,bus_dma_segment_t * segs,int * segp) _bus_dmamap_load_phys() argument
592 _bus_dmamap_load_ma(bus_dma_tag_t dmat,bus_dmamap_t map,struct vm_page ** ma,bus_size_t tlen,int ma_offs,int flags,bus_dma_segment_t * segs,int * segp) _bus_dmamap_load_ma() argument
607 _bus_dmamap_load_buffer(bus_dma_tag_t dmat,bus_dmamap_t map,void * buf,bus_size_t buflen,pmap_t pmap,int flags,bus_dma_segment_t * segs,int * segp) _bus_dmamap_load_buffer() argument
669 _bus_dmamap_waitok(bus_dma_tag_t dmat,bus_dmamap_t map,struct memdesc * mem,bus_dmamap_callback_t * callback,void * callback_arg) _bus_dmamap_waitok() argument
683 _bus_dmamap_complete(bus_dma_tag_t dmat,bus_dmamap_t map,bus_dma_segment_t * segs,int nsegs,int error) _bus_dmamap_complete() argument
707 bus_dmamap_unload(bus_dma_tag_t dmat,bus_dmamap_t map) bus_dmamap_unload() argument
718 bus_dmamap_sync(bus_dma_tag_t dmat,bus_dmamap_t map,bus_dmasync_op_t op) bus_dmamap_sync() argument
779 bus_dma_tag_set_iommu(bus_dma_tag_t tag,device_t iommu,void * cookie) bus_dma_tag_set_iommu() argument
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dreserved-memory.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/reserved-memory.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: /reserved-memory Child Node Common
10 - devicetree-spec@vger.kernel.org
13 Reserved memory is specified as a node under the /reserved-memory node. The
19 Each child of the reserved-memory node specifies one or more regions
25 Following the generic-names recommended practice, node names should
26 reflect the purpose of the node (ie. "framebuffer" or "dma-pool").
[all …]
/freebsd-src/sys/arm64/iommu/
H A Diommu_if.m1 #-
2 # SPDX-License-Identifier: BSD-2-Clause
8 # Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
44 #include <dev/iommu/iommu.h>
52 INTERFACE iommu;
55 # Check if the iommu controller dev is responsible to serve traffic
64 # Map a virtual address VA to a physical address PA.
66 METHOD int map {
86 # Allocate an IOMMU domain.
90 struct iommu_unit *iommu;
[all …]
H A Diommu.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
8 * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
54 #include <dev/iommu/busdma_iommu.h>
63 #include "iommu
77 struct iommu_unit *iommu; global() member
86 struct iommu_unit *iommu; iommu_domain_unmap_buf() local
100 struct iommu_unit *iommu; iommu_domain_map_buf() local
128 iommu_domain_alloc(struct iommu_unit * iommu) iommu_domain_alloc() argument
148 struct iommu_unit *iommu; iommu_domain_free() local
188 struct iommu_unit *iommu; iommu_ctx_alloc() local
207 struct iommu_unit *iommu; iommu_ctx_init() local
232 struct iommu_unit *iommu; iommu_lookup() local
252 struct iommu_unit *iommu; iommu_get_ctx_ofw() local
336 iommu_get_ctx(struct iommu_unit * iommu,device_t requester,uint16_t rid,bool disabled,bool rmrr) iommu_get_ctx() argument
376 iommu_free_ctx_locked(struct iommu_unit * iommu,struct iommu_ctx * ioctx) iommu_free_ctx_locked() argument
392 struct iommu_unit *iommu; iommu_free_ctx() local
444 iommu_register(struct iommu_unit * iommu) iommu_register() argument
463 iommu_unregister(struct iommu_unit * iommu) iommu_unregister() argument
487 struct iommu_unit *iommu; iommu_find() local
[all...]
/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dp5020si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dp3041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dp2041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dp5040si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
H A Dp4080si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cell
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/marvell/
H A Dcn9130-crb-A.dts1 // SPDX-License-Identifier: GPL-2.0+
6 #include "cn9130-crb.dtsi"
9 model = "Marvell Armada CN9130-CRB-A";
14 num-lanes = <4>;
15 num-viewport = <8>;
21 iommu-map =
25 iommu-map-mask = <0x031f>;
30 usb-phy = <&cp0_usb3_0_phy0>;
31 phy-names = "usb";
36 usb-phy = <&cp0_usb3_0_phy1>;
[all …]
H A Darmada-7040.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "armada-ap806-quad.dtsi"
10 #include "armada-70x0.dtsi"
14 compatible = "marvell,armada7040", "marvell,armada-ap806-quad",
15 "marvell,armada-ap806";
19 iommu-map =
23 iommu-map-mask = <0x031f>;
H A Dcn9130-crb-B.dts1 // SPDX-License-Identifier: GPL-2.0+
6 #include "cn9130-crb.dtsi"
9 model = "Marvell Armada CN9130-CRB-B";
14 num-lanes = <1>;
15 num-viewport = <8>;
18 iommu-map =
22 iommu-map-mask = <0x031f>;
27 sata-port@0 {
36 usb-phy = <&cp0_usb3_0_phy0>;
37 phy-names = "usb";
[all …]

12345678