xref: /freebsd-src/sys/contrib/device-tree/Bindings/virtio/pci-iommu.yaml (revision 7ef62cebc2f965b0f640263e179276928885e33d)
1*7ef62cebSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*7ef62cebSEmmanuel Vadot%YAML 1.2
3*7ef62cebSEmmanuel Vadot---
4*7ef62cebSEmmanuel Vadot$id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
5*7ef62cebSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*7ef62cebSEmmanuel Vadot
7*7ef62cebSEmmanuel Vadottitle: virtio-iommu device using the virtio-pci transport
8*7ef62cebSEmmanuel Vadot
9*7ef62cebSEmmanuel Vadotmaintainers:
10*7ef62cebSEmmanuel Vadot  - Jean-Philippe Brucker <jean-philippe@linaro.org>
11*7ef62cebSEmmanuel Vadot
12*7ef62cebSEmmanuel Vadotdescription: |
13*7ef62cebSEmmanuel Vadot  When virtio-iommu uses the PCI transport, its programming interface is
14*7ef62cebSEmmanuel Vadot  discovered dynamically by the PCI probing infrastructure. However the
15*7ef62cebSEmmanuel Vadot  device tree statically describes the relation between IOMMU and DMA
16*7ef62cebSEmmanuel Vadot  masters. Therefore, the PCI root complex that hosts the virtio-iommu
17*7ef62cebSEmmanuel Vadot  contains a child node representing the IOMMU device explicitly.
18*7ef62cebSEmmanuel Vadot
19*7ef62cebSEmmanuel Vadot  DMA from the IOMMU device isn't managed by another IOMMU. Therefore the
20*7ef62cebSEmmanuel Vadot  virtio-iommu node doesn't have an "iommus" property, and is omitted from
21*7ef62cebSEmmanuel Vadot  the iommu-map property of the root complex.
22*7ef62cebSEmmanuel Vadot
23*7ef62cebSEmmanuel Vadotproperties:
24*7ef62cebSEmmanuel Vadot  # If compatible is present, it should contain the vendor and device ID
25*7ef62cebSEmmanuel Vadot  # according to the PCI Bus Binding specification. Since PCI provides
26*7ef62cebSEmmanuel Vadot  # built-in identification methods, compatible is not actually required.
27*7ef62cebSEmmanuel Vadot  compatible:
28*7ef62cebSEmmanuel Vadot    oneOf:
29*7ef62cebSEmmanuel Vadot      - items:
30*7ef62cebSEmmanuel Vadot          - const: virtio,pci-iommu
31*7ef62cebSEmmanuel Vadot          - const: pci1af4,1057
32*7ef62cebSEmmanuel Vadot      - items:
33*7ef62cebSEmmanuel Vadot          - const: pci1af4,1057
34*7ef62cebSEmmanuel Vadot
35*7ef62cebSEmmanuel Vadot  reg:
36*7ef62cebSEmmanuel Vadot    description: |
37*7ef62cebSEmmanuel Vadot      PCI address of the IOMMU. As defined in the PCI Bus Binding
38*7ef62cebSEmmanuel Vadot      reference, the reg property is a five-cell address encoded as (phys.hi
39*7ef62cebSEmmanuel Vadot      phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's
40*7ef62cebSEmmanuel Vadot      BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
41*7ef62cebSEmmanuel Vadot      zero. See Documentation/devicetree/bindings/pci/pci.txt
42*7ef62cebSEmmanuel Vadot
43*7ef62cebSEmmanuel Vadot  '#iommu-cells':
44*7ef62cebSEmmanuel Vadot    const: 1
45*7ef62cebSEmmanuel Vadot
46*7ef62cebSEmmanuel Vadotrequired:
47*7ef62cebSEmmanuel Vadot  - compatible
48*7ef62cebSEmmanuel Vadot  - reg
49*7ef62cebSEmmanuel Vadot  - '#iommu-cells'
50*7ef62cebSEmmanuel Vadot
51*7ef62cebSEmmanuel VadotadditionalProperties: false
52*7ef62cebSEmmanuel Vadot
53*7ef62cebSEmmanuel Vadotexamples:
54*7ef62cebSEmmanuel Vadot  - |
55*7ef62cebSEmmanuel Vadot    bus {
56*7ef62cebSEmmanuel Vadot        #address-cells = <2>;
57*7ef62cebSEmmanuel Vadot        #size-cells = <2>;
58*7ef62cebSEmmanuel Vadot
59*7ef62cebSEmmanuel Vadot        pcie@40000000 {
60*7ef62cebSEmmanuel Vadot            device_type = "pci";
61*7ef62cebSEmmanuel Vadot            #address-cells = <3>;
62*7ef62cebSEmmanuel Vadot            #size-cells = <2>;
63*7ef62cebSEmmanuel Vadot            reg = <0x0 0x40000000  0x0 0x1000000>;
64*7ef62cebSEmmanuel Vadot            ranges = <0x02000000 0x0 0x41000000  0x0 0x41000000  0x0 0x0f000000>;
65*7ef62cebSEmmanuel Vadot
66*7ef62cebSEmmanuel Vadot            /*
67*7ef62cebSEmmanuel Vadot             * The IOMMU manages all functions in this PCI domain except
68*7ef62cebSEmmanuel Vadot             * itself. Omit BDF 00:01.0.
69*7ef62cebSEmmanuel Vadot             */
70*7ef62cebSEmmanuel Vadot            iommu-map = <0x0 &iommu0 0x0 0x8
71*7ef62cebSEmmanuel Vadot                         0x9 &iommu0 0x9 0xfff7>;
72*7ef62cebSEmmanuel Vadot
73*7ef62cebSEmmanuel Vadot            /* The IOMMU programming interface uses slot 00:01.0 */
74*7ef62cebSEmmanuel Vadot            iommu0: iommu@1,0 {
75*7ef62cebSEmmanuel Vadot                compatible = "pci1af4,1057";
76*7ef62cebSEmmanuel Vadot                reg = <0x800 0 0 0 0>;
77*7ef62cebSEmmanuel Vadot                #iommu-cells = <1>;
78*7ef62cebSEmmanuel Vadot            };
79*7ef62cebSEmmanuel Vadot        };
80*7ef62cebSEmmanuel Vadot
81*7ef62cebSEmmanuel Vadot        pcie@50000000 {
82*7ef62cebSEmmanuel Vadot            device_type = "pci";
83*7ef62cebSEmmanuel Vadot            #address-cells = <3>;
84*7ef62cebSEmmanuel Vadot            #size-cells = <2>;
85*7ef62cebSEmmanuel Vadot            reg = <0x0 0x50000000  0x0 0x1000000>;
86*7ef62cebSEmmanuel Vadot            ranges = <0x02000000 0x0 0x51000000  0x0 0x51000000  0x0 0x0f000000>;
87*7ef62cebSEmmanuel Vadot
88*7ef62cebSEmmanuel Vadot            /*
89*7ef62cebSEmmanuel Vadot             * The IOMMU also manages all functions from this domain,
90*7ef62cebSEmmanuel Vadot             * with endpoint IDs 0x10000 - 0x1ffff
91*7ef62cebSEmmanuel Vadot             */
92*7ef62cebSEmmanuel Vadot            iommu-map = <0x0 &iommu0 0x10000 0x10000>;
93*7ef62cebSEmmanuel Vadot        };
94*7ef62cebSEmmanuel Vadot
95*7ef62cebSEmmanuel Vadot        ethernet {
96*7ef62cebSEmmanuel Vadot            /* The IOMMU manages this platform device with endpoint ID 0x20000 */
97*7ef62cebSEmmanuel Vadot            iommus = <&iommu0 0x20000>;
98*7ef62cebSEmmanuel Vadot        };
99*7ef62cebSEmmanuel Vadot    };
100*7ef62cebSEmmanuel Vadot
101*7ef62cebSEmmanuel Vadot...
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