| /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx51.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx51-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-binding
451 src: reset-controller@73fd0000 { global() label
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| H A D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
7 #include "imx50-pinfunc.h"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx5-clock.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
47 #address-cells = <1>;
48 #size-cells = <0>;
51 compatible = "arm,cortex-a8";
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| H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gi
589 src: reset-controller@20d8000 { global() label
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| H A D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
6 #include "imx53-pinfunc.h"
7 #include <dt-bindings/clock/imx5-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
17 * pre-existing /chosen node to be available to insert the
50 #address-cells = <1>;
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| H A D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cell
866 src: reset-controller@20d8000 { global() label
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| H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6sl-pinfunc.h"
7 #include <dt-bindings/clock/imx6sl-clock.h>
10 #address-cells = <1>;
11 #size-cell
685 src: reset-controller@20d8000 { global() label
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| H A D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gi
785 src: reset-controller@20d8000 { global() label
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| H A D | imx6ul.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gi
707 src: reset-controller@20d8000 { global() label
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| H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-binding
661 src: reset-controller@30390000 { global() label
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| H A D | imx6q.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
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| /freebsd-src/sys/contrib/device-tree/Bindings/reset/ |
| H A D | fsl,imx-src.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
15 nodes should specify the reset line on the SRC in their resets
16 property, containing a phandle to the SRC device node and a
31 - const: fsl,imx51-src
32 - items:
33 - enum:
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| /freebsd-src/sys/dts/arm/ |
| H A D | imx51x.dtsi | 32 #address-cells = <1>;
33 #size-cells = <1>;
41 #address-cells = <1>;
42 #size-cells = <0>;
48 d-cache-line-size = <32>;
49 i-cache-line-size = <32>;
50 d-cache-size = <0x8000>;
51 i-cache-size = <0x8000>;
53 timebase-frequency = <0>;
54 bus-frequency = <0>;
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| H A D | imx53x.dtsi | 34 #address-cells = <1>;
35 #size-cells = <1>;
43 #address-cells = <1>;
44 #size-cells = <0>;
50 d-cache-line-size = <32>;
51 i-cache-line-size = <32>;
52 d-cache-size = <0x8000>;
53 i-cache-size = <0x8000>;
54 l2-cache-line-size = <32>;
55 l2-cache-line = <0x40000>;
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| /freebsd-src/sys/contrib/device-tree/Bindings/media/ |
| H A D | coda.txt | 1 Chips&Media Coda multi-standard codec IP
8 - compatible : should be "fsl,<chip>-src" for i.MX SoCs:
9 (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
10 (b) "fsl,imx51-vpu" for CodaHx4 present in i.MX51
11 (c) "fsl,imx53-vpu" for CODA7541 present in i.MX53
12 (d) "fsl,imx6q-vpu" for CODA960 present in i.MX6q
13 - reg: should be register base and length as documented in the
15 - interrupts : Should contain the VPU interrupt. For CODA960,
17 - clocks : Should contain the ahb and per clocks, in the order
18 determined by the clock-names property.
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/imx/ |
| H A D | fsl-imx-drm.txt | 8 - compatible: Should be "fsl,imx-display-subsystem"
9 - ports: Should contain a list of phandles pointing to display interface ports
14 display-subsystem {
15 compatible = "fsl,imx-display-subsystem";
24 - compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
25 - imx51
26 - imx53
27 - imx6q
28 - imx6qp
29 - reg: should be register base and length as documented in the
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| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gi
664 src: reset-controller@30390000 { global() label
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| H A D | imx8mq.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-rese
883 src: reset-controller@30390000 { global() label
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| H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-binding
667 src: reset-controller@30390000 { global() label
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| /freebsd-src/sys/dev/ffec/ |
| H A D | if_ffec.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Driver for Freescale Fast Ethernet Controller, found on imx-series SoCs among
42 * compatible = "fsl,imxNN-fec";
45 * phy-mode = "rgmii";
46 * phy-disable-preambl
814 uint8_t *dst, *src; ffec_rxfinish_onebuf() local
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