| /freebsd-src/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | xlnx,gpio-xilinx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Xilinx AXI GPIO controller 10 - Neeli Srinivas <srinivas.neeli@amd.com> 13 The AXI GPIO design provides a general purpose input/output interface 14 to an AXI4-Lite interface. The AXI GPIO can be configured as either 15 a single or a dual-channel device. The width of each channel is 22 - xlnx,xps-gpio-1.00.a [all …]
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| H A D | gpio-xilinx.txt | 1 Xilinx plb/axi GPIO controller 3 Dual channel GPIO controller with configurable number of pins 9 - compatible : Should be "xlnx,xps-gpio-1.00.a" 10 - reg : Address and length of the register set for the device 11 - #gpio-cells : Should be two. The first cell is the pin number and the 13 - gpio-controller : Marks the device node as a GPIO controller. 16 - clocks : Input clock specifier. Refer to common clock bindings. 17 - interrupts : Interrupt mapping for GPIO IRQ. 18 - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input 19 - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 [all …]
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| H A D | gpio-mmio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic MMIO GPIO 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Bartosz Golaszewski <brgl@bgdev.pl> 14 Some simple GPIO controllers may consist of a single data register or a pair 15 of set/clear-bit registers. Such controllers are common for glue logic in 16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/auxdisplay/ |
| H A D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...] |
| /freebsd-src/sys/contrib/device-tree/src/riscv/sophgo/ |
| H A D | cv18xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/clock/sophgo,cv1800.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 12 #address-cell [all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | gpio-control-nand.txt | 1 GPIO assisted NAND flash 3 The GPIO assisted NAND flash uses a memory mapped interface to 4 read/write the NAND commands and data and GPIO pins for the control 8 - compatible : "gpio-control-nand" 9 - reg : should specify localbus chip select and size used for the chip. The 12 - #address-cell [all...] |
| H A D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nan [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mn-rve-gateway.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/usb/pd.h> 9 #include "imx8mn-var-som.dtsi" 13 compatible = "rve,gateway", "variscite,var-som-mx8mn", "fsl,imx8mn"; 15 crystal_duart_24m: crystal-duar [all...] |
| H A D | fsl-ls1028a-kontron-sl28.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Device Tree file for the Kontron SMARC-sAL28 board. 9 /dts-v1/; 10 #include "fsl-ls1028a.dtsi" 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 16 model = "Kontron SMARC-sAL28"; 33 compatible = "gpio-keys"; 35 power-button { [all …]
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| H A D | fsl-ls1012a-rdb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "fsl-ls1012a.dtsi" 15 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a"; 29 sd-uhs-sdr104; 30 sd-uhs-sdr50; 31 sd-uhs-sdr25; 32 sd-uhs-sdr12; 37 mmc-hs200-1_8v; [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver 4 - compatible : "pinctrl-single" or "pinconf-single". 5 "pinctrl-single" means that pinconf isn't supported. 6 "pinconf-single" means that generic pinconf is supported. 8 - reg : offset and length of the register set for the mux registers 10 - #pinctrl-cells : number of cells in addition to the index, set to 1 11 or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits 13 - pinctrl-single,register-width : pinmux register access width in bits 15 - pinctrl-single,function-mask : mask of allowed pinmux function bits 19 - pinctrl-single,function-off : function off mode for disabled state if [all …]
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| H A D | pinctrl-single.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-singl [all...] |
| /freebsd-src/sys/contrib/device-tree/src/riscv/thead/ |
| H A D | th1520.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/clock/thead,th1520-clk-ap.h> 12 #address-cells = <2>; 13 #size-cell [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | orion5x-rd88f5182-nas.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include "orion5x-mv88f518 [all...] |
| H A D | mmp2-olpc-xo-1-75.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/linux-event-codes.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/clock/marvell,mmp2-audio.h> 16 model = "OLPC XO-1.75"; 17 compatible = "olpc,xo-1.75", "mrvl,mmp2"; 20 #address-cells = <1>; 21 #size-cells = <1>; [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/bitmain/ |
| H A D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/bitmain,bm1880-reset.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a53"; [all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/display/panel/ |
| H A D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 24 width-mm: 26 Specifies the width of the physical area where images are displayed. This 29 height-mm: 43 non-descriptive information. For instance an LCD panel in a system that [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra234-p3701-0000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra234-p3701.dtsi" 7 compatible = "nvidia,p3701-0000", "nvidia,tegra234"; 9 thermal-zones { 10 tj-thermal { 11 polling-delay = <1000>; 12 polling-delay-passiv [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arc/ |
| H A D | axs10x_mb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 14 compatible = "simple-bus"; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 interrupt-parent = <&mb_intc>; 20 creg_rst: reset-controller@11220 { 21 compatible = "snps,axs10x-reset"; 22 #reset-cells = <1>; 27 compatible = "snps,axs10x-i2s-pll-clock"; [all …]
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| /freebsd-src/sys/contrib/device-tree/src/mips/netlogic/ |
| H A D | xlp_evp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 model = "netlogic,XLP-EVP"; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <2>; 15 #size-cells = <1>; 16 compatible = "simple-bus"; 24 reg-shift = <2>; 25 reg-io-width = <4>; [all …]
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| H A D | xlp_svp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 model = "netlogic,XLP-SVP"; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <2>; 15 #size-cells = <1>; 16 compatible = "simple-bus"; 24 reg-shift = <2>; 25 reg-io-width = <4>; [all …]
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| H A D | xlp_fvp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 model = "netlogic,XLP-FVP"; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <2>; 15 #size-cells = <1>; 16 compatible = "simple-bus"; 24 reg-shift = <2>; 25 reg-io-width = <4>; [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | sama5d3xmb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; 21 bus-width = <4>; 22 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; 31 spi-max-frequency = <50000000>; 37 atmel,clk-from-rk-pin; 50 clock-names = "mclk"; 58 pinctrl-names = "default"; [all …]
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| /freebsd-src/sys/contrib/device-tree/src/mips/ingenic/ |
| H A D | cu1000-neo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/ingenic,sysost.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 compatible = "yna,cu1000-neo", "ingenic,x1000e"; 11 model = "YSH & ATIL General Board CU1000-Neo"; 18 stdout-path = "serial2:115200n8"; 27 compatible = "gpio-leds"; 28 led-0 { [all …]
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| H A D | cu1830-neo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/ingenic,sysost.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 compatible = "yna,cu1830-neo", "ingenic,x1830"; 11 model = "YSH & ATIL General Board CU1830-Neo"; 18 stdout-path = "serial1:115200n8"; 27 compatible = "gpio-leds"; 28 led-0 { [all …]
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