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/freebsd-src/sys/contrib/device-tree/Bindings/dma/
H A Dsnps,dma-spear1340.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/dma/snps,dma-spear134
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H A Dsnps-dma.txt1 * Synopsys Designware DMA Controller
4 - compatible: "snps,dma-spear1340"
5 - reg: Address range of the DMAC registers
6 - interrupt: Should contain the DMAC interrupt number
7 - dma-channels: Number of channels supported by hardware
8 - dma-requests: Number of DMA request lines supported, up to 16
9 - dma-masters: Number of AHB masters supported by the controller
10 - #dma-cells: must be <3>
11 - chan_allocation_order: order of allocation of channel, 0 (default): ascending,
13 - chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
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H A Dsifive,fu540-c000-pdma.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive Unleashed Rev C000 Platform DMA
10 - Green Wan <green.wan@sifive.com>
11 - Palmer Debbelt <palmer@sifive.com>
12 - Paul Walmsley <paul.walmsley@sifive.com>
15 Platform DMA is a DMA engine of SiFive Unleashed. It supports 4
16 channels. Each channel has 2 interrupts. One is for DMA done and
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/freebsd-src/share/man/man4/
H A Dbce.41 .\" Copyright (c) 2006-2014 QLogic Corporation
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
53 Ethernet controllers which support a TCP Offload Engine (TOE), Remote DMA (RDMA),
62 .Bl -item -offset indent -compact
72 10/100/1000Mbps operation in full-duplex mode
74 10/100Mbps operation in half-duplex mode
80 .Bl -tag -width ".Cm 10baseT/UTP"
92 .Cm full-duplex
94 .Cm half-duplex
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/freebsd-src/sys/contrib/device-tree/Bindings/reserved-memory/
H A Dshared-dma-pool.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/shared-dma-pool.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: /reserved-memory DMA pool
10 - devicetree-spec@vger.kernel.org
13 - $ref: reserved-memory.yaml
18 - const: shared-dma-pool
21 pool of DMA buffers for a set of devices. It can be used by an
25 - const: restricted-dma-pool
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/freebsd-src/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-kizbox3_common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-kizbox3.dts - Device Tree Include file for Overkiz Kizbox 3
12 /dts-v1/;
14 #include "sama5d2-pinfunc.h"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
17 #include <dt-bindings/pinctrl/at91.h>
18 #include <dt-bindings/pwm/pwm.h>
36 stdout-path = "serial1:115200n8";
41 clock-frequency = <32768>;
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H A Dat91-sama5d27_wlsom1_ek.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK
9 /dts-v1/;
10 #include "at91-sama5d27_wlsom1.dtsi"
11 #include <dt-bindings/input/input.h>
15 …compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel…
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 pinctrl-names = "default";
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H A Dat91-wb50n.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
12 model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
17 stdout-path = "serial0:115200n8";
38 clock-frequency = <32768>;
42 clock-frequency = <12000000>;
46 atmel,osc-bypass;
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
52 cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
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/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am69-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-binding
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H A Dk3-j784s4-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-binding
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H A Dk3-j721e-beagleboneai64.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation
6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
9 /dts-v
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H A Dk3-j721s2-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
16 bootph-al
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H A Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-binding
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H A Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memor
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H A Dk3-j721e-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-binding
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/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
28 compatible = "shared-dma-pool";
30 no-map;
34 compatible = "shared-dma-pool";
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H A Dstm32mp157c-emstamp-argon.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/mfd/st,stpmic1.h>
23 stdout-path = "serial0:115200n8";
31 reserved-memory {
32 #address-cells = <1>;
33 #size-cells = <1>;
37 compatible = "shared-dma-pool";
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/freebsd-src/contrib/dma/
H A Ddma.conf1 # $DragonFly: src/etc/dma/dma.conf,v 1.2 2008/02/04 10:11:41 matthias Exp $
6 # Please use dpkg-reconfigure dma to change this value.
9 # Use this SMTP port. Most users will be fine with the default (25)
12 # Path to your alias file. Just stay with the default.
15 # Path to your spooldir. Just stay with the default.
16 #SPOOLDIR /var/spool/dma
19 #AUTHPATH /etc/dma/auth.conf
46 # behind a dialup line. You have to submit your mails manually with dma -q
53 # The internet hostname dma uses to identify the host.
62 # By default, MASQUERADE is not set.
/freebsd-src/sys/contrib/device-tree/Bindings/mmc/
H A Dti-omap-hsmmc.txt10 --------------------
11 - compatible:
12 Should be "ti,omap2-hsmmc", for OMAP2 controllers
13 Should be "ti,omap3-hsmmc", for OMAP3 controllers
14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
15 Should be "ti,omap4-hsmmc", for OMAP4 controllers
16 Should be "ti,am33xx-hsmmc", for AM335x controllers
17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
20 ---------------------------------
22 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
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/freebsd-src/sys/contrib/device-tree/Bindings/sound/
H A Datmel-classd.txt4 - compatible
5 Should be "atmel,sama5d2-classd".
6 - reg
8 - interrupts
10 - dmas
11 One DMA specifiers as described in atmel-dma.txt and dma.txt files.
12 - dma-names
14 - clock-names
17 - clocks
18 Please refer to clock-bindings.txt.
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H A Drockchip,pdm.txt5 - compatible: "rockchip,pdm"
6 - "rockchip,px30-pdm"
7 - "rockchip,rk1808-pdm"
8 - "rockchip,rk3308-pdm"
9 - reg: physical base address of the controller and length of memory mapped
11 - dmas: DMA specifiers for rx dma. See the DMA client binding,
12 Documentation/devicetree/bindings/dma/dma.txt
13 - dma-names: should include "rx".
14 - clocks: a list of phandle + clock-specifer pairs, one for each entry in clock-names.
15 - clock-names: should contain following:
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H A Dsirf-usp.txt4 - compatible: "sirf,prima2-usp-pcm"
5 - reg: Base address and size entries:
6 - dmas: List of DMA controller phandle and DMA request line ordered pairs.
7 - dma-names: Identifier string for each DMA request line in the dmas property.
10 One of the DMA channels will be responsible for transmission (should be
13 - clocks: USP controller clock source
14 - pinctrl-names: Must contain a "default" entry.
15 - pinctrl-NNN: One property must exist for each entry in pinctrl-names.
19 compatible = "sirf,prima2-usp-pcm";
23 dma-names = "rx", "tx";
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/freebsd-src/sys/contrib/device-tree/Bindings/misc/
H A Datmel-ssc.txt4 - compatible: "atmel,at91rm9200-ssc" or "atmel,at91sam9g45-ssc"
5 - atmel,at91rm9200-ssc: support pdc transfer
6 - atmel,at91sam9g45-ssc: support dma transfer
7 - reg: Should contain SSC registers location and length
8 - interrupts: Should contain SSC interrupt
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 Required properties for devices compatible with "atmel,at91sam9g45-ssc":
15 - dmas: DMA specifier, consisting of a phandle to DMA controller node,
16 the memory interface and SSC DMA channel ID (for tx and rx).
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/freebsd-src/sys/contrib/device-tree/Bindings/serial/
H A Dpl011.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
22 - arm,pl011
24 - compatible
29 - const: arm,pl011
30 - const: arm,primecell
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/freebsd-src/tools/tools/ioat/
H A Dioatcontrol.846 .Ar [ chain-len
64 .Bl -tag -width Ds
71 Test non-contiguous 8k copy.
73 Test block fill (by default,
77 Test memcpy instead of DMA.
81 Test DMA CRC.
83 Test DMA copy with CRC.
91 to issue DMA to or from a specific
94 .Bl -tag -width Ds
99 is a kernel virtual address (by default,
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