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/llvm-project/mlir/test/CAPI/
H A Dpdl.c32 // CHECK: parsedType isa PDLType: 1 in testAttributeType()
33 fprintf(stderr, "parsedType isa PDLType: %d\n", in testAttributeType()
35 // CHECK: parsedType isa PDLAttributeType: 1 in testAttributeType()
36 fprintf(stderr, "parsedType isa PDLAttributeType: %d\n", in testAttributeType()
38 // CHECK: parsedType isa PDLOperationType: 0 in testAttributeType()
39 fprintf(stderr, "parsedType isa PDLOperationType: %d\n", in testAttributeType()
41 // CHECK: parsedType isa PDLRangeType: 0 in testAttributeType()
42 fprintf(stderr, "parsedType isa PDLRangeType: %d\n", in testAttributeType()
44 // CHECK: parsedType isa PDLTypeType: 0 in testAttributeType()
45 fprintf(stderr, "parsedType isa PDLTypeType: %d\n", in testAttributeType()
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/llvm-project/llvm/unittests/ADT/
H A DPointerUnionTest.cpp92 EXPECT_FALSE(isa<int *>(a)); in TEST_F()
93 EXPECT_TRUE(isa<float *>(a)); in TEST_F()
94 EXPECT_TRUE(isa<int *>(b)); in TEST_F()
95 EXPECT_FALSE(isa<float *>(b)); in TEST_F()
96 EXPECT_TRUE(isa<int *>(n)); in TEST_F()
97 EXPECT_FALSE(isa<float *>(n)); in TEST_F()
98 EXPECT_TRUE(isa<int *>(i3)); in TEST_F()
99 EXPECT_TRUE(isa<float *>(f3)); in TEST_F()
100 EXPECT_TRUE(isa<long long *>(l3)); in TEST_F()
101 EXPECT_TRUE(isa<int *>(i4)); in TEST_F()
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/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Ddivergent-branch-uniform-condition.ll7 ; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck %s -check-prefix=ISA
19 ; ISA-LABEL: main:
20 ; ISA: ; %bb.0: ; %start
21 ; ISA-NEXT: v_readfirstlane_b32 s0, v0
22 ; ISA-NEXT: s_mov_b32 m0, s0
23 ; ISA-NEXT: s_mov_b32 s8, 0
24 ; ISA-NEXT: v_interp_p1_f32_e32 v0, v1, attr0.x
25 ; ISA-NEXT: v_cmp_nlt_f32_e32 vcc, 0, v0
26 ; ISA-NEXT: s_mov_b64 s[0:1], 0
27 ; ISA-NEXT: ; implicit-def: $sgpr4_sgpr5
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H A Dsi-annotate-nested-control-flows.ll3 ; RUN: llc -mtriple=amdgcn-amd-amdhsa %s -o - | FileCheck %s --check-prefix=ISA
17 ; ISA-LABEL: nested_inf_loop:
18 ; ISA-NEXT: %bb.0: ; %BB
19 ; ISA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
20 ; ISA-NEXT: v_and_b32_e32 v1, 1, v1
21 ; ISA-NEXT: v_and_b32_e32 v0, 1, v0
22 ; ISA-NEXT: v_cmp_eq_u32_e64 s[4:5], 1, v1
23 ; ISA-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
24 ; ISA-NEXT: s_xor_b64 s[6:7], vcc, -1
25 ; ISA-NEXT: s_mov_b64 s[8:9], 0
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H A Dbug-sdag-emitcopyfromreg.ll2 ; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck %s -check-prefix=ISA
6 ; ISA-LABEL: f:
7 ; ISA: ; %bb.0: ; %bb
8 ; ISA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9 ; ISA-NEXT: s_mov_b64 s[4:5], 0
10 ; ISA-NEXT: v_cmp_gt_i32_e32 vcc_lo, 1, v0
11 ; ISA-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
12 ; ISA-NEXT: v_mov_b32_e32 v6, 0
13 ; ISA-NEXT: s_waitcnt lgkmcnt(0)
14 ; ISA
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/llvm-project/clang/test/FixIt/
H A Dauto-isa-fixit.m11 x123->isa = 0;
12 x123->isa = rhs();
13 x123->isa = (id)(x123->isa);
14 x123->isa = (id)x123->isa;
15 x123->isa = (x123->isa);
16 x123->isa = (id)(x123->isa);
17 return x123->isa;
23 Class isa; // expected-note 3 {{instance variable is declared here}} field
30 Class isa; // note, not first ivar; field
42 Class isa; // note, isa is not in root class field
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/llvm-project/lldb/tools/debugserver/debugserver.xcodeproj/
H A Dproject.pbxproj10 23043C9D1D35DBEC00FC25CA /* JSON.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 233B4EA51D2DB54300E98261 /* JSON.cpp */; };
11 23043C9E1D35DBFA00FC25CA /* StringConvert.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 233B4EA81D2DB96A00E98261 /* StringConvert.cpp */; };
12 233B4EA71D2DB54300E98261 /* JSON.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 233B4EA51D2DB54300E98261 /* JSON.cpp */; };
13 233B4EA91D2DB96A00E98261 /* StringConvert.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 233B4EA81D2DB96A00E98261 /* StringConvert.cpp */; };
14 23D1B0291D497E8B00FF831B /* OsLogger.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 23D1B0271D497E8B00FF831B /* OsLogger.cpp */; };
15 23D1B02A1D497E8B00FF831B /* OsLogger.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 23D1B0271D497E8B00FF831B /* OsLogger.cpp */; };
16 264D5D581293835600ED4C01 /* DNBArch.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 264D5D571293835600ED4C01 /* DNBArch.cpp */; };
17 266B5ED11460A68200E43F0A /* DNBArchImplARM64.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 266B5ECF1460A68200E43F0A /* DNBArchImplARM64.cpp */; };
18 26CE05A7115C360D0022F371 /* DNBError.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 26C637DE0C71334A0024798E /* DNBError.cpp */; };
19 26CE05A8115C36170022F371 /* DNBThreadResumeActions.cpp in Sources */ = {isa
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/llvm-project/clang/test/SemaObjC/
H A Ddeprecated-objc-introspection.m4 // Test deprecated direct usage of the 'isa' pointer.
10 struct objc_class *isa; field
15 struct objc_class *isa; field
28 …[(*x).isa self]; // expected-warning {{direct access to Objective-C's isa is deprecated in favor o…
29 …[x->isa self]; // expected-warning {{direct access to Objective-C's isa is deprecated in favor of …
34 // instance variable 'isa' is @protected; this will be a hard error in the future
37 [(*y).isa self]; // expected-error {{instance variable 'isa' is protected}} \
39 [y->isa self]; // expected-error {{instance variable 'isa' is protected}} \
43 // If an ivar is (1) the first ivar in a root class and (2) named `isa`,
44 // then it should get the same warnings that id->isa gets.
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/llvm-project/clang-tools-extra/unittests/clang-query/
H A DQueryParserTest.cpp28 EXPECT_TRUE(isa<NoOpQuery>(Q)); in TEST_F()
31 EXPECT_TRUE(isa<NoOpQuery>(Q)); in TEST_F()
36 ASSERT_TRUE(isa<InvalidQuery>(Q)); in TEST_F()
42 ASSERT_TRUE(isa<HelpQuery>(Q)); in TEST_F()
45 ASSERT_TRUE(isa<InvalidQuery>(Q)); in TEST_F()
51 ASSERT_TRUE(isa<QuitQuery>(Q)); in TEST_F()
54 ASSERT_TRUE(isa<QuitQuery>(Q)); in TEST_F()
57 ASSERT_TRUE(isa<InvalidQuery>(Q)); in TEST_F()
64 ASSERT_TRUE(isa<InvalidQuery>(Q)); in TEST_F()
68 ASSERT_TRUE(isa<InvalidQuery>(Q)); in TEST_F()
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/llvm-project/llvm/unittests/SandboxIR/
H A DSandboxIRTest.cpp66 EXPECT_TRUE(isa<sandboxir::Function>(F)); in TEST_F()
67 EXPECT_FALSE(isa<sandboxir::Function>(Arg0)); in TEST_F()
68 EXPECT_FALSE(isa<sandboxir::Function>(BB)); in TEST_F()
69 EXPECT_FALSE(isa<sandboxir::Function>(AddI)); in TEST_F()
70 EXPECT_FALSE(isa<sandboxir::Function>(Const0)); in TEST_F()
72 EXPECT_FALSE(isa<sandboxir::Argument>(F)); in TEST_F()
73 EXPECT_TRUE(isa<sandboxir::Argument>(Arg0)); in TEST_F()
74 EXPECT_FALSE(isa<sandboxir::Argument>(BB)); in TEST_F()
75 EXPECT_FALSE(isa<sandboxir::Argument>(AddI)); in TEST_F()
76 EXPECT_FALSE(isa<sandboxi in TEST_F()
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/llvm-project/clang/test/CodeGen/PowerPC/
H A Dbuiltins-ppc-xlcompat-test.c34 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_uo' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
35 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_lt' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
36 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_gt' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
37 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_eq' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
38 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_test_data_class' needs target feature isa-v30-instructi… in test_builtin_ppc_test()
39 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_test_data_class' needs target feature isa-v30-instructi… in test_builtin_ppc_test()
40 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_uo' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
41 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_lt' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
42 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_gt' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
43 // CHECK-NONPWR9-ERR: error: '__builtin_ppc_compare_exp_eq' needs target feature isa-v30-instructio… in test_builtin_ppc_test()
[all …]
/llvm-project/clang/test/Driver/
H A Dppc-isa-features.cpp8 // CHECK-PWR6: -isa-v206-instructions
9 // CHECK-PWR6: -isa-v207-instructions
10 // CHECK-PWR6: -isa-v30-instructions
12 // CHECK-A2: +isa-v206-instructions
13 // CHECK-A2: -isa-v207-instructions
14 // CHECK-A2: -isa-v30-instructions
16 // CHECK-PWR7: +isa-v206-instructions
17 // CHECK-PWR7: -isa-v207-instructions
18 // CHECK-PWR7: -isa-v30-instructions
20 // CHECK-PWR8: +isa-v207-instructions
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/llvm-project/llvm/lib/Transforms/Coroutines/
H A DCoroInstr.h
/llvm-project/llvm/test/CodeGen/Mips/
H A Dcpus.ll5 ; GENERIC: ISA: MIPS32
9 ; MIPS1: ISA: MIPS1
12 ; MIPS2: ISA: MIPS2
15 ; MIPS3: ISA: MIPS3
18 ; MIPS4: ISA: MIPS4
22 ; MIPS32: ISA: MIPS32
25 ; MIPS32R2: ISA: MIPS32r2
28 ; MIPS32R3: ISA: MIPS32r3
31 ; MIPS32R5: ISA: MIPS32r5
34 ; MIPS32R6: ISA: MIPS32r6
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/llvm-project/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips4.s8 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
31 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
32 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
33 …$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
34 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
35 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
36 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
37 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
38 …$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
H A Dinvalid-mips5.s9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
10 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
43 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
44 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
45 …$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
47 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
49 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
50 …$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
/llvm-project/compiler-rt/test/asan/TestCases/Darwin/
H A Dscribble.cpp11 struct Isa { struct
19 // test relies on `isa` being scribbled or unmodified after memory is freed.
20 // In order for this to work the start of `isa` must come after whatever is in
24 Isa *isa; argument
34 fprintf(stderr, "isa = %p\n", this->isa); in print_my_class_name()
36 if ((uint32_t)(uintptr_t)this->isa != 0x55555555) { in print_my_class_name()
37 fprintf(stderr, "class name: %s\n", this->isa->class_name); in print_my_class_name()
42 Isa *my_class_isa = (Isa *)malloc(sizeof(Isa)); in main()
43 memset(my_class_isa, 0x77, sizeof(Isa)); in main()
48 my_object->isa = my_class_isa; in main()
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/llvm-project/clang/test/CodeGenObjC/
H A Did-isa-codegen.m7 Class isa; field
20 [object->isa isSubclassOfClass:[I class]];
22 [(*object).isa isSubclassOfClass:[I class]];
24 object->isa = src_object->isa;
25 (*src_object).isa = (*object).isa;
33 if(((id)inObject1)->isa == MyClass)
34 return ((id)inObject1)->isa;
40 id isa; field
46 if([Foo method]->isa)
47 return (*[Foo method]).isa;
[all …]
/llvm-project/llvm/test/MC/Mips/mips1/
H A Dinvalid-mips5-wrong-error.s37 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
38 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
39 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
40 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
41 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
42 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
43 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
44 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
45 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
/llvm-project/lldb/unittests/Utility/
H A DDataBufferTest.cpp26 EXPECT_TRUE(llvm::isa<DataBuffer>(data_buffer)); in TEST()
27 EXPECT_TRUE(llvm::isa<WritableDataBuffer>(data_buffer)); in TEST()
28 EXPECT_TRUE(llvm::isa<DataBufferHeap>(data_buffer)); in TEST()
29 EXPECT_FALSE(llvm::isa<DataBufferLLVM>(data_buffer)); in TEST()
38 EXPECT_TRUE(llvm::isa<DataBuffer>(data_buffer)); in TEST()
39 EXPECT_TRUE(llvm::isa<DataBufferLLVM>(data_buffer)); in TEST()
40 EXPECT_FALSE(llvm::isa<WritableDataBuffer>(data_buffer)); in TEST()
41 EXPECT_FALSE(llvm::isa<WritableDataBufferLLVM>(data_buffer)); in TEST()
42 EXPECT_FALSE(llvm::isa<DataBufferHeap>(data_buffer)); in TEST()
50 EXPECT_TRUE(llvm::isa<DataBuffer>(data_buffer)); in TEST()
[all …]
/llvm-project/clang/lib/Sema/
H A DSemaFixItUtils.cpp34 if (isa<PointerType>(From) && isa<PointerType>(To)) { in compareTypesSimple()
68 if (isa<ArraySubscriptExpr>(Expr) || in tryToFixConversion()
69 isa<CallExpr>(Expr) || in tryToFixConversion()
70 isa<DeclRefExpr>(Expr) || in tryToFixConversion()
71 isa<CastExpr>(Expr) || in tryToFixConversion()
72 isa<CXXNewExpr>(Expr) || in tryToFixConversion()
73 isa<CXXConstructExpr>(Expr) || in tryToFixConversion()
74 isa<CXXDeleteExpr>(Expr) || in tryToFixConversion()
75 isa<CXXNoexceptExp in tryToFixConversion()
[all...]
/llvm-project/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips32.s8 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
9 … # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
46 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
47 …$f7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
48 …$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
49 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
50 …$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
51 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
52 …$f6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
53 …$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: non-zero fcc register doesn't exist in current ISA level
[all …]
/llvm-project/llvm/unittests/Support/
H A DExtensibleRTTITest.cpp70 TEST(ExtensibleRTTI, isa) { in TEST()
76 EXPECT_TRUE(isa<MyBaseType>(B)); in TEST()
77 EXPECT_FALSE(isa<MyDerivedType>(B)); in TEST()
78 EXPECT_FALSE(isa<MyOtherDerivedType>(B)); in TEST()
79 EXPECT_FALSE(isa<MyDeeperDerivedType>(B)); in TEST()
81 EXPECT_TRUE(isa<MyBaseType>(D)); in TEST()
82 EXPECT_TRUE(isa<MyDerivedType>(D)); in TEST()
83 EXPECT_FALSE(isa<MyOtherDerivedType>(D)); in TEST()
84 EXPECT_FALSE(isa<MyDeeperDerivedType>(D));
86 EXPECT_TRUE(isa<MyBaseTyp
44 TEST(ExtensibleRTTI,isa) TEST() argument
[all...]
/llvm-project/llvm/test/tools/llvm-readobj/ELF/
H A Dnote-amd-invalid-v2.test69 # LLVM-NEXT: Type: NT_AMD_HSA_ISA_VERSION (AMD HSA ISA Version)
70 # LLVM-NEXT: AMD HSA ISA Version: Invalid AMD HSA ISA Version
82 # LLVM-NEXT: Type: NT_AMD_HSA_ISA_VERSION (AMD HSA ISA Version)
83 # LLVM-NEXT: AMD HSA ISA Version: Invalid AMD HSA ISA Version
95 # LLVM-NEXT: Type: NT_AMD_HSA_ISA_VERSION (AMD HSA ISA Version)
96 # LLVM-NEXT: AMD HSA ISA Version: Invalid AMD HSA ISA Version
108 # LLVM-NEXT: Type: NT_AMD_HSA_ISA_VERSION (AMD HSA ISA Version)
109 # LLVM-NEXT: AMD HSA ISA Version: Invalid AMD HSA ISA Version
154 # GNU-NEXT: AMD 0x00000008 NT_AMD_HSA_ISA_VERSION (AMD HSA ISA Version)
155 # GNU-NEXT: AMD HSA ISA Version:
[all …]
/llvm-project/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/
H A DAppleObjCRuntimeV1.cpp125 " struct __objc_class *isa; " in CreateObjectChecker()
141 " struct __objc_class *isa; " in CreateObjectChecker()
158 " (int)strlen(obj->isa->name); " in CreateObjectChecker()
176 ObjCISA isa, lldb::ProcessSP process_sp) { in ClassDescriptorV1() argument
177 Initialize(isa, process_sp); in ClassDescriptorV1()
181 ObjCISA isa, lldb::ProcessSP process_sp) { in Initialize() argument
182 if (!isa || !process_sp) { in Initialize()
191 m_isa = process_sp->ReadPointerFromMemory(isa, error); in Initialize()
373 ObjCISA isa; in UpdateISAToDescriptorMapIfNeeded() local
376 // is the "isa" in UpdateISAToDescriptorMapIfNeeded()
[all …]

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