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/llvm-project/llvm/test/MC/ARM/
H A Dltorg.s17 adds r0, r0, #1
18 adds r0, r0, #1
28 adds r0, r0, #1
29 adds r0, r0, #1
37 adds r0, r0, #1
38 adds r0, r0, #1
48 adds r0, r0, #1
49 adds r0, r0, #1
52 adds r0, r0, #1
62 adds r0, r0, #1
[all …]
H A Dltorg-darwin.s17 adds r0, r0, #1
18 adds r0, r0, #1
30 adds r0, r0, #1
31 adds r0, r0, #1
39 adds r0, r0, #1
40 adds r0, r0, #1
52 adds r0, r0, #1
53 adds r0, r0, #1
56 adds r0, r0, #1
68 adds r0, r0, #1
[all …]
H A Dldr-pseudo-darwin.s28 adds r0, r0, #1
29 adds r0, r0, #1
30 adds r0, r0, #1
31 adds r0, r0, #1
34 adds r0, r0, #1
35 adds r0, r0, #1
43 adds r0, r0, #1
44 adds r0, r0, #1
45 adds r0, r0, #1
46 adds r0, r0, #1
[all …]
H A Dldr-pseudo.s28 adds r0, r0, #1
29 adds r0, r0, #1
30 adds r0, r0, #1
31 adds r0, r0, #1
34 adds r0, r0, #1
35 adds r0, r0, #1
43 adds r0, r0, #1
44 adds r0, r0, #1
45 adds r0, r0, #1
46 adds r0, r0, #1
[all …]
H A Dthumb-8-bit-relocs.s20 adds r3, :upper0_7:function
21 adds r3, :lower8_15:function
22 adds r3, :lower0_7:function
26 @ CHECK: adds r3, :upper0_7:function
27 @ CHECK: adds r3, :lower8_15:function
28 @ CHECK: adds r3, :lower0_7:function
/llvm-project/llvm/test/MC/AArch64/
H A Dldr-pseudo.s35 adds x0, x0, #1
36 adds x0, x0, #1
37 adds x0, x0, #1
38 adds x0, x0, #1
41 adds x0, x0, #1
42 adds x0, x0, #1
50 adds x0, x0, #1
51 adds x0, x0, #1
52 adds x0, x0, #1
53 adds x0, x0, #1
[all …]
H A Dalias-addsubimm.s68 adds w0, w2, #-2, lsl 12
73 adds x1, x3, #-2, lsl 12
78 adds x1, x3, #-4
83 adds x1, x3, #-4095, lsl 0
87 // CHECK: adds w0, w2, #2, lsl #12
88 // CHECK: adds w0, w2, #2, lsl #12
90 adds w0, w2, #2, lsl 12
92 // CHECK: adds x1, x3, #2, lsl #12
93 // CHECK: adds x1, x3, #2, lsl #12
95 adds x1, x3, #2, lsl 12
[all …]
H A Darm64-arithmetic-encoding.s58 adds w3, w4, #1024
59 adds w3, w4, #1024, lsl #0
60 adds w3, w4, #1024, lsl #12
61 adds x3, x4, #1024
62 adds x3, x4, #1024, lsl #0
63 adds x3, x4, #1024, lsl #12
65 ; CHECK: adds w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x31]
66 ; CHECK: adds w3, w4, #1024 ; encoding: [0x83,0x00,0x10,0x31]
67 ; CHECK: adds w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x31]
68 ; CHECK: adds x3, x4, #1024 ; encoding: [0x83,0x00,0x10,0xb1]
[all …]
/llvm-project/llvm/test/CodeGen/ARM/
H A Dinc-of-add.ll23 ; THUMB6-NEXT: adds r0, r0, r1
24 ; THUMB6-NEXT: adds r0, r0, #1
30 ; THUMB78-NEXT: adds r0, #1
46 ; THUMB6-NEXT: adds r0, r0, r1
47 ; THUMB6-NEXT: adds r0, r0, #1
53 ; THUMB78-NEXT: adds r0, #1
69 ; THUMB6-NEXT: adds r0, r0, r1
70 ; THUMB6-NEXT: adds r0, r0, #1
76 ; THUMB78-NEXT: adds r0, #1
86 ; ARM-NEXT: adds r0, r0, r2
[all …]
H A Dsub-of-not.ll23 ; THUMB6-NEXT: adds r0, r1, r0
24 ; THUMB6-NEXT: adds r0, r0, #1
30 ; THUMB78-NEXT: adds r0, #1
46 ; THUMB6-NEXT: adds r0, r1, r0
47 ; THUMB6-NEXT: adds r0, r0, #1
53 ; THUMB78-NEXT: adds r0, #1
69 ; THUMB6-NEXT: adds r0, r1, r0
70 ; THUMB6-NEXT: adds r0, r0, #1
76 ; THUMB78-NEXT: adds r0, #1
86 ; ARM-NEXT: adds r0, r2, r0
[all …]
H A Dexecute-only.ll19 ; CHECK-T1-NEXT: adds [[GLOBDEST]], :upper0_7:var
21 ; CHECK-T1-NEXT: adds [[GLOBDEST]], :lower8_15:var
23 ; CHECK-T1-NEXT: adds [[GLOBDEST]], :lower0_7:var
37 ; CHECK-T2BASE: adds [[REG_ENTRY:r[0-9]+]], [[REG_JT]], [[REG_OFFSET]]
52 ; CHECK-T1-NEXT: adds [[REG_JT]], :upper0_7:.LJTI1_0
54 ; CHECK-T1-NEXT: adds [[REG_JT]], :lower8_15:.LJTI1_0
56 ; CHECK-T1-NEXT: adds [[REG_JT]], :lower0_7:.LJTI1_0
118 ; CHECK-T1-NEXT: adds [[STRLIT]], :upper0_7:.L.str
120 ; CHECK-T1-NEXT: adds [[STRLIT]], :lower8_15:.L.str
122 ; CHECK-T1-NEXT: adds [[STRLIT]], :lower0_7:.L.str
[all …]
/llvm-project/llvm/test/CodeGen/VE/Scalar/
H A Daddition.ll6 ; CHECK-NEXT: adds.w.sx %s0, %s1, %s0
17 ; CHECK-NEXT: adds.w.sx %s0, %s1, %s0
28 ; CHECK-NEXT: adds.w.sx %s0, %s1, %s0
29 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
38 ; CHECK-NEXT: adds.l %s0, %s1, %s0
47 ; CHECK-NEXT: adds.l %s1, %s3, %s1
48 ; CHECK-NEXT: adds.l %s0, %s2, %s0
52 ; CHECK-NEXT: adds.w.zx %s2, %s3, (0)1
53 ; CHECK-NEXT: adds.l %s1, %s1, %s2
62 ; CHECK-NEXT: adds.w.sx %s0, %s1, %s0
[all …]
H A Dbr_jt.ll22 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
27 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
31 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
44 ; PIC-NEXT: adds.w.sx %s0, %s0, (0)1
49 ; PIC-NEXT: adds.w.sx %s0, %s0, (0)1
53 ; PIC-NEXT: adds.w.sx %s0, %s0, (0)1
80 ; CHECK-NEXT: adds.w.sx %s1, -1, %s0
84 ; CHECK-NEXT: adds.w.sx %s0, %s1, (0)1
92 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
100 ; PIC-NEXT: adds.w.sx %s1, -1, %s0
[all …]
H A Dsext_zext_load.ll7 ; CHECK-NEXT: adds.l %s11, 16, %s11
19 ; CHECK-NEXT: adds.l %s11, 16, %s11
31 ; CHECK-NEXT: adds.l %s11, 16, %s11
44 ; CHECK-NEXT: adds.l %s11, 16, %s11
56 ; CHECK-NEXT: adds.l %s11, 16, %s11
68 ; CHECK-NEXT: adds.l %s11, 16, %s11
80 ; CHECK-NEXT: adds.l %s11, 16, %s11
92 ; CHECK-NEXT: adds.l %s11, 16, %s11
104 ; CHECK-NEXT: adds.l %s11, 16, %s11
116 ; CHECK-NEXT: adds.l %s11, 16, %s11
[all …]
H A Dsetccf32.ll27 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
39 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
51 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
63 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
75 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
87 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
99 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
111 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
123 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
135 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
[all …]
H A Dsetccf64.ll27 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
39 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
51 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
63 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
75 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
87 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
99 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
111 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
123 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
135 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
[all …]
H A Dsetccf64i.ll28 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
41 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
54 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
67 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
80 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
93 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
105 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
117 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
130 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
143 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
[all …]
H A Dsetccf32i.ll28 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
41 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
54 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
67 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
80 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
93 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
105 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
117 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
130 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
143 ; CHECK-NEXT: adds.w.zx %s0, %s1, (0)1
[all …]
H A Dsubtraction.ll29 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
51 ; CHECK-NEXT: adds.w.zx %s3, %s4, (0)1
83 ; CHECK-NEXT: adds.w.zx %s0, %s0, (0)1
105 ; CHECK-NEXT: adds.w.zx %s3, %s4, (0)1
116 ; CHECK-NEXT: adds.w.sx %s0, -5, %s0
127 ; CHECK-NEXT: adds.w.sx %s0, -5, %s0
138 ; CHECK-NEXT: adds.w.sx %s0, -5, %s0
139 ; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1
161 ; CHECK-NEXT: adds.w.zx %s0, %s3, (0)1
172 ; CHECK-NEXT: adds.w.sx %s0, -5, %s0
[all …]
/llvm-project/llvm/test/CodeGen/Thumb2/
H A Dmve-vecreduce-add.ll43 ; CHECK-NEXT: adds r0, r0, r2
58 ; CHECK-NEXT: adds r0, r0, r2
150 ; CHECK-NEXT: adds r0, r0, r1
157 ; CHECK-NEXT: adds r0, r0, r2
160 ; CHECK-NEXT: adds r0, r0, r2
175 ; CHECK-NEXT: adds r0, r0, r2
178 ; CHECK-NEXT: adds r0, r0, r2
181 ; CHECK-NEXT: adds r0, r0, r2
184 ; CHECK-NEXT: adds r0, r0, r2
187 ; CHECK-NEXT: adds r0, r0, r2
[all …]
H A Dthumb2-adc.ll6 ; CHECK: adds r0, #2
14 ; CHECK: adds r0, #2
22 ; CHECK: adds r0, #2
30 ; CHECK: adds r0, #2
38 ; CHECK: adds r0, #2
45 ; CHECK: adds r0, r0, r2
/llvm-project/llvm/test/CodeGen/Thumb/
H A Dstack-guard-xo.ll42 ; V6M-NEXT: adds r0, :upper0_7:__stack_chk_guard
44 ; V6M-NEXT: adds r0, :lower8_15:__stack_chk_guard
46 ; V6M-NEXT: adds r0, :lower0_7:__stack_chk_guard
56 ; V6M-NEXT: adds r2, :upper0_7:__stack_chk_guard
58 ; V6M-NEXT: adds r2, :lower8_15:__stack_chk_guard
60 ; V6M-NEXT: adds r2, :lower0_7:__stack_chk_guard
168 ; V6M-NEXT: adds r0, :upper0_7:aa
170 ; V6M-NEXT: adds r0, :lower8_15:aa
172 ; V6M-NEXT: adds r0, :lower0_7:aa
178 ; V6M-NEXT: adds r
[all...]
H A Dumul_fix.ll19 ; ARM-NEXT: adds r0, r1, r0
50 ; ARM-NEXT: adds r0, r0, r1
61 ; ARM-NEXT: adds r0, r0, r1
69 ; ARM-NEXT: adds r0, r0, r5
73 ; ARM-NEXT: adds r1, r0, r1
77 ; ARM-NEXT: adds r0, r0, r2
97 ; ARM-NEXT: adds r0, r1, r0
160 ; ARM-NEXT: adds r0, r0, r1
171 ; ARM-NEXT: adds r0, r0, r1
179 ; ARM-NEXT: adds r
[all...]
H A Dframe-access.ll72 ; CHECK-FP-ATPCS: adds r0, #8
76 ; CHECK-FP-AAPCS: adds r7, #8
135 ; CHECK-ATPCS-NEXT: adds r0, #8
139 ; CHECK-AAPCS: adds r7, #8
283 ; CHECK-NOFP-NEXT: adds r0, #36
287 ; CHECK-FP-ATPCS-NEXT: adds r0, #8
291 ; CHECK-FP-AAPCS-NEXT: adds r5, #8
421 ; CHECK-AAPCS: adds r5, r6, #4
423 ; CHECK: adds r0, r6, #7
424 ; CHECK-ATPCS-NEXT: adds r0, #1
[all …]
H A Dsmul_fix.ll19 ; ARM-NEXT: adds r0, r1, r0
53 ; ARM-NEXT: adds r0, r0, r1
64 ; ARM-NEXT: adds r5, r0, r1
71 ; ARM-NEXT: adds r0, r0, r4
74 ; ARM-NEXT: adds r1, r0, r1
78 ; ARM-NEXT: adds r0, r0, r2
100 ; ARM-NEXT: adds r0, r1, r0
167 ; ARM-NEXT: adds r0, r0, r1
178 ; ARM-NEXT: adds r5, r0, r1
184 ; ARM-NEXT: adds r
[all...]

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