Home
last modified time | relevance | path

Searched +full:64 +full:- +full:bit (Results 1 – 25 of 1164) sorted by relevance

12345678910>>...47

/freebsd-src/contrib/llvm-project/clang/lib/Headers/
H A Dmmintrin.h1 /*===---- mmintrin.h - MMX intrinsics -----
[all...]
H A Dfmaintrin.h1 /*===---- fmaintrin.h - FMA intrinsics -----
[all...]
H A Dbmi2intrin.h1 /*===---- bmi2intrin.h - BMI2 intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Copies the unsigned 32-bit integer \a __X and zeroes the upper bits
21 /// starting at bit number \a __Y.
36 /// The 32-bit source value to copy.
38 /// The lower 8 bits specify the bit number of the lowest bit to zero.
39 /// \returns The partially zeroed 32-bit value.
46 /// Deposit (scatter) low-order bits from the unsigned 32-bit integer \a __X
47 /// into the 32-bit result, according to the mask in the unsigned 32-bit
[all …]
H A Dtmmintrin.h1 /*===---- tmmintrin.h - SSSE3 intrinsics -----
[all...]
H A Demmintrin.h1 /*===---- emmintrin.h - SSE2 intrinsics -----
[all...]
H A Draointintrin.h1 /*===----------------------- raointintrin.h - RAOINT ------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Atomically add a 32-bit value at memory operand \a __A and a 32-bit \a __B,
31 /// A pointer to a 32-bit memory location.
33 /// A 32-bit integer value.
42 /// Atomically and a 32-bit value at memory operand \a __A and a 32-bit \a __B,
53 /// A pointer to a 32-bit memory location.
55 /// A 32-bit integer value.
64 /// Atomically or a 32-bit value at memory operand \a __A and a 32-bit \a __B,
[all …]
H A Dbmiintrin.h1 /*===---- bmiintrin.h - BMI intrinsics -----
[all...]
H A Dammintrin.h1 /*===---- ammintrin.h - SSE4a intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
22 /// Extracts the specified bits from the lower 64 bits of the 128-bit
37 /// are zero, the length is interpreted as 64.
39 /// Bits [5:0] specify the index of the least significant bit; the other
40 /// bits are ignored. If the sum of the index and length is greater than 64,
43 /// index is non-zero, the result is undefined.
44 /// \returns A 128-bit integer vector whose lower 64 bits contain the bits
50 /// Extracts the specified bits from the lower 64 bits of the 128-bit
[all …]
H A Dia32intrin.h1 /* ===-------- ia32intrin.h --
[all...]
H A Dxmmintrin.h1 /*===---- xmmintrin.h - SSE intrinsics -----
[all...]
H A Davxifmaintrin.h1 /*===----------------- avxifmaintrin.h - IFMA intrinsics -------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
25 // must vex-encoding
27 /// Multiply packed unsigned 52-bit integers in each 64-bit element of \a __Y
28 /// and \a __Z to form a 104-bit intermediate result. Add the high 52-bit
30 /// unsigned 64-bit integer in \a __X, and store the results in \a dst.
44 /// A 128-bit vector of [2 x i64]
46 /// A 128-bit vector of [2 x i64]
48 /// A 128-bit vector of [2 x i64]
[all …]
H A Dadcintrin.h1 /*===---- adcintrin.h - ADC intrinsics -------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
31 /// Adds unsigned 32-bit integers \a __x and \a __y, plus 0 or 1 as indicated
32 /// by the carry flag \a __cf. Stores the unsigned 32-bit sum in the memory
33 /// at \a __p, and returns the 8-bit carry-out (carry flag).
46 /// The 8-bit unsigned carry flag; any non-zero value indicates carry.
48 /// A 32-bit unsigned addend.
50 /// A 32-bit unsigned addend.
53 /// \returns The 8-bit unsigned carry-out value.
[all …]
/freebsd-src/contrib/llvm-project/clang/include/clang/Basic/
H A DBuiltinsRISCV.def
H A DBuiltinsLoongArchBase.def1 //============------------ BuiltinsLoongArchBase.def -------------*- C++ -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines the LoongArch-specific basic builtin function database.
13 //===----------------------------------------------------------------------===//
15 TARGET_BUILTIN(__builtin_loongarch_cacop_d, "vWiUWiWi", "nc", "64bit")
16 TARGET_BUILTIN(__builtin_loongarch_cacop_w, "viUii", "nc", "32bit")
24 TARGET_BUILTIN(__builtin_loongarch_asrtle_d, "vWiWi", "nc", "64bit")
25 TARGET_BUILTIN(__builtin_loongarch_asrtgt_d, "vWiWi", "nc", "64bit")
27 TARGET_BUILTIN(__builtin_loongarch_crc_w_b_w, "iii", "nc", "64bit")
[all …]
/freebsd-src/secure/lib/libcrypto/man/man3/
H A DOPENSSL_ia32cap.318 .\" Set up some character translations and predefined strings. \*(-- will
24 .tr \(*W-
27 . ds -- \(*W-
29 . if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
30 . if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\" diablo 12 pitch
37 . ds -- \|\(em\|
71 .\" Fear. Run. Save yourself. No user-serviceable parts.
81 . ds #H ((1u-(\\\\n(.fu%2u))*.13m)
97 . ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
98 . ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
[all …]
/freebsd-src/contrib/file/magic/Magdir/
H A Dmach2 #------------------------------------------------------------
8 #------------------------------------------------------------
9 # if set, it's for the 64-bit version of the architecture
10 # yes, this is separate from the low-order magic number bit
11 # it's also separate from the "64-bit libraries" bit in the
14 # Reference: https://opensource.apple.com/source/cctools/cctools-949.0.1/
15 # include/mach-o/loader.h
17 0 name mach-o-cpu
20 # 32-bit ABIs.
153 # 64-bit ABIs.
[all …]
H A Ddyadic2 #------------------------------------------------------------------------------
21 >>>1 byte 0x01 component file 32-bit non-journaled non-checksummed
27 >>>>7 byte&0x28 0x00 32-bit
28 >>>>7 byte&0x28 0x20 64-bit
31 >>>>7 byte&0x88 0x00 big-endian
32 >>>>7 byte&0x88 0x80 little-endian
36 >>>1 byte 0x08 mapped file 32-bit
37 >>>1 byte 0x09 component file 64-bit non-journaled non-checksummed
38 >>>1 byte 0x0a mapped file 64-bit
39 >>>1 byte 0x0b component file 32-bit level 1 journaled non-checksummed
[all …]
/freebsd-src/crypto/openssl/doc/man3/
H A DOPENSSL_ia32cap.pod5 OPENSSL_ia32cap - the x86[_64] processor capabilities vector
24 =item bit #4 denoting presence of Time-Stamp Counter.
26 =item bit #19 denoting availability of CLFLUSH instruction;
28 =item bit #20, reserved by Intel, is used to choose among RC4 code paths;
30 =item bit #23 denoting MMX support;
32 =item bit #24, FXSR bit, denoting availability of XMM registers;
34 =item bit #25 denoting SSE support;
36 =item bit #26 denoting SSE2 support;
38 =item bit #28 denoting Hyperthreading, which is used to distinguish
41 =item bit #30, reserved by Intel, denotes specifically Intel CPUs;
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSchedule.td1 //===-- RISCVSchedule.td - RISC-V Scheduling Definitions ---*- tablegen -*-
[all...]
/freebsd-src/sys/contrib/openzfs/config/
H A Dhost-cpu-c-abi.m41 # host-cpu-c-abi.m4 serial 11
2 dnl Copyright (C) 2002-2019 Free Software Foundation, Inc.
24 dnl contains 32-bit instructions, whereas 'sparc64' code contains 64-bit
25 dnl instructions. A process on a SPARC CPU can be in 32-bit mode or in 64-bit
36 dnl - 'arm': test __ARMEL__.
37 dnl - 'mips', 'mipsn32', 'mips64': test _MIPSEB vs. _MIPSEL.
38 dnl - 'powerpc64': test _BIG_ENDIAN vs. _LITTLE_ENDIAN.
41 dnl - Instructions that do not exist on all of these CPUs (cmpxchg,
45 dnl - Speed of execution of the common instruction set is reasonable across
66 # - 64-bit instruction set, 64-bit pointers, 64-bit 'long': x86_64.
[all …]
/freebsd-src/sys/dev/liquidio/base/
H A Dcn23xx_pf_regs.h60 /* 2 scatch registers (64-bit) */
66 /* 1 registers (64-bit) - SLI_CTL_STATUS */
70 * SLI Packet Input Jabber Register (64 bit register)
96 * 4 registers (64-bit) for mapping IOQs to MACs(PEMs)-
101 /*1 register (64-bit) to determine whether IOQs are in reset. */
104 /* Each Input Queue register is at a 16-byte Offset in BAR0 */
118 /* Starting bit of the TRS field in LIO_CN23XX_SLI_PKT_MAC_RINFO64 register */
123 /* 64 registers for Input Queue Instr Count - SLI_PKT_IN_DONE0_CNTS */
126 /* 64 registers for Input Queues Start Addr - SLI_PKT0_INSTR_BADDR */
129 /* 64 registers for Input Doorbell - SLI_PKT0_INSTR_BAOFF_DBELL */
[all …]
/freebsd-src/sys/contrib/edk2/Include/Library/
H A DBaseLib.h3 functions, file path functions, and CPU architecture-specific functions.
5 Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
6 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
18 // Definitions for architecture-specific types
22 /// The IA-32 architecture context buffer used by SetJump() and LongJump().
54 UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
132 /// The RISC-V architecture context buffer used by SetJump() and LongJump().
161 Returns the length of a Null-terminated Unicode string.
165 If String is not aligned on a 16-bit boundary, then ASSERT().
[all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def1 //===- AArch64GenRegisterBankInfo.def ---------
[all...]
/freebsd-src/contrib/llvm-project/compiler-rt/lib/builtins/ppc/
H A Dfloattitf.c1 //===-- lib/builtins/ppc/floattitf.c - Convert int128->long double -*-C -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file implements converting a signed 128 bit integer to a 128bit IBM /
10 // PowerPC long double (double-double) value.
12 //===----------------------------------------------------------------------===//
16 // Conversions from signed and unsigned 64-bit int to long double.
20 // Convert a signed 128-bit integer to long double.
21 // This uses the following property: Let hi and lo be 64-bits each,
23 // argument interpreted as a signed or unsigned k-bit integer. Then,
[all …]
/freebsd-src/sys/contrib/dev/acpica/components/tables/
H A Dtbfadt.c3 * Module Name: tbfadt - FADT table utilities
11 * Some or all of this work - Copyright (c) 1999 - 2024, Intel Corp.
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
108 * any of its subsidiaries will export/re-export any technical data, process,
130 * 3. Neither the names of the above-listed copyright holders nor the names
303 * PARAMETERS: GenericAddress - GA
[all...]

12345678910>>...47