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/freebsd-src/sys/contrib/device-tree/src/arm/aspeed/
H A Dopenbmc-flash-layout-128.dtsi8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
H A Dopenbmc-flash-layout-64.dtsi11 u-boot@0 {
12 reg = <0x0 0xe0000>; // 896KB
17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x2000000>; // 32MB
32 reg = <0x2a00000 0x1600000>; // 22MB
H A Dopenbmc-flash-layout-64-alt.dtsi11 u-boot@0 {
12 reg = <0x0 0xe0000>; // 896KB
17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x2000000>; // 32MB
32 reg = <0x2a00000 0x1600000>; // 22MB
/freebsd-src/sys/contrib/device-tree/src/arm64/hisilicon/
H A Dhip05-d02.dts17 memory@0 {
19 reg = <0x0 0x00000000 0x0 0x80000000>;
37 debounce-interval = <0>;
54 ranges = <0 0 0x0 0x9000000
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/moxa/
H A Dmoxart-uc7112lx.dts16 reg = <0x0 0x2000000>;
22 #clock-cells = <0>;
27 flash@80000000,0 {
29 reg = <0x80000000 0x1000000>;
33 partition@0 {
35 reg = <0x0 0x40000>;
39 reg = <0x40000 0x1C0000>;
43 reg = <0x200000 0x800000>;
47 reg = <0xa00000 0x600000>;
55 gpios = <&gpio 27 0x1>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-linksys-cobra.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
H A Darmada-385-linksys-shelby.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
H A Darmada-385-linksys-caiman.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
H A Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
H A Dkirkwood-dnskw.dtsi11 pinctrl-0 = <&pmx_button_power &pmx_button_unmount
35 pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>;
39 gpio-fan,speed-map = <0 0>,
46 pinctrl-0 = <&pmx_power_off>;
54 pinctrl-0 = <&pmx_power_back_on &pmx_present_sata0
145 pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
155 #size-cells = <0>;
156 pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
168 gpio = <&gpio1 7 0>;
[all...]
H A Darmada-xp-linksys-mamba.dts6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
34 memory@0 {
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
64 pinctrl-0 = <&ge0_rgmii_pins>;
69 bm,pool-long = <0>;
[all …]
/freebsd-src/sys/contrib/dev/iwlwifi/
H A Diwl-io.h23 iwl_trans_set_bits_mask(trans, reg, mask, 0); in iwl_clear_bit()
44 iwl_write_prph_delay(trans, ofs, val, 0); in iwl_write_prph()
61 * UMAC periphery address space changed from 0xA00000 to 0xD00000 starting from
/freebsd-src/sys/contrib/device-tree/Bindings/mtd/
H A Dingenic,nand.yaml66 reg = <0x13410000 0x10000>;
69 ranges = <1 0 0x1b000000 0x1000000>,
70 <2 0 0x1a000000 0x1000000>,
71 <3 0 0x19000000 0x1000000>,
72 <4 0 0x18000000 0x1000000>,
73 <5 0 0x17000000 0x1000000>,
74 <6 0 0x16000000 0x1000000>;
80 reg = <1 0 0x1000000>;
83 #size-cells = <0>;
94 pinctrl-0 = <&pins_nemc>;
[all …]
/freebsd-src/lib/msun/ld128/
H A Ds_logl.c55 * rest of p(d). In the worst case when k = 0 and log(X_i) is 0, the final
70 * in beginning with the Taylor coefficients 0 + 1*d, which tends to happen
98 P3 = 3.33333333333333333333333333333233795e-1L, /* 0x15555555555555555555555554d42.0p-114L */
99 P4 = -2.49999999999999999999999999941139296e-1L, /* -0x1ffffffffffffffffffffffdab14e.0p-115L */
100 P5 = 2.00000000000000000000000085468039943e-1L, /* 0x19999999999999999999a6d3567f4.0p-115L */
101 P6 = -1.66666666666666666666696142372698408e-1L, /* -0x15555555555555555567267a58e13.0p-115L */
102 P7 = 1.42857142857142857119522943477166120e-1L, /* 0x1249249249249248ed79a0ae434de.0p-115L */
103 P8 = -1.24999999999999994863289015033581301e-1L; /* -0x1fffffffffffffa13e91765e46140.0p-116L */
106 P9 = 1.1111111111111401e-1, /* 0x1c71c71c71c7ed.0p-56 */
107 P10 = -1.0000000000040135e-1, /* -0x199999999a0a92.0p-56 */
[all …]
/freebsd-src/lib/msun/ld80/
H A Ds_logl.c55 * rest of p(d). In the worst case when k = 0 and log(X_i) is 0, the final
70 * in beginning with the Taylor coefficients 0 + 1*d, which tends to happen
103 P3 = 3.3333333333333359e-1, /* 0x1555555555555a.0p-54 */
104 P4 = -2.5000000000004424e-1, /* -0x1000000000031d.0p-54 */
105 P5 = 1.9999999992970016e-1, /* 0x1999999972f3c7.0p-55 */
106 P6 = -1.6666666072191585e-1, /* -0x15555548912c09.0p-55 */
107 P7 = 1.4286227413310518e-1, /* 0x12494f9d9def91.0p-55 */
108 P8 = -1.2518388626763144e-1; /* -0x1006068cc0b97c.0p-55 */
110 static volatile const double zero = 0;
154 { 0x800000.0p-23, 0, 0 },
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/airoha/
H A Den7523.dtsi20 reg = <0x84000000 0xA00000>;
25 reg = <0x84B00000 0x100000>;
30 reg = <0x85000000 0x1A00000>;
35 reg = <0x86B00000 0x100000>;
40 reg = <0x86D00000 0x100000>;
51 #size-cells = <0>;
64 cpu0: cpu@0 {
67 reg = <0x0>;
76 reg = <0x1>;
91 reg = <0x1fa20000 0x400>,
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/amd/
H A Delba.dtsi20 #clock-cells = <0>;
25 #clock-cells = <0>;
30 #clock-cells = <0>;
35 #clock-cells = <0>;
64 reg = <0x0 0x400 0x0 0x100>;
67 #size-cells = <0>;
75 reg = <0x
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/display/msm/
H A Dgpu.yaml32 - pattern: '^qcom,adreno-[0-9a-f]{8}$'
38 - pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]+$'
44 - pattern: '^amd,imageon-200\.[0-1]$'
149 pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$'
225 pattern: '^qcom,adreno-[67][0-9][0
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-sdx55-telit-fn980-tlb.dts16 qcom,board-id = <0xb010008 0x0>;
33 reg = <0x8ef00000 0x800000>;
38 reg = <0x8fced000 0x10000>;
43 reg = <0x90800000 0xf800000>;
91 states = <1800000 0>, <2850000 1>;
101 regulators-0 {
254 pinctrl-0 = <&pcie_ep_clkreq_default &pcie_ep_perst_default
270 nand@0 {
271 reg = <0>;
277 secure-regions = /bits/ 64 <0x500000 0x500000
[all …]
H A Dqcom-sdx65-mtp.dts20 qcom,board-id = <0x2010008 0x302>;
37 reg = <0x8c400000 0x3200000>;
42 reg = <0x8fced000 0x10000>;
47 reg = <0x90800000 0x10000000>;
72 regulators-0 {
258 pinctrl-0 = <&pcie_ep_clkreq_default
283 nand@0 {
284 reg = <0>;
290 secure-regions = /bits/ 64 <0x500000 0x500000
291 0xa00000 0xb00000>;
/freebsd-src/sys/dts/arm/
H A Dvybrid.dtsi56 bus-frequency = <0>;
60 reg = <0x4006E000 0x100>;
65 reg = <0x40001000 0x1000>;
70 reg = <0x40003000 0x1000>, /* Distributor Registers */
71 <0x40002100 0x100>; /* CPU Interface Registers */
78 reg = <0x40050000 0x300>;
83 reg = <0x4006b000 0x1000>;
91 #size-cells = <0>;
92 reg = < 0x40002200 0x100 >, /* Global Timer Registers */
93 < 0x40002600 0x100 >; /* Private Timer Registers */
[all …]
/freebsd-src/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110-starfive-visionfive-2.dtsi23 #size-cells = <0>;
27 reg = <0>;
/freebsd-src/sys/contrib/device-tree/src/mips/ingenic/
H A Dci20.dts27 reg = <0x0 0x10000000
28 0x30000000 0x30000000>;
45 led-0 {
65 gpios = <&gpc 0 GPIO_ACTIVE_HIGH>;
70 eth0_power: fixedregulator-0 {
77 gpio = <&gpb 25 0>;
110 gpio = <&gpb 19 0>;
121 gpio = <&gpf 15 0>;
172 assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>,
175 <0>, <&cgu JZ4780_CLK_MPLL>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm850-samsung-w737.dts50 reg = <0 0x80400000 0 (1920 * 1280 * 4)>;
66 reg = <0x0 0x80400000 0x0 0x960000>;
71 reg = <0 0x8b500000 0 0xa00000>;
76 reg = <0 0x8c400000 0 0x100000>;
81 reg = <0 0x8c500000 0 0x1200000>;
86 reg = <0 0x8d700000 0 0x100000>;
91 reg = <0 0x8d800000 0 0x5000>;
96 reg = <0 0x8e000000 0 0x8000000>;
101 reg = <0 0x96000000 0 0x2000000>;
106 reg = <0 0x98000000 0 0x800000>;
[all …]
H A Dqdu1000.dtsi26 #size-cells = <0>;
28 CPU0: cpu@0 {
31 reg = <0x0 0x0>;
32 clocks = <&cpufreq_hw 0>;
36 qcom,freq-domains = <&cpufreq_hw 0>;
54 reg = <0x0 0x100>;
55 clocks = <&cpufreq_hw 0>;
59 qcom,freq-domains = <&cpufreq_hw 0>;
[all...]

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