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/llvm-project/llvm/test/MC/AMDGPU/
H A Dvop_dpp.s13 // NOSICI: :[[@LINE+2]]:{{[0-9]+}}: error: not a valid operand.
14 // VI9: v_mov_b32_dpp v0, v0 quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x02,0x00,0x7e,0x00,0x5
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/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrMMA.td19 XX3Form_AT3_XAB6<opcode, !or(xo, 0x01), (outs acc:$AT), IOL,
29 XX3Form_AT3_XAB6<opcode, !or(xo, 0x01), (outs wacc:$AT), IOL,
47 opcode, !or(xo, 0x01), (outs acc:$AT),
64 opcode, !or(xo, 0x01), (outs wacc:$AT),
88 opcode, !or(xo, 0x01), (outs acc:$AT),
105 opcode, !or(xo, 0x01), (outs wacc:$AT),
129 opcode, !or(xo, 0x01), (outs acc:$AT),
145 opcode, !or(xo, 0x01), (outs wacc:$AT),
161 // Upper nibble of XO field for acc/non-acc version is 0x4/0x6.
171 opcode, !or(xo, 0x20), (outs acc:$AT), !con((ins acc:$ATi), IOL),
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H A DPPCInstrVSX.td3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
51 // ** printing (for example: xxswapd for xxpermdi with 0x2 as the imm). **
55 SDTCisVT<0, v4f32>, SDTCisPtrTy<1>
59 SDTCisVT<0, v2f64>, SDTCisVT<1, v4f32>, SDTCisPtrTy<2>
63 SDTCisVec<0>, SDTCisPtrTy<1>
68 SDTCisVT<0, v2f64>, SDTCisPtrTy<1>
70 def SDT_PPCstxvd2x : SDTypeProfile<0, 2, [
71 SDTCisVT<0, v2f64>, SDTCisPtrTy<1>
74 SDTCisSameAs<0, 1>
77 SDTCisVec<0>, SDTCisVe
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H A DREADME_P9.txt55 // PowerISA_V3.0:
56 do i = 0 to 3
63 // PowerISA_V3.0:
64 do i = 0 to 3
71 // PowerISA_V3.0:
72 do i = 0 to 1
79 // PowerISA_V3.0:
80 do i = 0 to 1
87 // PowerISA_V3.0:
88 do i = 0 to 1
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/llvm-project/llvm/test/CodeGen/AArch64/
H A Dcsel-andor-onebit.ll6 ; CHECK: // %bb.0:
7 ; CHECK-NEXT: and w8, w0, #0x1
8 ; CHECK-NEXT: cmp w1, #0
11 %xa = and i32 %x, 1
12 %c = icmp eq i32 %y, 0
14 %a = or i32 %xa, %cz
20 ; CHECK: // %bb.0:
21 ; CHECK-NEXT: and w8, w0, #0x1
22 ; CHECK-NEXT: cmp w1, #0
25 %xa = and i32 %x, 1
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H A Darm64-xaluo.ll11 ; SDAG: // %bb.0: // %entry
18 ; FAST: // %bb.0: // %entry
22 ; FAST-NEXT: and w0, w9, #0x1
26 ; GISEL: // %bb.0: // %entry
33 %val = extractvalue {i32, i1} %t, 0
42 ; SDAG: // %bb.0: // %entry
49 ; FAST: // %bb.0: // %entry
53 ; FAST-NEXT: and w0, w9, #0x1
57 ; GISEL: // %bb.0: // %entry
64 %val = extractvalue {i32, i1} %t, 0
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/llvm-project/llvm/test/CodeGen/Thumb2/
H A Dcsel-andor-onebit.ll6 ; CHECK: @ %bb.0:
8 ; CHECK-NEXT: cmp r1, #0
11 %xa = and i32 %x, 1
12 %c = icmp eq i32 %y, 0
14 %a = or i32 %xa, %cz
20 ; CHECK: @ %bb.0:
22 ; CHECK-NEXT: cmp r1, #0
25 %xa = and i32 %x, 1
26 %c = icmp eq i32 %y, 0
28 %a = or i32 %cz, %xa
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/llvm-project/llvm/test/tools/llvm-symbolizer/
H A Dbasic.s11 # RUN: echo -e "0xa\n0xb" | llvm-symbolizer --obj=%t.o | FileCheck %s
15 # RUN: llvm-symbolizer 0xa 0xb --obj=%t.o | FileCheck %s
19 # RUN: llvm-symbolizer 0xa 0xb --exe=%t.o | FileCheck %s
20 # RUN: llvm-symbolizer 0xa 0xb --exe %t.o | FileCheck %s
21 # RUN: llvm-symbolizer 0xa 0xb -e %t.o | FileCheck %s
22 # RUN: llvm-symbolizer 0xa 0xb -e=%t.o | FileCheck %s
23 # RUN: llvm-symbolizer 0xa 0xb -e%t.o | FileCheck %s
25 # CHECK: basic.s:5:0
26 # CHECK: basic.s:6:0
H A Dadjust-vma.s12 # RUN: llvm-symbolizer 0xa 0xb --print-address --obj=%t.o \
14 # RUN: llvm-symbolizer 0x10a 0x10b --print-address --adjust-vma 0x100 --obj=%t.o \
18 # RUN: llvm-symbolizer 0xa 0xb --print-address --adjust-vma 0xc --obj=%t.o \
21 # NORMAL: 0xa
23 # NORMAL-NEXT: adjust-vma.s:7:0
25 # NORMAL-NEXT: 0xb
27 # NORMAL-NEXT: adjust-vma.s:8:0
29 # ADJUST: 0x10a
31 # ADJUST-NEXT: adjust-vma.s:7:0
33 # ADJUST-NEXT: 0x10b
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/llvm-project/flang/test/Lower/
H A Dcommon-block-2.f9010 ! CHECK: %[[init:.*]] = fir.insert_value %[[undef]], %c42{{.*}}, [0 : index] : (tuple<i32, !fir.ar…
15 ! CHECK: %[[init:.*]] = fir.insert_value %[[undef]], %c42{{.*}}, [0 : index] : (tuple<i32, !fir.ar…
20 real :: x, y, xa, ya local
22 common /a/ xa, ya local
23 call foo(x, xa)
27 real :: x, y, z, xa, ya, za local
29 common /a/ xa, ya, za local
30 call foo(x, xa)
34 integer :: x = 42, xa = 42 local
36 common /a/ xa local
/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CollectLOH.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
19 // L1: adrp xA, sym@PAGE
20 // L2: add xB, xA, sym@PAGEOFF
28 // L1: adrp xA, sym@PAGE
31 // L1: adr xA, sym
41 // - The register argument (xA) used in the ADD instruction is defined
51 // L1: adrp xA, sym@PAGE
52 // L2: add xB, xA, sym@PAGEOFF
55 // L1: adrp xA, sym@GOTPAGE
56 // L2: ldr xB, [xA, sy
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/llvm-project/llvm/test/CodeGen/MIR/X86/
H A Dexpected-metadata-node-in-stack-object.mir5 %xa = alloca i32, align 4
6 store i32 %x, ptr %xa, align 4
7 %0 = load i32, ptr %xa, align 4
8 ret i32 %0
16 - { id: 0, name: xa, offset: -12, size: 4, alignment: 4,
18 debug-info-variable: '0' }
20 bb.0.entry:
23 MOV32mr $rsp, 1, _, -4, _, $edi :: (store (s32) into %ir.xa)
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/llvm-project/llvm/test/DebugInfo/
H A Dsymbolize-filter-markup-mmap.test7 …N:\[{3}]]ELF module #0x0 "a.o"; BuildID=abb50d82b6bdc861 [0x0-0x0](rwx),[0x1-0x1](r),[0x2-0x2](w),…
9 ERR: error: expected at least 3 field(s); found 0
17 ERR: error: overlapping mmap: #0x0 [0xa-0xb]
18 ERR: error: overlapping mmap: #0x0 [0xa-0xb]
19 ERR: error: overlapping mmap: #0x0 [0xa-0xb]
22 {{{module:0:a.o:elf:abb50d82b6bdc861}}}
23 {{{mmap:0x1:1:load:0:r:0}}}
24 {{{mmap:0x2:1:load:0:w:0}}}
25 {{{mmap:0x3:1:load:0:x:0}}}
26 {{{mmap:0x4:1:load:0:rwx:0}}}
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/llvm-project/clang/test/SemaCXX/
H A Dwarn-xor-as-pow.cpp36 res = 2 ^ 0; // expected-warning {{result of '2 ^ 0' is 2; did you mean '1 << 0' (1)?}} in test()
38 // expected-note@-2 {{replace expression with '0x2 ^ 0' or use 'xor' instead of '^' to silence this warning}} in test()
41 // expected-note@-2 {{replace expression with '0x2 ^ 1' or use 'xor' instead of '^' to silence this warning}} in test()
42 res = 2 ^ 2; // expected-warning {{result of '2 ^ 2' is 0; did you mean '1 << 2' (4)?}} in test()
44 // expected-note@-2 {{replace expression with '0x2 ^ 2' or use 'xor' instead of '^' to silence this warning}} in test()
47 // expected-note@-2 {{replace expression with '0x2 ^ 8' or use 'xor' instead of '^' to silence this warning}} in test()
50 // expected-note@-2 {{replace expression with '0x in test()
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H A Doverload-template.cpp21 struct XA { struct
22 XA(const A&);
32 void InsertRow(const XA&, const YB&); // expected-note {{candidate function not viable: no known co…
56 int x = S{}.f(0); in main()
57 int y = S{}.g(0); in main()
65 (void)b<int, int>(0, 0, d); // expected-error {{no matching function for call to 'b'}} in d()
66 (void)b<int, int>(0, d, 0); // expected-error {{no matching function for call to 'b'}} in d()
67 (void)b<int, int>(d, 0, 0); // expected-error {{no matching function for call to 'b'}} in d()
68 return 0; in d()
/llvm-project/clang/test/CodeGenObjCXX/
H A Divar-objects.mm42 X xa[2][2]; field
53 printf( "ya[0..2] = %d %d %d\n", ya[0].value, ya[1].value, ya[2].value);
63 printf( "xa[0..1][0..1] = %d %d %d %d\n",
64 xa[0][0].value, xa[0][1].value, xa[1][0].value, xa[1][1].value);
/llvm-project/llvm/test/CodeGen/ARM/
H A Dalias_store.ll3 @X = constant {i8, i8 } { i8 0, i8 0 }
4 @XA = alias i8, getelementptr inbounds ({ i8, i8 }, ptr @X, i32 0, i32 1)
8 store ptr @XA, ptr %p, align 4
15 ; CHECK-NEXT: .long XA
16 ; CHECK: .set XA, X+1
/llvm-project/llvm/test/Transforms/IndVarSimplify/
H A Dpreserve-nsw-during-expansion.ll7 define void @test_s172(i32 noundef %xa, i32 noundef %xb, ptr nocapture noundef %a, ptr nocapture noundef readonly %b) {
9 ; CHECK-SAME: i32 noundef [[XA:%.*]], i32 noundef [[XB:%.*]], ptr noundef captures(none) [[A:%.*]], ptr noundef readonly captures(none) [[B:%.*]]) {
11 ; CHECK-NEXT: [[SUB:%.*]] = add i32 [[XA]], -1
12 ; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[XA]], 32001
28 ; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]], !llvm.loop [[LOOP0:![0-9]+]]
35 %sub = add nsw i32 %xa, -1
36 %cmp1 = icmp slt i32 %xa, 32001
46 %0 = load i32, ptr %arrayidx, align 4
49 %add = add nsw i32 %1, %0
53 br i1 %cmp, label %for.body, label %for.end.loopexit, !llvm.loop !0
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/llvm-project/lld/test/ELF/Inputs/
H A Dppc64-tls.s9 .long 10 # 0xa
14 .long 10 # 0xa
19 .long 10 # 0xa
/llvm-project/llvm/test/tools/llvm-xray/X86/Inputs/
H A Dsimple-instrmap.yaml4 - { id: 1, address: 0x1, function: 0x1, kind: function-enter, always-instrument: true}
5 - { id: 1, address: 0x2, function: 0x1, kind: function-exit, always-instrument: true}
6 - { id: 2, address: 0x2, function: 0x2, kind: function-enter, always-instrument: true}
7 - { id: 2, address: 0x3, function: 0x2, kind: function-exit, always-instrument: true}
8 - { id: 3, address: 0x3, function: 0x3, kind: function-enter, always-instrument: true}
9 - { id: 3, address: 0x4, function: 0x3, kind: function-exit, always-instrument: true}
10 - { id: 4, address: 0x4, function: 0x4, kind: function-enter, always-instrument: true}
11 - { id: 4, address: 0x5, function: 0x4, kind: function-exit, always-instrument: true}
12 - { id: 5, address: 0x5, function: 0x5, kind: function-enter, always-instrument: true}
13 - { id: 5, address: 0x6, function: 0x5, kind: function-exit, always-instrument: true}
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/llvm-project/clang/test/Driver/
H A Ddefsym.s4 // RUN: -Wa,-defsym,abc=5 -Wa,--defsym,xyz=0xa \
8 // RUN: -Wa,-defsym,abc=5 -Wa,--defsym,xyz=0xa \
11 // CHECK-DEFSYM1: "--defsym" "abc=5" "--defsym" "xyz=0xa"
12 // CHECK-DEFSYM1-GAS: "-defsym" "abc=5" "--defsym" "xyz=0xa"
/llvm-project/clang/test/OpenMP/
H A Dparallel_sections_lastprivate_messages.cpp21 S2() : a(0) {} in S2()
27 const float S2::S2sc = 0;
35 S3() : a(0) {} in S3()
51 S5() : a(0) {} // expected-note {{implicitly declared private here}} in S5()
59 S6() : a(0) {} in S6()
95 #pragma omp parallel sections lastprivate(argc > 0 ? argv[1] : argv[2]) // expected-error {{expecte… in foomain()
137 int v = 0; in foomain()
155 return 0; in foomain()
168 const int da[5] = {0}; // expected-note {{'da' defined here}} in main()
195 #pragma omp parallel sections lastprivate(argc > 0 ? argv[1] : argv[2]) // expected-error {{expecte… in main()
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/llvm-project/llvm/test/CodeGen/SPARC/
H A Dbasictest.ll33 store i32 0, ptr %a, align 4
34 %0 = getelementptr inbounds i32, ptr %b, i32 1
35 store i32 0, ptr %0, align 4
36 ret i32 0
67 %xa = sext i32 %a to i64
69 %r = mul i64 %xa, %xb
79 %xa = zext i32 %a to i64
81 %r = mul i64 %xa, %xb
88 ; CHECK: addxcc %o2, 0,
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/llvm-project/clang/test/PCH/
H A Dchain-external-defs.c8 // RUN: FileCheck -input-file=%t -check-prefix=XA %s
19 // XA: @x ={{.*}} global i32 0
20 // XA-NOT: @x ={{.*}} global i32 0
22 // YA: @y ={{.*}} global i32 0
23 // YA-NOT: @y ={{.*}} global i32 0
48 // XA: FINI
/llvm-project/cross-project-tests/debuginfo-tests/dexter-tests/memvars/
H A Dptr-to.c3 //// the incorrect value 0xFF after the call to esc.
17 *p = 0xFF; in esc()
21 int local = 0xA; in main()
24 local = 0xB; //// DSE in main()
25 return 0; // DexLabel('s2') in main()
29 // DexExpectWatchValue('local', 0xA, on_line=ref('s1'))
30 // DexExpectWatchValue('local', 0xB, on_line=ref('s2'))
31 // DexExpectWatchValue('*plocal', 0xA, on_line=ref('s1'))
32 // DexExpectWatchValue('*plocal', 0xB, on_line=ref('s2'))
33 //// Ideally we should be able to observe the dead store to local (0xB) through

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