/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMSystemRegister.td | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40 let M2M3Encoding8{7-0} = Enc12{7-0}; 47 def : MClassSysReg<0, 0, 0, 0x400, "apsr_g">; 48 def : MClassSysReg<0, 1, 1, 0xc00, "apsr_nzcvqg">; 49 def : MClassSysReg<0, 0, 0, 0x401, "iapsr_g">; 50 def : MClassSysReg<0, 1, 1, 0xc01, "iapsr_nzcvqg">; 51 def : MClassSysReg<0, 0, 0, 0x402, "eapsr_g">; 52 def : MClassSysReg<0, 1, 1, 0xc02, "eapsr_nzcvqg">; 53 def : MClassSysReg<0, 0, 0, 0x403, "xpsr_g">; 54 def : MClassSysReg<0, 1, 1, 0xc03, "xpsr_nzcvqg">; [all …]
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/freebsd-src/sys/contrib/device-tree/Bindings/media/ |
H A D | qcom,sm8250-camss.yaml | 113 port@0: 308 reg = <0 0xac6a000 0 0x2000>, 309 <0 0xac6c000 0 0x2000>, 310 <0 0xac6e000 0 0x1000>, 311 <0 0xac70000 0 0x1000>, 312 <0 0xac72000 0 0x1000>, 313 <0 0xac74000 0 0x1000>, 314 <0 0xacb4000 0 0xd000>, 315 <0 0xacc3000 0 0xd000>, 316 <0 0xacd9000 0 0x2200>, [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/apple/ |
H A D | t6002.dtsi | 70 reg = <0x0 0x800>; 72 cpu-release-addr = <0 0>; /* To be filled by loader */ 74 i-cache-size = <0x20000>; 75 d-cache-size = <0x10000>; 84 reg = <0x0 0x801>; 86 cpu-release-addr = <0 0>; /* To be filled by loader */ 88 i-cache-size = <0x20000>; 89 d-cache-size = <0x10000>; 98 reg = <0x0 0x10900>; 100 cpu-release-addr = <0 0>; /* To be filled by loader */ [all …]
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/freebsd-src/sys/arm/nvidia/drm2/ |
H A D | tegra_dc_reg.h | 37 #define DC_CMD_GENERAL_INCR_SYNCPT 0x000 38 #define DC_CMD_GENERAL_INCR_SYNCPT_CNTRL 0x001 40 #define SYNCPT_CNTRL_SOFT_RESET (1 << 0) 42 #define DC_CMD_GENERAL_INCR_SYNCPT_ERROR 0x002 43 #define DC_CMD_WIN_A_INCR_SYNCPT 0x008 44 #define DC_CMD_WIN_A_INCR_SYNCPT_CNTRL 0x009 45 #define DC_CMD_WIN_A_INCR_SYNCPT_ERROR 0x00a 46 #define DC_CMD_WIN_B_INCR_SYNCPT 0x010 47 #define DC_CMD_WIN_B_INCR_SYNCPT_CNTRL 0x011 48 #define DC_CMD_WIN_B_INCR_SYNCPT_ERROR 0x012 [all …]
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/freebsd-src/sys/dev/bwi/ |
H A D | bwiphy.c | 103 #define BWI_PHYTBL_WRSSI 0x1000 104 #define BWI_PHYTBL_NOISE_SCALE 0x1400 105 #define BWI_PHYTBL_NOISE 0x1800 106 #define BWI_PHYTBL_ROTOR 0x2000 107 #define BWI_PHYTBL_DELAY 0x2400 108 #define BWI_PHYTBL_RSSI 0x4000 109 #define BWI_PHYTBL_SIGMA_SQ 0x5000 110 #define BWI_PHYTBL_WRSSI_REV1 0x5400 111 #define BWI_PHYTBL_FREQ 0x5800 187 for (i = 0; i < nitems(bwi_sup_bphy); ++i) { in bwi_phy_attach() [all …]
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H A D | bwirf.c | 106 #define SAVE_RF_REG(mac, regs, n) (regs)->rf_##n = RF_READ((mac), 0x##n) 107 #define RESTORE_RF_REG(mac, regs, n) RF_WRITE((mac), 0x##n, (regs)->rf_##n) 109 #define SAVE_PHY_REG(mac, regs, n) (regs)->phy_##n = PHY_READ((mac), 0x##n) 110 #define RESTORE_PHY_REG(mac, regs, n) PHY_WRITE((mac), 0x##n, (regs)->phy_##n) 165 val = (int16_t)__SHIFTOUT(PHY_READ(mac, 0x47f), NRSSI_11G_MASK); in bwi_nrssi_11g() 191 KASSERT(idx >= 0 && idx < BWI_RFLO_MAX, ("idx %d", idx)); in bwi_rf_lo_isused() 214 if (ctrl < 0x70) in bwi_rf_read() 215 ctrl += 0x80; in bwi_rf_read() 216 else if (ctrl < 0x80) in bwi_rf_read() 217 ctrl += 0x70; in bwi_rf_read() [all …]
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/freebsd-src/sys/dev/dpaa2/ |
H A D | dpaa2_mcp.h | 41 #define DPAA2_MCP_MEM_WIDTH 0x40 /* Minimal size of the MC portal. */ 49 #define DPAA2_PORTAL_DEF 0x0u 50 #define DPAA2_PORTAL_NOWAIT_ALLOC 0x2u /* Do not sleep during init */ 51 #define DPAA2_PORTAL_LOCKED 0x4000u /* Wait till portal's unlocked */ 52 #define DPAA2_PORTAL_DESTROYED 0x8000u /* Terminate any operations */ 55 #define DPAA2_CMD_DEF 0x0u 56 #define DPAA2_CMD_HIGH_PRIO 0x80u /* High priority command */ 57 #define DPAA2_CMD_INTR_DIS 0x100u /* Disable cmd finished intr */ 58 #define DPAA2_CMD_NOWAIT_ALLOC 0x8000u /* Do not sleep during init */ 61 #define DPAA2_CMD_STAT_OK 0x0 /* Set by MC on success */ [all …]
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/freebsd-src/sys/dev/bfe/ |
H A D | if_bfereg.h | 32 #define BFE_PCI_MEMLO 0x10 33 #define BFE_PCI_MEMHIGH 0x14 34 #define BFE_PCI_INTLINE 0x3C 37 #define BFE_DEVCTRL 0x00000000 /* Device Control */ 38 #define BFE_PFE 0x00000080 /* Pattern Filtering Enable */ 39 #define BFE_IPP 0x00000400 /* Internal EPHY Present */ 40 #define BFE_EPR 0x00008000 /* EPHY Reset */ 41 #define BFE_PME 0x00001000 /* PHY Mode Enable */ 42 #define BFE_PMCE 0x00002000 /* PHY Mode Clocks Enable */ 43 #define BFE_PADDR 0x0007c000 /* PHY Address */ [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/tesla/ |
H A D | fsd.dtsi | 39 #size-cells = <0>; 88 /* Cluster 0 */ 89 cpucl0_0: cpu@0 { 92 reg = <0x0 0x000>; 96 i-cache-size = <0xc000>; 99 d-cache-size = <0x8000>; 108 reg = <0x0 0x001>; 112 i-cache-size = <0xc00 [all...] |
/freebsd-src/sys/dev/smartpqi/ |
H A D | smartpqi_main.c | 48 {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"}, 49 {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"}, 50 {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"}, 51 {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"}, 52 {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"}, 53 {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"}, 54 {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"}, 57 {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"}, 58 {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"}, 59 {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"}, [all …]
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/freebsd-src/sys/dev/bhnd/ |
H A D | bhnd_ids.h | 47 * [11:8 ][7:0 ] 53 * ARM's JEP-106 ID of `0x7F 0x7F 0x7F 0x7F 0x3B`, the four 0x7F continuations 54 * are encoded as '4' in the 4-bit continuation code field (i.e. 0x43B). 56 #define BHND_MFGID_ARM 0x043b /**< arm JEP-106 vendor id */ 57 #define BHND_MFGID_BCM 0x04bf /**< broadcom JEP-106 vendor id */ 58 #define BHND_MFGID_MIPS 0x04a7 /**< mips JEP-106 vendor id */ 59 #define BHND_MFGID_INVALID 0x0000 /**< invalid JEP-106 vendor id */ 66 #define OCP_VENDOR_BCM 0x4243 /**< Broadcom OCP vendor id */ 69 #define PCI_VENDOR_ASUSTEK 0x1043 70 #define PCI_VENDOR_EPIGRAM 0xfeda [all …]
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/freebsd-src/lib/libpmc/pmu-events/arch/x86/westmereep-dp/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd-src/lib/libpmc/pmu-events/arch/x86/nehalemep/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd-src/lib/libpmc/pmu-events/arch/x86/westmereex/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd-src/lib/libpmc/pmu-events/arch/x86/nehalemex/ |
H A D | cache.json | 3 "EventCode": "0x63", 4 "Counter": "0,1", 5 "UMask": "0x2", 11 "EventCode": "0x63", 12 "Counter": "0,1", 13 "UMask": "0x1", 19 "EventCode": "0x51", 20 "Counter": "0,1", 21 "UMask": "0x4", 27 "EventCode": "0x51", [all …]
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/freebsd-src/contrib/llvm-project/llvm/lib/TargetParser/ |
H A D | Host.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 82 // The cpu line is second (after the 'processor: 0' line), so if this in getHostCPUNameForPowerPC() 90 size_t CPULen = 0; in getHostCPUNameForPowerPC() 173 for (unsigned I = 0, E = Lines.size(); I != E; ++I) { in getHostCPUNameForARM() 182 if (Implementer == "0x41") { // ARM Ltd. in getHostCPUNameForARM() 189 // The CPU part is a 3 digit hexadecimal number with a 0x prefix. The in getHostCPUNameForARM() 195 .Case("0x926", "arm926ej-s") in getHostCPUNameForARM() 196 .Case("0xb02", "mpcore") in getHostCPUNameForARM() 197 .Case("0xb36", "arm1136j-s") in getHostCPUNameForARM() 198 .Case("0xb5 in getHostCPUNameForARM() [all...] |
/freebsd-src/lib/libpmc/pmu-events/arch/x86/westmereep-sp/ |
H A D | cache.json | 4 "Counter": "0,1", 5 "EventCode": "0x63", 8 "UMask": "0x2" 12 "Counter": "0,1", 13 "EventCode": "0x63", 16 "UMask": "0x1" 20 "Counter": "0,1", 21 "EventCode": "0x51", 24 "UMask": "0x4" 28 "Counter": "0,1", [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 CPU0: cpu@0 { 99 reg = <0x0 0x0>; 100 clocks = <&cpufreq_hw 0>; 107 qcom,freq-domain = <&cpufreq_hw 0>; 109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |
/freebsd-src/sys/dev/mlx5/ |
H A D | mlx5_ifc.h | 32 MLX5_EVENT_TYPE_NOTIFY_ANY = 0x0, 33 MLX5_EVENT_TYPE_COMP = 0x0, 34 MLX5_EVENT_TYPE_PATH_MIG = 0x1, 35 MLX5_EVENT_TYPE_COMM_EST = 0x2, 36 MLX5_EVENT_TYPE_SQ_DRAINED = 0x3, 37 MLX5_EVENT_TYPE_SRQ_LAST_WQE = 0x13, 38 MLX5_EVENT_TYPE_SRQ_RQ_LIMIT = 0x14, 39 MLX5_EVENT_TYPE_DCT_DRAINED = 0x1c, 40 MLX5_EVENT_TYPE_DCT_KEY_VIOLATION = 0x1d, 41 MLX5_EVENT_TYPE_CQ_ERROR = 0x [all...] |