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Searched +full:0 +full:x68000 (Results 1 – 15 of 15) sorted by relevance

/freebsd-src/contrib/file/magic/Magdir/
H A Dx680002 # x68000: file(1) magic for the Sharp Home Computer
3 # v1.0
7 0 string PIC
8 >3 search/0x200 \x1A
9 >>&0 search/0x200 \x0
10 >>>&0 ubyte 0 Yanagisawa PIC image file,
11 >>>>&0 ubyte&15 0 model: X68000,
12 >>>>&0 ubyte&15 1 model: PC-88VA,
13 >>>>&0 ubyte&15 2 model: FM-TOWNS,
14 >>>>&0 ubyte&15 3 model: MAC,
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/soc/qcom/
H A Dqcom,glink.txt67 reg = <0x9820000 0x1000>;
74 reg = <0x68000 0x6000>;
84 mboxes = <&apcs_glb 0>;
90 qcom,intents = <0x400 5
91 0x800 1>;
/freebsd-src/sys/contrib/dev/iwlwifi/cfg/
H A D8000.c20 #define IWL8000_NVM_VERSION 0x0a1d
23 #define IWL8260_DCCM_OFFSET 0x800000
24 #define IWL8260_DCCM_LEN 0x18000
25 #define IWL8260_DCCM2_OFFSET 0x880000
26 #define IWL8260_DCCM2_LEN 0x8000
27 #define IWL8260_SMEM_OFFSET 0x400000
28 #define IWL8260_SMEM_LEN 0x68000
97 .min_umac_error_event_table = 0x800000
H A D9000.c19 #define IWL9000_NVM_VERSION 0x0a1d
22 #define IWL9000_DCCM_OFFSET 0x800000
23 #define IWL9000_DCCM_LEN 0x18000
24 #define IWL9000_DCCM2_OFFSET 0x880000
25 #define IWL9000_DCCM2_LEN 0x8000
26 #define IWL9000_SMEM_OFFSET 0x400000
27 #define IWL9000_SMEM_LEN 0x68000
92 .mac_addr_from_csr = 0x380, \
95 .min_umac_error_event_table = 0x800000, \
96 .d3_debug_data_base_addr = 0x401000, \
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,lpass-cpu.yaml78 const: 0
81 "^dai-link@[0-9a-f]+$":
254 reg = <0 0x62d87000 0 0x68000>,
255 <0 0x62f00000 0 0x29000>;
258 iommus = <&apps_smmu 0x1020 0>,
259 <&apps_smmu 0x1032 0>;
260 power-domains = <&lpass_hm 0>;
273 interrupts = <0 160 1>,
274 <0 268 1>;
280 #size-cells = <0>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-s4.dtsi18 #size-cells = <0>;
20 cpu0: cpu@0 {
23 reg = <0x0 0x0>;
30 reg = <0x0 0x1>;
37 reg = <0x0 0x2>;
44 reg = <0x0 0x
[all...]
/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0
[all...]
/freebsd-src/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_hw_data.h9 #define ADF_C4XXX_SRAM_BAR 0
13 #define ADF_C4XXX_TX_RINGS_MASK 0xF
21 #define ADF_C4XXX_SOFTSTRAPPULL0_OFFSET (0x344)
22 #define ADF_C4XXX_SOFTSTRAPPULL1_OFFSET (0x348)
23 #define ADF_C4XXX_SOFTSTRAPPULL2_OFFSET (0x34C)
26 #define ADF_C4XXX_FUSECTL0_OFFSET (0x350)
27 #define ADF_C4XXX_FUSECTL1_OFFSET (0x354)
28 #define ADF_C4XXX_FUSECTL2_OFFSET (0x358)
30 #define ADF_C4XXX_FUSE_PKE_MASK (0xFFF000)
31 #define ADF_C4XXX_FUSE_COMP_MASK (0x000FFF)
[all …]
/freebsd-src/contrib/file/magic/
H A DMakefile.in139 { print $$2, files[$$2]; n[$$2] = 0; files[$$2] = "" } } \
623 $(MAGIC_FRAGMENT_DIR)/x68000 \
656 && { if test -f $@; then exit 0; else break; fi; }; \
/freebsd-src/sys/contrib/dev/athk/ath10k/
H A Dcoredump.c18 {0x800, 0x810},
19 {0x820, 0x82C},
20 {0x830, 0x8F4},
21 {0x90C, 0x91C},
22 {0xA14, 0xA18},
23 {0xA84, 0xA94},
24 {0xAA8, 0xAD4},
25 {0xADC, 0xB40},
26 {0x1000, 0x10A4},
27 {0x10BC, 0x111C},
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a00000
[all...]
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsc7180.dtsi66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #size-cells = <0>;
80 CPU0: cpu@0 {
83 reg = <0x0 0x0>;
84 clocks = <&cpufreq_hw 0>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
112 reg = <0x0 0x10
[all...]
H A Dsc7280.dtsi81 #clock-cells = <0>;
87 #clock-cells = <0>;
98 reg = <0x0 0x004cd000 0x0 0x1000>;
102 reg = <0x0 0x80000000 0x0 0x60000
[all...]
/freebsd-src/sys/dev/bce/
H A Dif_bce.c109 /* 0 = Never */
120 int l2fhdr_error_sim_control = 0;
123 int unexpected_attention_sim_control = 0;
126 int mbuf_alloc_failed_sim_control = 0;
129 int dma_map_addr_failed_sim_control = 0;
132 int bootcode_running_failure_sim_control = 0;
144 { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, HP_VENDORID, 0x3101,
146 { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, HP_VENDORID, 0x3106,
148 { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, HP_VENDORID, 0x3070,
150 { BRCM_VENDORID, BRCM_DEVICEID_BCM5706, HP_VENDORID, 0x170
[all...]