Home
last modified time | relevance | path

Searched +full:0 +full:x60 (Results 1 – 25 of 1025) sorted by relevance

12345678910>>...41

/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
H A Dgfx940_flat.txt3 # GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
4 0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02
6 # GFX940: scratch_load_dword a2, v4, s6 offset:16 ; encoding: [0x10,0x60,0x50,0xdc,0x04,0x00,0x86,0…
7 0x10,0x60,0x50,0xdc,0x04,0x00,0x86,0x02
9 # GFX940: scratch_load_dword a2, v4, off ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0xff,0x02]
10 0x00,0x60,0x50,0xdc,0x04,0x00,0xff,0x02
12 …940: scratch_load_dword a2, v4, off offset:16 ; encoding: [0x10,0x60,0x50,0xdc,0x04,0x00,0xff,0x02]
13 0x10,0x60,0x50,0xdc,0x04,0x00,0xff,0x02
15 # GFX940: scratch_load_dword a2, off, s6 ; encoding: [0x00,0x40,0x50,0xdc,0x00,0x00,0x86,0x02]
16 0x00,0x40,0x50,0xdc,0x00,0x00,0x86,0x02
[all …]
/llvm-project/llvm/test/MC/AMDGPU/
H A Dflat-scratch-gfx940.s5 // GFX940: scratch_load_dword a2, v4, s6 ; encoding: [0x00,0x60,0x50,0xdc,0x04,0x00,0x86,0x02]
8 // GFX940: scratch_load_dword a2, v4, s6 offset:16 ; encoding: [0x1
[all...]
/llvm-project/llvm/test/MC/Disassembler/ARM/
H A Dvirtexts-arm.txt3 [0x71,0x00,0x40,0xe1]
4 [0x77,0x00,0x40,0xe1]
5 [0x71,0x10,0x40,0xe1]
6 [0x7f,0xff,0x4f,0xe1]
12 [0x6e,0x00,0x60,0xe1]
13 [0x6e,0x00,0x60,0x01]
14 [0x6e,0x00,0x60,0x11]
15 [0x6e,0x00,0x60,0x21]
16 [0x6e,0x00,0x60,0x31]
17 [0x6e,0x00,0x60,0x41]
[all …]
H A Dneon.txt3 0x20 0x03 0xf1 0xf3
5 0x20 0x03 0xf5 0xf3
7 0x20 0x03 0xf9 0xf3
9 0x20 0x07 0xf9 0xf3
11 0x60 0x03 0xf1 0xf3
13 0x60 0x03 0xf5 0xf3
15 0x60 0x03 0xf9 0xf3
17 0x60 0x07 0xf9 0xf3
20 0x20 0x07 0xf0 0xf3
22 0x20 0x07 0xf4 0xf3
[all …]
H A Dneont2.txt3 0xf1 0xff 0x20 0x03
5 0xf5 0xff 0x20 0x03
7 0xf9 0xff 0x20 0x03
9 0xf9 0xff 0x20 0x07
11 0xf1 0xff 0x60 0x03
13 0xf5 0xff 0x60 0x03
15 0xf9 0xff 0x60 0x03
17 0xf9 0xff 0x60 0x07
20 0xf0 0xff 0x20 0x07
22 0xf4 0xff 0x20 0x07
[all …]
/llvm-project/llvm/test/MC/ARM/
H A Dvirtexts-arm.s7 # CHECK-ARM: [0x71,0x00,0x40,0xe1]
8 # CHECK-ARM: [0x77,0x00,0x40,0xe1]
9 # CHECK-ARM: [0x71,0x10,0x40,0xe1]
10 # CHECK-ARM: [0x7f,0xff,0x4f,0xe1]
27 # CHECK-ARM: [0x6e,0x00,0x60,0xe1]
28 # CHECK-ARM: [0x6e,0x00,0x60,0x01]
29 # CHECK-ARM: [0x6e,0x00,0x60,0x11]
30 # CHECK-ARM: [0x6e,0x00,0x60,0x21]
31 # CHECK-ARM: [0x6e,0x00,0x60,0x31]
32 # CHECK-ARM: [0x6e,0x00,0x60,0x41]
[all …]
H A Dneont2-vld-encoding.s5 @ CHECK: vld1.8 {d16}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x07]
7 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x60,0xf9,0x4f,0x07]
9 @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x60,0xf9,0x8f,0x07]
11 @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0x60,0xf9,0xcf,0x07]
13 @ CHECK: vld1.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x0a]
15 @ CHECK: vld1.16 {d16, d17}, [r0:128] @ encoding: [0x60,0xf9,0x6f,0x0a]
17 @ CHECK: vld1.32 {d16, d17}, [r0] @ encoding: [0x60,0xf9,0x8f,0x0a]
19 @ CHECK: vld1.64 {d16, d17}, [r0] @ encoding: [0x60,0xf9,0xcf,0x0a]
22 @ CHECK: vld2.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x08]
24 @ CHECK: vld2.16 {d16, d17}, [r0:128] @ encoding: [0x60,0xf9,0x6f,0x08]
[all …]
H A Dneon-add-encoding.s4 @ CHECK: vadd.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf2]
6 @ CHECK: vadd.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf2]
8 @ CHECK: vadd.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf2]
10 @ CHECK: vadd.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf2]
12 @ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf2]
14 @ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x40,0xf2]
17 @ CHECK: vaddl.s8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xf2]
19 @ CHECK: vaddl.s16 q8, d17, d16 @ encoding: [0xa0,0x00,0xd1,0xf2]
21 @ CHECK: vaddl.s32 q8, d17, d16 @ encoding: [0xa0,0x00,0xe1,0xf2]
23 @ CHECK: vaddl.u8 q8, d17, d16 @ encoding: [0xa0,0x00,0xc1,0xf3]
[all …]
H A Dneon-abs-encoding.s3 @ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3]
5 @ CHECK: vabs.s16 d16, d16 @ encoding: [0x20,0x03,0xf5,0xf3]
7 @ CHECK: vabs.s32 d16, d16 @ encoding: [0x20,0x03,0xf9,0xf3]
9 @ CHECK: vabs.f32 d16, d16 @ encoding: [0x20,0x07,0xf9,0xf3]
11 @ CHECK: vabs.s8 q8, q8 @ encoding: [0x60,0x03,0xf1,0xf3]
13 @ CHECK: vabs.s16 q8, q8 @ encoding: [0x60,0x03,0xf5,0xf3]
15 @ CHECK: vabs.s32 q8, q8 @ encoding: [0x60,0x03,0xf9,0xf3]
17 @ CHECK: vabs.f32 q8, q8 @ encoding: [0x60,0x07,0xf9,0xf3]
20 @ CHECK: vqabs.s8 d16, d16 @ encoding: [0x20,0x07,0xf0,0xf3]
22 @ CHECK: vqabs.s16 d16, d16 @ encoding: [0x20,0x07,0xf4,0xf3]
[all …]
H A Dneont2-abs-encoding.s5 @ CHECK: vabs.s8 d16, d16 @ encoding: [0xf1,0xff,0x20,0x03]
7 @ CHECK: vabs.s16 d16, d16 @ encoding: [0xf5,0xff,0x20,0x03]
9 @ CHECK: vabs.s32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x03]
11 @ CHECK: vabs.f32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x07]
13 @ CHECK: vabs.s8 q8, q8 @ encoding: [0xf1,0xff,0x60,0x03]
15 @ CHECK: vabs.s16 q8, q8 @ encoding: [0xf5,0xff,0x60,0x03]
17 @ CHECK: vabs.s32 q8, q8 @ encoding: [0xf9,0xff,0x60,0x03]
19 @ CHECK: vabs.f32 q8, q8 @ encoding: [0xf9,0xff,0x60,0x07]
22 @ CHECK: vqabs.s8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x07]
24 @ CHECK: vqabs.s16 d16, d16 @ encoding: [0xf4,0xff,0x20,0x07]
[all …]
/llvm-project/llvm/test/MC/Mips/
H A Dmicromips32r6-eva.s12 # CHECK-EL: prefe 1, 8($5) # encoding: [0x25,0x60,0x08,0xa4]
13 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} PREFE_MM
14 # CHECK-EL: cachee 1, 8($5) # encoding: [0x25,0x60,0x08,0xa6]
15 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} CACHEE_MM
16 # CHECK-EL: lle $2, 8($4) # encoding: [0x44,0x60,0x08,0x6c]
17 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LLE_MM
18 # CHECK-EL: sce $2, 8($4) # encoding: [0x44,0x60,0x08,0xac]
19 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} SCE_MM
20 # CHECK-EL: lhue $4, 8($2) # encoding: [0x82,0x60,0x08,0x62]
21 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LHuE_M
[all …]
H A Dmicromips-eva.s12 # CHECK-EL: prefe 1, 8($5) # encoding: [0x25,0x60,0x08,0xa4]
13 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} PREFE_MM
14 # CHECK-EL: cachee 1, 8($5) # encoding: [0x25,0x60,0x08,0xa6]
15 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} CACHEE_MM
16 # CHECK-EL: lle $2, 8($4) # encoding: [0x44,0x60,0x08,0x6c]
17 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} LLE_MM
18 # CHECK-EL: sce $2, 8($4) # encoding: [0x44,0x60,0x08,0xac]
19 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} SCE_MM
20 # CHECK-EL: swre $24, 5($3) # encoding: [0x03,0x63,0x05,0xa2]
21 # CHECK-EL-NEXT: # <MCInst #{{[0-9]+}} SWRE_MM
[all …]
/llvm-project/llvm/test/MC/AArch64/SVE/
H A Dprfd.s15 prfd #0, p0, [x0]
17 // CHECK-ENCODING: [0x00,0x60,0xc0,0x85]
23 // CHECK-ENCODING: [0x00,0x60,0xc0,0x85]
29 // CHECK-ENCODING: [0x01,0x60,0xc0,0x85]
35 // CHECK-ENCODING: [0x01,0x60,0xc0,0x85]
41 // CHECK-ENCODING: [0x02,0x60,0xc0,0x85]
47 // CHECK-ENCODING: [0x02,0x60,0xc0,0x85]
53 // CHECK-ENCODING: [0x03,0x60,0xc0,0x85]
59 // CHECK-ENCODING: [0x03,0x60,0xc0,0x85]
65 // CHECK-ENCODING: [0x04,0x60,0xc0,0x85]
[all …]
/llvm-project/llvm/test/MC/Disassembler/Sparc/
H A Dsparc-mem.txt4 0xd4 0x4e 0x00 0x16
7 0xd4 0x4e 0x20 0x20
10 0xd8 0x48 0x60 0x00
13 0xd8 0x48 0x40 0x00
16 0xd4 0xce 0x10 0x76
19 0xd4 0x56 0x00 0x16
22 0xd4 0x56 0x20 0x20
25 0xd8 0x50 0x60 0x00
28 0xd8 0x50 0x40 0x00
31 0xd4 0xd6 0x10 0x76
[all …]
/llvm-project/llvm/test/tools/llvm-objdump/ELF/RISCV/
H A Dbranches.s7 # CHECK: beq t0, t1, 0x58 <foo+0x58>
9 # CHECK: bne t0, t1, 0x58 <foo+0x58>
11 # CHECK: blt t0, t1, 0x58 <foo+0x58>
13 # CHECK: bge t0, t1, 0x58 <foo+0x58>
15 # CHECK: bltu t0, t1, 0x58 <foo+0x58>
17 # CHECK: bgeu t0, t1, 0x58 <foo+0x58>
20 # CHECK: c.beqz a0, 0x58 <foo+0x58>
22 # CHECK: c.bnez a0, 0x58 <foo+0x58>
25 # CHECK: beq t0, t1, 0x60 <bar>
27 # CHECK: bne t0, t1, 0x60 <bar>
[all …]
/llvm-project/llvm/test/MC/Disassembler/AArch64/
H A Darmv8.9a-pfar.txt3 [0xa0,0x60,0x38,0xd5]
6 [0xa0,0x60,0x18,0xd5]
9 [0xa0,0x60,0x3c,0xd5]
12 [0xa0,0x60,0x1c,0xd5]
15 [0xa0,0x60,0x3d,0xd5]
18 [0xa0,0x60,0x1d,0xd5]
21 [0xa0,0x60,0x3e,0xd5]
24 [0xa0,0x60,0x1e,0xd5]
H A Darmv8.6a-amvs.s4 [0xc0,0xd2,0x1b,0xd5]
5 [0xc0,0xd2,0x3b,0xd5]
6 [0x00,0xd
[all...]
H A Darmv8.1a-atomic.txt3 0x41,0x7c,0xa0,0x08
4 0x41,0x7c,0xe0,0x08
5 0x41,0xfc,0xa0,0x08
6 0x41,0xfc,0xe0,0x08
7 0x41,0x7c,0xa0,0x48
8 0x41,0x7c,0xe0,0x48
9 0x41,0xfc,0xa0,0x48
10 0x41,0xfc,0xe0,0x48
20 0x41,0x7c,0xa0,0x88
21 0x41,0x7c,0xe0,0x88
[all …]
/llvm-project/llvm/test/MC/AArch64/
H A Darmv8.9a-pfar.s4 // CHECK: mrs x0, PFAR_EL1 // encoding: [0xa0,0x60,0x38,0xd5]
6 // CHECK: msr PFAR_EL1, x0 // encoding: [0xa0,0x60,0x18,0xd5]
9 // CHECK: mrs x0, PFAR_EL2 // encoding: [0xa0,0x60,0x3c,0xd5]
11 // CHECK: msr PFAR_EL2, x0 // encoding: [0xa0,0x60,0x1c,0xd5]
14 // CHECK: mrs x0, PFAR_EL12 // encoding: [0xa0,0x60,0x3d,0xd5]
16 // CHECK: msr PFAR_EL12, x0 // encoding: [0xa0,0x60,0x1d,0xd5]
19 // CHECK: mrs x0, MFAR_EL3 // encoding: [0xa0,0x60,0x3e,0xd5]
21 // CHECK: msr MFAR_EL3, x0 // encoding: [0xa0,0x60,0x1e,0xd5]
/llvm-project/llvm/test/MC/Sparc/
H A Dsparc-traps.s3 ! CHECK: ta %i5 ! encoding: [0x91,0xd0,0x00,0x1d]
4 ! CHECK: ta 82 ! encoding: [0x91,0xd0,0x20,0x52]
5 ! CHECK: ta %g1 + %i2 ! encoding: [0x91,0xd0,0x40,0x1a]
6 ! CHECK: ta %i5 + 41 ! encoding: [0x91,0xd7,0x60,0x29]
12 ! CHECK: tn %i5 ! encoding: [0x81,0xd0,0x00,0x1d]
13 ! CHECK: tn 82 ! encoding: [0x81,0xd0,0x20,0x52]
14 ! CHECK: tn %g1 + %i2 ! encoding: [0x81,0xd0,0x40,0x1a]
15 ! CHECK: tn %i5 + 41 ! encoding: [0x81,0xd7,0x60,0x29]
21 ! CHECK: tne %i5 ! encoding: [0x93,0xd0,0x00,0x1d]
23 ! CHECK: tne %i5 ! encoding: [0x93,0xd0,0x00,0x1d]
[all …]
/llvm-project/llvm/test/MC/RISCV/
H A Dhypervisor-csr-names.s20 # CHECK-ENC: encoding: [0x73,0x23,0x00,0x60]
24 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0x60]
[all...]
/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r2/
H A Dvalid-mips32r2-el.txt6 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14
7 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7
8 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7
9 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14
10 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7
11 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767
12 0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001
13 0x21 0x48 0xc7 0x00 # CHECK: addu $9, $6, $7
14 0x24 0x48 0xc7 0x00 # CHECK: and $9, $6, $7
15 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
[all …]
/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r5/
H A Dvalid-mips32r5-el.txt3 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14
4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7
5 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7
6 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14
7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7
8 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767
9 0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001
10 0x21 0x48 0xc7 0x00 # CHECK: addu $9, $6, $7
11 0x24 0x48 0xc7 0x00 # CHECK: and $9, $6, $7
12 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
[all …]
/llvm-project/llvm/test/MC/Disassembler/Mips/mips32r3/
H A Dvalid-mips32r3-el.txt3 0x05 0x73 0x20 0x46 # CHECK: abs.d $f12, $f14
4 0x85 0x39 0x00 0x46 # CHECK: abs.s $f6, $f7
5 0x20 0x48 0xc7 0x00 # CHECK: add $9, $6, $7
6 0x00 0x62 0x2e 0x46 # CHECK: add.d $f8, $f12, $f14
7 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7
8 0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767
9 0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001
10 0x21 0x48 0xc7 0x00 # CHECK: addu $9, $6, $7
11 0x24 0x48 0xc7 0x00 # CHECK: and $9, $6, $7
12 0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
[all …]
/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/
H A Dvalid-el.txt4 0xf9 0x4f # CHECK: addiusp -16
5 0xff 0x4f # CHECK: addiusp -1028
6 0xfd 0x4f # CHECK: addiusp -1032
7 0x01 0x4c # CHECK: addiusp 1024
8 0x03 0x4c # CHECK: addiusp 1028
9 0x29 0x2c # CHECK: andi16 $16, $2, 31
10 0x05 0x47 # CHECK: jraddiusp 20
11 0x42 0x07 # CHECK: addu16 $6, $17, $4
12 0xb1 0x06 # CHECK: subu16 $5, $16, $3
13 0x82 0x44 # CHECK: and16 $16, $2
[all …]

12345678910>>...41