Searched +full:0 +full:- +full:mon +full:- +full:rtc +full:- +full:lp (Results 1 – 15 of 15) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.02 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.4 ---5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: Freescale Secure Non-Volatile Storage (SNVS)11 - '"Horia Geantă" <horia.geanta@nxp.com>'12 - Pankaj Gupta <pankaj.gupta@nxp.com>13 - Gaurav Jain <gaurav.jain@nxp.com>18 violations. This also included rtc, system power off and ON/OFF key.[all …]
3 Copyright (C) 2008-2011 Freescale Semiconductor Inc.6 -Overview7 -SEC 4 Node8 -Job Ring Node9 -Run Time Integrity Check (RTIC) Node10 -Run Time Integrity Check (RTIC) Memory Node11 -Secure Non-Volatile Storage (SNVS) Node12 -Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node13 -Full Example29 HW interface between QM & SEC 4 and also BM & SEC 4, on DPAA-enabled parts[all …]
1 /*-29 * Driver for imx6 Secure Non-Volatile Storage system, which really means "all31 * realtime clock, tamper monitor, and power-management functions. Currently48 #define SNVS_LPCR 0x38 /* Control register */50 #define LPCR_LPCALB_VAL_MASK 0x1f /* Calibration mask */52 #define LPCR_SRTC_ENV (1u << 0) /* RTC enabled/valid */54 #define SNVS_LPSRTCMR 0x50 /* Counter MSB */55 #define SNVS_LPSRTCLR 0x54 /* Counter LSB */60 * The RTC is a 47-bit counter clocked at 32KHz and organized as a 32.1561 * fixed-point binary value. Shifting by SBT_LSB bits translates between[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)5 #include "vf610-pinfunc.h"6 #include <dt-bindings/clock/vf610-clock.h>7 #include <dt-bindings/interrupt-controller/irq.h>8 #include <dt-bindings/gpio/gpio.h>32 compatible = "fixed-clock";33 #clock-cells = <0>;34 clock-frequency = <24000000>;38 compatible = "fixed-clock";39 #clock-cells = <0>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)4 * Copyright 2017-2018 NXP.8 #include <dt-bindings/clock/imx6sll-clock.h>9 #include <dt-bindings/gpio/gpio.h>10 #include <dt-bindings/interrupt-controller/arm-gi[all...]
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT6 #include <dt-bindings/clock/imx7d-clock.h>7 #include <dt-bindings/power/imx7-power.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/input/input.h>10 #include <dt-binding[all...]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/interrupt-controller/irq.h>6 #include "imx6sl-pinfunc.h"7 #include <dt-bindings/clock/imx6sl-clock.h>10 #address-cells = <1>;11 #size-cell[all...]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6ul-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gi[all...]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/clock/imx6qdl-clock.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #address-cell[all...]
1 // SPDX-License-Identifier: GPL-2.05 #include <dt-bindings/clock/imx6sx-clock.h>6 #include <dt-bindings/gpio/gpio.h>7 #include <dt-bindings/input/input.h>8 #include <dt-bindings/interrupt-controller/arm-gi[all...]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8mn-clock.h>7 #include <dt-bindings/power/imx8mn-power.h>8 #include <dt-bindings/reset/imx8mq-reset.h>9 #include <dt-binding[all...]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8mm-clock.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/input/input.h>9 #include <dt-bindings/interrupt-controller/arm-gi[all...]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>7 #include <dt-bindings/clock/imx8mq-clock.h>8 #include <dt-bindings/power/imx8mq-power.h>9 #include <dt-bindings/reset/imx8mq-rese[all...]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/imx8mp-clock.h>7 #include <dt-bindings/power/imx8mp-power.h>8 #include <dt-bindings/reset/imx8mp-reset.h>9 #include <dt-binding[all...]
4 * Copyright 2010-2011 Freescale Semiconductor Inc.35 /dts-v1/;39 #address-cells = <2>;40 #size-cells = <2>;41 interrupt-parent = <&mpic>;108 #address-cells = <1>;109 #size-cells = <0>;111 cpu0: PowerPC,e5500@0 {113 reg = <0>;114 bus-frequency = <799999998>;[all …]