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Searched defs:stage (Results 1 – 10 of 10) sorted by relevance

/llvm-project/mlir/lib/IR/
H A DVisitors.cpp23 WalkStage stage(op); in walk() local
43 WalkStage stage(op); in walk() local
/llvm-project/mlir/test/lib/IR/
H A DTestVisitorsGeneric.cpp14 static std::string getStageDescription(const WalkStage &stage) { in getStageDescription()
34 outerOp->walk([&](Operation *op, const WalkStage &stage) { in runOnOperation()
40 outerOp->walk([&](test::TwoRegionOp op, const WalkStage &stage) { in runOnOperation()
65 auto walker = [&](Operation *op, const WalkStage &stage) { in runOnOperation()
107 result = outerOp->walk([&](test::TwoRegionOp op, const WalkStage &stage) { in runOnOperation()
/llvm-project/clang/lib/Headers/hlsl/
H A Dhlsl_intrinsics.h23 _HLSL_AVAILABILITY_STAGE(platform,version,stage) global() argument
30 _HLSL_16BIT_AVAILABILITY_STAGE(platform,version,stage) global() argument
/llvm-project/mlir/test/Examples/NVGPU/
H A DCh5.py81 stage, argument
139 def switch_phase(stage, phase, num_stages): argument
H A DCh4.py76 stage, argument
/llvm-project/mlir/lib/Dialect/SCF/Transforms/
H A DLoopPipelining.cpp228 int64_t stage = it->second; verifySchedule() local
342 unsigned stage = stages[op]; analyzeCrossStageValues() local
620 for (unsigned int stage = 1; stage <= maxStage; stage++) createKernel() local
[all...]
/llvm-project/mlir/include/mlir/Interfaces/
H A DSideEffectInterfaces.h276 int stage; variable
/llvm-project/mlir/lib/Bytecode/Writer/
H A DIRNumbering.cpp253 __anon5bf2a3480502(Operation *op, const WalkStage &stage) computeGlobalNumberingState() argument
/llvm-project/llvm/lib/CodeGen/
H A DMachinePipeliner.cpp3417 for (int stage = 1, lastStage = getMaxStageCount(); stage <= lastStage; finalizeSchedule() local
[all...]
/llvm-project/mlir/tools/mlir-tblgen/
H A DOpDefinitionsGen.cpp3403 int stage = (int)location.effect.getStage(); global() local