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Searched defs:isKill (Results 1 – 25 of 33) sorted by relevance

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/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h138 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,Register SrcReg,bool isKill,int FrameIndex,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) storeRegToStackSlot() argument
H A DMips16InstrInfo.cpp108 storeRegToStack(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,int64_t Offset) const storeRegToStack() argument
H A DMipsSEInstrInfo.cpp216 storeRegToStack(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,int64_t Offset) const storeRegToStack() argument
/llvm-project/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp116 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
H A DThumb1FrameLowering.cpp880 bool isKill = !MRI.isLiveIn(Reg); pushRegsToStack() local
920 bool isKill = !MRI.isLiveIn(*HiRegToSave); pushRegsToStack() local
H A DThumb2InstrInfo.cpp166 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp297 bool isKill = MI.getOperand(3).isKill(); processSTVM() local
377 bool isKill = MI.getOperand(3).isKill(); processSTVM512() local
H A DVEInstrInfo.cpp461 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp38 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h158 unsigned Reg, bool isKill, int Offset) { in addRegOffset()
H A DX86InstrInfo.cpp1162 classifyLEAReg(MachineInstr & MI,const MachineOperand & Src,unsigned Opc,bool AllowSP,Register & NewSrc,bool & isKill,MachineOperand & ImplicitOp,LiveVariables * LV,LiveIntervals * LIS) const classifyLEAReg() argument
1469 bool isKill; convertToThreeAddress() local
1507 bool isKill; convertToThreeAddress() local
1533 bool isKill; convertToThreeAddress() local
1577 bool isKill; convertToThreeAddress() local
1627 bool isKill; convertToThreeAddress() local
1667 bool isKill; convertToThreeAddress() local
4722 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
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/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.cpp121 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp220 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
H A DTwoAddressInstructionPass.cpp949 bool isKill = isPlainlyKilled(MO); rescheduleMIBelowKill() local
1077 bool isKill = isPlainlyKilled(MO); rescheduleKillAboveMI() local
1963 bool isKill = UseMO.isKill(); eliminateRegSequence() local
[all...]
H A DLiveIntervals.cpp1132 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end); handleMoveDown() local
1276 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end); handleMoveUp() local
H A DMachineOperand.cpp274 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() argument
H A DMachineLICM.cpp965 bool isKill = isOperandKill(MO, MRI); calcRegisterCost() local
H A DInlineSpiller.cpp1103 insertSpill(Register NewVReg,bool isKill,MachineBasicBlock::iterator MI) insertSpill() argument
/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp134 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIndex,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp360 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FrameIndex,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp529 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator I,Register SrcReg,bool isKill,int FI,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOperand.h399 bool isKill() const { in isKill() function
H A DLiveInterval.h112 bool isKill() const { in isKill() function
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp603 bool isKill = Op.isKill(); in createHalfInstr() local
/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1927 StoreRegToStackSlot(MachineFunction & MF,unsigned SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,SmallVectorImpl<MachineInstr * > & NewMIs) const StoreRegToStackSlot() argument
1950 storeRegToStackSlotNoUpd(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,unsigned SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI) const storeRegToStackSlotNoUpd() argument
1970 storeRegToStackSlot(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,Register SrcReg,bool isKill,int FrameIdx,const TargetRegisterClass * RC,const TargetRegisterInfo * TRI,Register VReg) const storeRegToStackSlot() argument
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