/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGTargetInfo.h | 81 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemset() argument 51 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) EmitTargetCodeForMemcpy() argument 68 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) EmitTargetCodeForMemmove() argument 95 EmitTargetCodeForMemcmp(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,SDValue Op3,MachinePointerInfo Op1PtrInfo,MachinePointerInfo Op2PtrInfo) EmitTargetCodeForMemcmp() argument 107 EmitTargetCodeForMemchr(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Src,SDValue Char,SDValue Length,MachinePointerInfo SrcPtrInfo) EmitTargetCodeForMemchr() argument 132 EmitTargetCodeForStrcmp(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Op1,SDValue Op2,MachinePointerInfo Op1PtrInfo,MachinePointerInfo Op2PtrInfo) EmitTargetCodeForStrcmp() argument 152 EmitTargetCodeForSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Addr,SDValue Size,MachinePointerInfo DstPtrInfo,bool ZeroData) EmitTargetCodeForSetTag() argument
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypesGeneric.cpp | 45 SDLoc dl(N); in ExpandRes_BITCAST() local 213 SDLoc dl(N); ExpandRes_EXTRACT_VECTOR_ELT() local 250 SDLoc dl(N); ExpandRes_NormalLoad() local 292 SDLoc dl(N); ExpandRes_VAARG() local 333 SDLoc dl(N); ExpandOp_BITCAST() local 374 SDLoc dl(N); ExpandOp_BUILD_VECTOR() local 410 SDLoc dl(N); ExpandOp_INSERT_VECTOR_ELT() local 443 SDLoc dl(N); ExpandOp_SCALAR_TO_VECTOR() local 459 SDLoc dl(N); ExpandOp_NormalStore() local 508 SDLoc dl(N); SplitRes_Select() local 557 SDLoc dl(N); SplitRes_SELECT_CC() local 577 SDLoc dl(N); SplitVecRes_AssertZext() local 586 SDLoc dl(N); SplitRes_FREEZE() local [all...] |
H A D | LegalizeIntegerTypes.cpp | 460 SDLoc dl(N); PromoteIntRes_BITCAST() local 566 SDLoc dl(N); PromoteIntRes_BSWAP() local 594 SDLoc dl(N); PromoteIntRes_BITREVERSE() local 630 SDLoc dl(N); PromoteIntRes_Constant() local 644 SDLoc dl(N); PromoteIntRes_CTLZ() local 734 SDLoc dl(N); PromoteIntRes_CTTZ() local 780 SDLoc dl(N); PromoteIntRes_EXTRACT_VECTOR_ELT() local 807 SDLoc dl(N); PromoteIntRes_FP_TO_XINT() local 861 SDLoc dl(N); PromoteIntRes_FP_TO_XINT_SAT() local 868 SDLoc dl(N); PromoteIntRes_FP_TO_FP16_BF16() local 875 SDLoc dl(N); PromoteIntRes_STRICT_FP_TO_FP16_BF16() local 885 SDLoc dl(N); PromoteIntRes_XRINT() local 891 SDLoc dl(N); PromoteIntRes_GET_ROUNDING() local 904 SDLoc dl(N); PromoteIntRes_INT_EXTEND() local 940 SDLoc dl(N); PromoteIntRes_LOAD() local 958 SDLoc dl(N); PromoteIntRes_MLOAD() local 980 SDLoc dl(N); PromoteIntRes_MGATHER() local 1006 SDLoc dl(N); PromoteIntRes_Overflow() local 1027 SDLoc dl(N); PromoteIntRes_ADDSUBSHLSAT() local 1110 SDLoc dl(N); PromoteIntRes_MULFIX() local 1146 SaturateWidenedDIVFIX(SDValue V,SDLoc & dl,unsigned SatW,bool Signed,const TargetLowering & TLI,SelectionDAG & DAG) SaturateWidenedDIVFIX() argument 1184 SDLoc dl(N); earlyExpandDIVFIX() local 1209 SDLoc dl(N); PromoteIntRes_DIVFIX() local 1272 SDLoc dl(N); PromoteIntRes_SADDSUBO() local 1339 SDLoc dl(N); PromoteIntRes_SETCC() local 1373 SDLoc dl(N); PromoteIntRes_FFREXP() local 1620 SDLoc dl(N); PromoteIntRes_TRUNCATE() local 1699 SDLoc dl(N); PromoteIntRes_UADDSUBO() local 1843 SDLoc dl(N); PromoteIntRes_VAARG() local 2157 SDLoc dl(N); PromoteIntOp_BUILD_PAIR() local 2291 SDLoc dl(N); PromoteIntOp_SIGN_EXTEND() local 2298 SDLoc dl(N); PromoteIntOp_VP_SIGN_EXTEND() local 2332 SDLoc dl(N); PromoteIntOp_STORE() local 2459 SDLoc dl(N); PromoteIntOp_ZERO_EXTEND() local 2466 SDLoc dl(N); PromoteIntOp_VP_ZERO_EXTEND() local 2569 SDLoc dl(N); PromoteIntOp_VECREDUCE() local 3052 SDLoc dl(N); ExpandShiftWithKnownAmountBit() local 3138 SDLoc dl(N); ExpandShiftWithUnknownAmountBit() local 3346 SDLoc dl(N); ExpandIntRes_ADDSUB() local 3490 SDLoc dl(N); ExpandIntRes_ADDSUBC() local 3516 SDLoc dl(N); ExpandIntRes_ADDSUBE() local 3536 SDLoc dl(N); ExpandIntRes_UADDSUBO() local 3607 SDLoc dl(N); ExpandIntRes_UADDSUBO_CARRY() local 3627 SDLoc dl(N); ExpandIntRes_SADDSUBO_CARRY() local 3646 SDLoc dl(N); ExpandIntRes_ANY_EXTEND() local 3668 SDLoc dl(N); ExpandIntRes_AssertSext() local 3690 SDLoc dl(N); ExpandIntRes_AssertZext() local 3710 SDLoc dl(N); ExpandIntRes_BITREVERSE() local 3718 SDLoc dl(N); ExpandIntRes_BSWAP() local 3726 SDLoc dl(N); ExpandIntRes_PARITY() local 3743 SDLoc dl(N); ExpandIntRes_Constant() local 3750 SDLoc dl(N); ExpandIntRes_ABS() local 3799 SDLoc dl(N); ExpandIntRes_CTLZ() local 3819 SDLoc dl(N); ExpandIntRes_CTPOP() local 3830 SDLoc dl(N); ExpandIntRes_CTTZ() local 3850 SDLoc dl(N); ExpandIntRes_GET_ROUNDING() local 3878 SDLoc dl(N); ExpandIntRes_FP_TO_XINT() local 3926 SDLoc dl(N); ExpandIntRes_XROUND_XRINT() local 4029 SDLoc dl(N); ExpandIntRes_LOAD() local 4126 SDLoc dl(N); ExpandIntRes_Logical() local 4138 SDLoc dl(N); ExpandIntRes_MUL() local 4212 SDLoc dl(N); ExpandIntRes_MULFIX() local 4434 SDLoc dl(N); ExpandIntRes_DIVFIX() local 4452 SDLoc dl(Node); ExpandIntRes_SADDSUBO() local 4522 SDLoc dl(N); ExpandIntRes_SDIV() local 4549 SDLoc dl(N); ExpandIntRes_ShiftThroughStack() local 4656 SDLoc dl(N); ExpandIntRes_Shift() local 4779 SDLoc dl(N); ExpandIntRes_SIGN_EXTEND() local 4809 SDLoc dl(N); ExpandIntRes_SIGN_EXTEND_INREG() local 4836 SDLoc dl(N); ExpandIntRes_SREM() local 4864 SDLoc dl(N); ExpandIntRes_TRUNCATE() local 4876 SDLoc dl(N); ExpandIntRes_XMULO() local 5014 SDLoc dl(N); ExpandIntRes_UDIV() local 5057 SDLoc dl(N); ExpandIntRes_UREM() local 5100 SDLoc dl(N); ExpandIntRes_ZERO_EXTEND() local 5126 SDLoc dl(N); ExpandIntRes_ATOMIC_LOAD() local 5195 SDLoc dl(N); ExpandIntRes_VSCALE() local 5289 IntegerExpandSetCCOperands(SDValue & NewLHS,SDValue & NewRHS,ISD::CondCode & CCCode,const SDLoc & dl) IntegerExpandSetCCOperands() argument 5486 SDLoc dl = SDLoc(N); ExpandIntOp_SETCCCARRY() local 5569 SDLoc dl(N); ExpandIntOp_STORE() local 5646 SDLoc dl(N); ExpandIntOp_ATOMIC_STORE() local 5666 SDLoc dl(N); PromoteIntRes_VECTOR_SPLICE() local 5676 SDLoc dl(N); PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE() local 5695 SDLoc dl(N); PromoteIntRes_EXTRACT_SUBVECTOR() local 5776 SDLoc dl(N); PromoteIntRes_INSERT_SUBVECTOR() local 5793 SDLoc dl(N); PromoteIntRes_VECTOR_REVERSE() local 5804 SDLoc dl(N); PromoteIntRes_VECTOR_SHUFFLE() local 5823 SDLoc dl(N); PromoteIntRes_BUILD_VECTOR() local 5851 SDLoc dl(N); PromoteIntRes_ScalarOp() local 5867 SDLoc dl(N); PromoteIntRes_STEP_VECTOR() local 5878 SDLoc dl(N); PromoteIntRes_CONCAT_VECTORS() local 5952 SDLoc dl(N); PromoteIntRes_EXTEND_VECTOR_INREG() local 5989 SDLoc dl(N); PromoteIntRes_INSERT_VECTOR_ELT() local 6001 SDLoc dl(N); PromoteIntRes_VECREDUCE() local 6017 SDLoc dl(N); PromoteIntOp_EXTRACT_VECTOR_ELT() local 6031 SDLoc dl(N); PromoteIntOp_INSERT_SUBVECTOR() local 6046 SDLoc dl(N); PromoteIntOp_EXTRACT_SUBVECTOR() local 6056 SDLoc dl(N); PromoteIntOp_CONCAT_VECTORS() local [all...] |
H A D | LegalizeVectorTypes.cpp | 275 SDLoc dl(N); ScalarizeVecRes_FFREXP() local 301 SDLoc dl(N); ScalarizeVecRes_StrictFPOp() local 648 SDLoc dl(N); ScalarizeVecRes_FP_TO_XINT_SAT() local 935 SDLoc dl(N); ScalarizeVecOp_STORE() local 1357 SDLoc dl(N); SplitVecRes_BinOp() local 1391 SDLoc dl(N); SplitVecRes_TernaryOp() local 1419 SDLoc dl(N); SplitVecRes_CMP() local 1443 SDLoc dl(N); SplitVecRes_FIX() local 1459 SDLoc dl(N); SplitVecRes_BITCAST() local 1523 SDLoc dl(N); SplitVecRes_BUILD_VECTOR() local 1536 SDLoc dl(N); SplitVecRes_CONCAT_VECTORS() local 1558 SDLoc dl(N); SplitVecRes_EXTRACT_SUBVECTOR() local 1575 SDLoc dl(N); SplitVecRes_INSERT_SUBVECTOR() local 1682 SDLoc dl(N); SplitVecRes_InregOp() local 1699 SDLoc dl(N); SplitVecRes_ExtVecInRegOp() local 1737 SDLoc dl(N); SplitVecRes_StrictFPOp() local 1789 SDLoc dl(N); UnrollVectorOp_StrictFP() local 1841 SDLoc dl(N); SplitVecRes_OverflowOp() local 1887 SDLoc dl(N); SplitVecRes_INSERT_VECTOR_ELT() local 1961 SDLoc dl(N); SplitVecRes_STEP_VECTOR() local 1984 SDLoc dl(N); SplitVecRes_ScalarOp() local 1999 SDLoc dl(LD); SplitVecRes_LOAD() local 2045 SDLoc dl(LD); SplitVecRes_VP_LOAD() local 2207 SDLoc dl(MLD); SplitVecRes_MLOAD() local 2290 SDLoc dl(N); SplitVecRes_Gather() local 2421 SDLoc dl(N); SplitVecRes_UnaryOp() local 2461 SDLoc dl(N); SplitVecRes_ADDRSPACECAST() local 2481 SDLoc dl(N); SplitVecRes_FFREXP() local 2517 SDLoc dl(N); SplitVecRes_ExtendOp() local 2942 SDLoc dl(N); SplitVecRes_VAARG() local 2960 SDLoc dl(N); SplitVecRes_FP_TO_XINT_SAT() local 3281 SDLoc dl(N); SplitVecOp_VECREDUCE() local 3300 SDLoc dl(N); SplitVecOp_VECREDUCE_SEQ() local 3326 SDLoc dl(N); SplitVecOp_VP_REDUCE() local 3350 SDLoc dl(N); SplitVecOp_UnaryOp() local 3394 SDLoc dl(N); SplitVecOp_BITCAST() local 3421 SDLoc dl(N); SplitVecOp_INSERT_SUBVECTOR() local 3442 SDLoc dl(N); SplitVecOp_EXTRACT_SUBVECTOR() local 3520 SDLoc dl(N); SplitVecOp_EXTRACT_VECTOR_ELT() local 4176 SDLoc dl(N); SplitVecOp_CMP() local 4196 SDLoc dl(N); SplitVecOp_FP_TO_XINT_SAT() local 4553 SDLoc dl(N); WidenVecRes_Ternary() local 4572 SDLoc dl(N); WidenVecRes_Binary() local 4591 SDLoc dl(N); WidenVecRes_CMP() local 4613 SDLoc dl(N); WidenVecRes_BinaryWithExtraScalarOp() local 4636 SDLoc dl(ConcatOps[0]); CollectOpsToWiden() local 4705 SDLoc dl(N); WidenVecRes_BinaryCanTrap() local 4795 SDLoc dl(N); WidenVecRes_StrictFP() local 5069 SDLoc dl(N); WidenVecRes_FP_TO_XINT_SAT() local 5090 SDLoc dl(N); WidenVecRes_XRINT() local 5292 SDLoc dl(N); WidenVecRes_BITCAST() local 5404 SDLoc dl(N); WidenVecRes_BUILD_VECTOR() local 5426 SDLoc dl(N); WidenVecRes_CONCAT_VECTORS() local 5507 SDLoc dl(N); WidenVecRes_INSERT_SUBVECTOR() local 5517 SDLoc dl(N); WidenVecRes_EXTRACT_SUBVECTOR() local 5680 SDLoc dl(N); WidenVecRes_VP_LOAD() local 5736 SDLoc dl(N); WidenVecRes_MLOAD() local 5762 SDLoc dl(N); WidenVecRes_MGATHER() local 5797 SDLoc dl(N); WidenVecRes_VP_GATHER() local 6107 SDLoc dl(N); WidenVecRes_VECTOR_SHUFFLE() local 6133 SDLoc dl(N); WidenVecRes_VECTOR_REVERSE() local 6243 SDLoc dl(N); WidenVecRes_STRICT_FSETCC() local 6482 SDLoc dl(N); WidenVecOp_CMP() local 6546 SDLoc dl(N); WidenVecOp_Convert() local 6612 SDLoc dl(N); WidenVecOp_FP_TO_XINT_SAT() local 6633 SDLoc dl(N); WidenVecOp_BITCAST() local 6677 SDLoc dl(N); WidenVecOp_CONCAT_VECTORS() local 6822 SDLoc dl(N); WidenVecOp_VP_STORE() local 6894 SDLoc dl(N); WidenVecOp_MSTORE() local 6937 SDLoc dl(N); WidenVecOp_MGATHER() local 7019 SDLoc dl(N); WidenVecOp_SETCC() local 7055 SDLoc dl(N); WidenVecOp_STRICT_FSETCC() local 7087 SDLoc dl(N); WidenVecOp_VECREDUCE() local 7122 SDLoc dl(N); WidenVecOp_VECREDUCE_SEQ() local 7161 SDLoc dl(N); WidenVecOp_VP_REDUCE() local 7284 SDLoc dl(LdOps[Start]); BuildVectorFromScalar() local 7317 SDLoc dl(LD); GenWidenVectorLoads() local 7495 SDLoc dl(LD); GenWidenVectorExtLoads() local 7549 SDLoc dl(ST); GenWidenVectorStores() local 7644 SDLoc dl(InOp); ModifyToType() local [all...] |
H A D | LegalizeFloatTypes.cpp | 344 SDLoc dl(N); SoftenFloatRes_FCOPYSIGN() local 514 SDLoc dl(N); SoftenFloatRes_FNEG() local 798 SDLoc dl(N); SoftenFloatRes_LOAD() local 831 SDLoc dl(N); SoftenFloatRes_ATOMIC_LOAD() local 872 SDLoc dl(N); SoftenFloatRes_VAARG() local 892 SDLoc dl(N); SoftenFloatRes_XINT_TO_FP() local 1095 SDLoc dl(N); SoftenFloatOp_FP_TO_XINT() local 1193 SDLoc dl(N); SoftenFloatOp_STORE() local 1212 SDLoc dl(N); SoftenFloatOp_ATOMIC_STORE() local 1224 SDLoc dl(N); SoftenFloatOp_FCOPYSIGN() local 1435 SDLoc dl(N); ExpandFloatRes_ConstantFP() local 1478 SDLoc dl(N); ExpandFloatRes_FABS() local 1656 SDLoc dl(N); ExpandFloatRes_FNEG() local 1665 SDLoc dl(N); ExpandFloatRes_FP_EXTEND() local 1714 SDLoc dl(N); ExpandFloatRes_FREEZE() local 1810 SDLoc dl(N); ExpandFloatRes_LOAD() local 1841 SDLoc dl(N); ExpandFloatRes_XINT_TO_FP() local 2001 FloatExpandSetCCOperands(SDValue & NewLHS,SDValue & NewRHS,ISD::CondCode & CCCode,const SDLoc & dl,SDValue & Chain,bool IsSignaling) FloatExpandSetCCOperands() argument 2096 SDLoc dl(N); ExpandFloatOp_FP_TO_XINT() local 3016 SDLoc dl(N); SoftPromoteHalfRes_FCOPYSIGN() local 3067 SDLoc dl(N); SoftPromoteHalfRes_FMAD() local 3086 SDLoc dl(N); SoftPromoteHalfRes_ExpOp() local 3101 SDLoc dl(N); SoftPromoteHalfRes_FFREXP() local 3186 SDLoc dl(N); SoftPromoteHalfRes_XINT_TO_FP() local 3202 SDLoc dl(N); SoftPromoteHalfRes_UnaryOp() local 3218 SDLoc dl(N); SoftPromoteHalfRes_BinOp() local 3317 SDLoc dl(N); SoftPromoteHalfOp_FCOPYSIGN() local 3358 SDLoc dl(N); SoftPromoteHalfOp_FP_TO_XINT() local 3373 SDLoc dl(N); SoftPromoteHalfOp_FP_TO_XINT_SAT() local 3390 SDLoc dl(N); SoftPromoteHalfOp_SELECT_CC() local 3411 SDLoc dl(N); SoftPromoteHalfOp_SETCC() local 3431 SDLoc dl(N); SoftPromoteHalfOp_STORE() local 3444 SDLoc dl(N); SoftPromoteHalfOp_ATOMIC_STORE() local [all...] |
/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 499 const SDLoc &dl, SelectionDAG &DAG) const { in getInt() argument 548 HexagonTargetLowering::opJoin(const VectorPair &Ops, const SDLoc &dl, in opJoin() argument 555 HexagonTargetLowering::opSplit(SDValue Vec, const SDLoc &dl, in opSplit() argument 727 const SDLoc &dl(ElemIdx); in convertToByteIndex() local 742 const SDLoc &dl(Idx); getIndexInWord32() local 749 getByteShuffle(const SDLoc & dl,SDValue Op0,SDValue Op1,ArrayRef<int> Mask,SelectionDAG & DAG) const getByteShuffle() argument 781 buildHvxVectorReg(ArrayRef<SDValue> Values,const SDLoc & dl,MVT VecTy,SelectionDAG & DAG) const buildHvxVectorReg() argument 993 createHvxPrefixPred(SDValue PredV,const SDLoc & dl,unsigned BitBytes,bool ZeroFill,SelectionDAG & DAG) const createHvxPrefixPred() argument 1079 buildHvxVectorPred(ArrayRef<SDValue> Values,const SDLoc & dl,MVT VecTy,SelectionDAG & DAG) const buildHvxVectorPred() argument 1152 extractHvxElementReg(SDValue VecV,SDValue IdxV,const SDLoc & dl,MVT ResTy,SelectionDAG & DAG) const extractHvxElementReg() argument 1176 extractHvxElementPred(SDValue VecV,SDValue IdxV,const SDLoc & dl,MVT ResTy,SelectionDAG & DAG) const extractHvxElementPred() argument 1195 insertHvxElementReg(SDValue VecV,SDValue IdxV,SDValue ValV,const SDLoc & dl,SelectionDAG & DAG) const insertHvxElementReg() argument 1240 insertHvxElementPred(SDValue VecV,SDValue IdxV,SDValue ValV,const SDLoc & dl,SelectionDAG & DAG) const insertHvxElementPred() argument 1256 extractHvxSubvectorReg(SDValue OrigOp,SDValue VecV,SDValue IdxV,const SDLoc & dl,MVT ResTy,SelectionDAG & DAG) const extractHvxSubvectorReg() argument 1296 extractHvxSubvectorPred(SDValue VecV,SDValue IdxV,const SDLoc & dl,MVT ResTy,SelectionDAG & DAG) const extractHvxSubvectorPred() argument 1360 insertHvxSubvectorReg(SDValue VecV,SDValue SubV,SDValue IdxV,const SDLoc & dl,SelectionDAG & DAG) const insertHvxSubvectorReg() argument 1447 insertHvxSubvectorPred(SDValue VecV,SDValue SubV,SDValue IdxV,const SDLoc & dl,SelectionDAG & DAG) const insertHvxSubvectorPred() argument 1492 extendHvxVectorPred(SDValue VecV,const SDLoc & dl,MVT ResTy,bool ZeroExt,SelectionDAG & DAG) const extendHvxVectorPred() argument 1509 compressHvxPred(SDValue VecQ,const SDLoc & dl,MVT ResTy,SelectionDAG & DAG) const compressHvxPred() argument 1567 resizeToWidth(SDValue VecV,MVT ResTy,bool Signed,const SDLoc & dl,SelectionDAG & DAG) const resizeToWidth() argument 1598 const SDLoc &dl(Vec); extractSubvector() local 1607 const SDLoc &dl(Op); LowerHvxBuildVector() local 1648 const SDLoc &dl(Op); LowerHvxSplatVector() local 1670 const SDLoc &dl(Op); LowerHvxConcatVectors() local 1766 const SDLoc &dl(Op); LowerHvxExtractElement() local 1777 const SDLoc &dl(Op); LowerHvxInsertElement() local 1807 const SDLoc &dl(Op); LowerHvxExtractSubvector() local 1824 const SDLoc &dl(Op); LowerHvxInsertSubvector() local 1871 const SDLoc &dl(Op); LowerHvxCttz() local 1899 const SDLoc &dl(Op); LowerHvxMulh() local 1923 const SDLoc &dl(Op); LowerHvxMulLoHi() local 1962 const SDLoc &dl(Op); LowerHvxBitcast() local 2050 const SDLoc &dl(Op); LowerHvxSelect() local 2086 const SDLoc &dl(Op); LowerHvxFunnelShift() local 2129 const SDLoc &dl(Op); LowerHvxIntrinsic() local 2168 const SDLoc &dl(Op); LowerHvxMaskedOp() local 2246 const SDLoc &dl(Op); LowerHvxFpExtend() local 2399 emitHvxAddWithOverflow(SDValue A,SDValue B,const SDLoc & dl,bool Signed,SelectionDAG & DAG) const emitHvxAddWithOverflow() argument 2434 const SDLoc &dl(Val); emitHvxShiftRightRnd() local 2477 emitHvxMulHsV60(SDValue A,SDValue B,const SDLoc & dl,SelectionDAG & DAG) const emitHvxMulHsV60() argument 2535 emitHvxMulLoHiV60(SDValue A,bool SignedA,SDValue B,bool SignedB,const SDLoc & dl,SelectionDAG & DAG) const emitHvxMulLoHiV60() argument 2612 emitHvxMulLoHiV62(SDValue A,bool SignedA,SDValue B,bool SignedB,const SDLoc & dl,SelectionDAG & DAG) const emitHvxMulLoHiV62() argument 2686 const SDLoc &dl(Op); EqualizeFpIntConversion() local 2701 const SDLoc &dl(Op); ExpandHvxFpToInt() local 2830 const SDLoc &dl(Op); ExpandHvxIntToFp() local 2915 const SDLoc &dl(Op); CreateTLWrapper() local 2933 const SDLoc &dl(Op); SplitVectorOp() local 2972 const SDLoc &dl(Op); SplitHvxMemOp() local 3048 const SDLoc &dl(Op); WidenHvxLoad() local 3080 const SDLoc &dl(Op); WidenHvxStore() local 3114 const SDLoc &dl(Op); WidenHvxSetCC() local 3289 const SDLoc &dl(Op); ExpandHvxResizeIntoSteps() local 3489 const SDLoc &dl(Op); combineTruncateBeforeLegal() local 3529 const SDLoc &dl(Op); combineConcatVectorsBeforeLegal() local 3587 const SDLoc &dl(N); PerformHvxDAGCombine() local [all...] |
H A D | HexagonISelLowering.cpp | 176 Chain, dl, Dst, Src, SizeNode, Flags.getNonZeroByValAlign(), in CreateCopyOfByValArgument() argument 205 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 351 LowerCallResult(SDValue Chain,SDValue Glue,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals,const SmallVectorImpl<SDValue> & OutVals,SDValue Callee) const LowerCallResult() argument 406 SDLoc &dl = CLI.DL; LowerCall() local 730 SDLoc dl(Op); LowerREADCYCLECOUNTER() local 742 SDLoc dl(Op); LowerREADSTEADYCOUNTER() local 767 SDLoc dl(Op); LowerDYNAMIC_STACKALLOC() local 794 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 1048 const SDLoc &dl(Op); LowerSETCC() local 1111 const SDLoc &dl(Op); LowerVSELECT() local 1196 SDLoc dl(Op); LowerRETURNADDR() local 1218 SDLoc dl(Op); LowerFRAMEADDR() local 1230 SDLoc dl(Op); LowerATOMIC_FENCE() local 1236 SDLoc dl(Op); LowerGLOBALADDRESS() local 1271 SDLoc dl(Op); LowerBlockAddress() local 1300 SDLoc dl(GA); GetDynamicTLSAddr() local 1333 SDLoc dl(GA); LowerToTLSInitialExecModel() local 1375 SDLoc dl(GA); LowerToTLSLocalExecModel() local 1397 SDLoc dl(GA); LowerToTLSGeneralDynamicModel() local 1971 validateConstPtrAlignment(SDValue Ptr,Align NeedAlign,const SDLoc & dl,SelectionDAG & DAG) const validateConstPtrAlignment() argument 2011 const SDLoc &dl(Op); replaceMemWithUndef() local 2272 const SDLoc &dl(Op); LowerVECTOR_SHUFFLE() local 2421 const SDLoc &dl(Op); LowerVECTOR_SHIFT() local 2479 const SDLoc &dl(Op); LowerBITCAST() local 2525 buildVector32(ArrayRef<SDValue> Elem,const SDLoc & dl,MVT VecTy,SelectionDAG & DAG) const buildVector32() argument 2616 buildVector64(ArrayRef<SDValue> Elem,const SDLoc & dl,MVT VecTy,SelectionDAG & DAG) const buildVector64() argument 2678 extractVector(SDValue VecV,SDValue IdxV,const SDLoc & dl,MVT ValTy,MVT ResTy,SelectionDAG & DAG) const extractVector() argument 2730 extractVectorPred(SDValue VecV,SDValue IdxV,const SDLoc & dl,MVT ValTy,MVT ResTy,SelectionDAG & DAG) const extractVectorPred() argument 2784 insertVector(SDValue VecV,SDValue ValV,SDValue IdxV,const SDLoc & dl,MVT ValTy,SelectionDAG & DAG) const insertVector() argument 2826 insertVectorPred(SDValue VecV,SDValue ValV,SDValue IdxV,const SDLoc & dl,MVT ValTy,SelectionDAG & DAG) const insertVectorPred() argument 2863 expandPredicate(SDValue Vec32,const SDLoc & dl,SelectionDAG & DAG) const expandPredicate() argument 2874 contractPredicate(SDValue Vec64,const SDLoc & dl,SelectionDAG & DAG) const contractPredicate() argument 2888 getZero(const SDLoc & dl,MVT Ty,SelectionDAG & DAG) const getZero() argument 2915 const SDLoc &dl(Val); appendUndef() local 2927 getCombine(SDValue Hi,SDValue Lo,const SDLoc & dl,MVT ResTy,SelectionDAG & DAG) const getCombine() argument 2952 const SDLoc &dl(Op); LowerBUILD_VECTOR() local 3006 const SDLoc &dl(Op); LowerCONCAT_VECTORS() local 3109 const SDLoc &dl(Op); LowerLoad() local 3146 const SDLoc &dl(Op); LowerStore() local 3184 const SDLoc &dl(Op); LowerUnalignedLoad() local 3269 const SDLoc &dl(Op); LowerUAddSubO() local 3301 const SDLoc &dl(Op); LowerUAddSubOCarry() local 3322 SDLoc dl(Op); LowerEH_RETURN() local 3454 const SDLoc &dl(N); ReplaceNodeResults() local 3484 const SDLoc &dl(Op); PerformDAGCombine() local [all...] |
H A D | HexagonISelDAGToDAG.cpp | 142 __anon84b45f840102(MachineSDNode *N, const SDLoc &dl) INITIALIZE_PASS() argument 199 SDLoc dl(IntN); LoadInstrForLoadIntrinsic() local 236 SDLoc dl(IntN); StoreInstrForLoadIntrinsic() local 332 const SDLoc &dl(IntN); SelectBrevLdIntrinsic() local 456 SDLoc dl(N); SelectLoad() local 473 SelectIndexedStore(StoreSDNode * ST,const SDLoc & dl) SelectIndexedStore() argument 565 SDLoc dl(N); SelectStore() local 579 SDLoc dl(N); SelectSHL() local 728 SDLoc dl(N); SelectConstantFP() local 804 const SDLoc &dl(N); SelectVAlign() local 847 const SDLoc &dl(N); SelectVAlignAddr() local 877 const SDLoc &dl(N); SelectD2P() local 886 const SDLoc &dl(N); SelectV2Q() local 900 const SDLoc &dl(N); SelectQ2V() local 913 const SDLoc &dl(N); FDiv() local 964 const SDLoc &dl(N); FastFDiv() local 1282 SDLoc dl(S); ppAddrRewriteAndSrl() local 1325 const SDLoc &dl(U); ppHoistZextI1() local 1651 const SDLoc &dl(N); DetectUseSxtw() local [all...] |
/llvm-project/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 209 SDLoc dl(Op); in LowerSELECT_CC() local 220 SDLoc dl(Op); in LowerSIGN_EXTEND_INREG() local 243 SDLoc dl(Op); LowerBR_CC() local 266 SDLoc &dl = CLI.DL; LowerCall() local 410 lowerCallResult(SDValue Chain,SDValue Glue,const SmallVectorImpl<CCValAssign> & RVLocs,SDLoc dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) lowerCallResult() argument 471 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 486 LowerCallArguments(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,SDLoc dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallArguments() argument 648 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool IsVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 755 SDLoc dl(Op); LowerFRAMEADDR() local 766 SDLoc dl(GN); LowerGlobalAddress() local 778 SDLoc dl(Op); LowerVASTART() local [all...] |
H A D | ARCFrameLowering.cpp | 46 const ARCInstrInfo &TII, DebugLoc dl, in generateStackAdjustment() argument 126 DebugLoc dl; emitPrologue() local 451 emitRegUpdate(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MBBI,DebugLoc dl,unsigned Reg,int NumBytes,bool IsAdd,const ARCInstrInfo * TII) emitRegUpdate() argument 473 DebugLoc dl = Old.getDebugLoc(); eliminateCallFramePseudoInstr() local [all...] |
/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 569 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 589 SDLoc &dl = CLI.DL; LowerCall() local 620 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument 739 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 809 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument 936 LowerCallResult(SDValue Chain,SDValue InGlue,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCallResult() argument 962 SDLoc dl(N); LowerShifts() local 1023 SDLoc dl(Op); LowerExternalSymbol() local 1033 SDLoc dl(Op); LowerBlockAddress() local 1042 EmitCMP(SDValue & LHS,SDValue & RHS,SDValue & TargetCC,ISD::CondCode CC,const SDLoc & dl,SelectionDAG & DAG) EmitCMP() argument 1133 SDLoc dl (Op); LowerBR_CC() local 1145 SDLoc dl (Op); LowerSETCC() local 1219 SDLoc dl (Op); LowerSELECT_CC() local 1233 SDLoc dl(Op); LowerSIGN_EXTEND() local 1269 SDLoc dl(Op); LowerRETURNADDR() local 1293 SDLoc dl(Op); // FIXME probably not meaningful LowerFRAMEADDR() local 1420 DebugLoc dl = MI.getDebugLoc(); EmitShiftInstr() local 1557 DebugLoc dl = MI.getDebugLoc(); EmitInstrWithCustomInserter() local [all...] |
/llvm-project/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 48 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Val,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument 157 emitRepmovs(const X86Subtarget & Subtarget,SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,MVT AVT) emitRepmovs() argument 179 emitRepmovsB(const X86Subtarget & Subtarget,SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size) emitRepmovsB() argument 208 emitConstantSizeRepmov(SelectionDAG & DAG,const X86Subtarget & Subtarget,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,uint64_t Size,EVT SizeVT,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) emitConstantSizeRepmov() argument 264 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument [all...] |
/llvm-project/mlir/lib/Conversion/LLVMCommon/ |
H A D | LoweringOptions.cpp | 19 const DataLayout &dl) { in LowerToLLVMOptions()
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/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 66 DebugLoc dl = MI.getDebugLoc(); InsertFPImmInst() local 99 DebugLoc dl = MI.getDebugLoc(); InsertFPConstInst() local 134 DebugLoc dl = MI.getDebugLoc(); InsertSPImmInst() local 168 DebugLoc dl = MI.getDebugLoc(); InsertSPConstInst() local [all...] |
H A D | XCoreFrameLowering.cpp | 62 EmitDefCfaRegister(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & dl,const TargetInstrInfo & TII,MachineFunction & MF,unsigned DRegNum) EmitDefCfaRegister() argument 72 EmitDefCfaOffset(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & dl,const TargetInstrInfo & TII,int Offset) EmitDefCfaOffset() argument 82 EmitCfiOffset(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & dl,const TargetInstrInfo & TII,unsigned DRegNum,int Offset) EmitCfiOffset() argument 99 IfNeededExtSP(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & dl,const TargetInstrInfo & TII,int OffsetFromTop,int & Adjusted,int FrameSize,bool emitFrameMoves) IfNeededExtSP() argument 122 IfNeededLDAWSP(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & dl,const TargetInstrInfo & TII,int OffsetFromTop,int & RemainingAdj) IfNeededLDAWSP() argument 192 RestoreSpillList(MachineBasicBlock & MBB,MachineBasicBlock::iterator MBBI,const DebugLoc & dl,const TargetInstrInfo & TII,int & RemainingAdj,SmallVectorImpl<StackSlotInfo> & SpillList) RestoreSpillList() argument 234 DebugLoc dl; emitPrologue() local 349 DebugLoc dl = MBBI->getDebugLoc(); emitEpilogue() local [all...] |
H A D | XCoreISelLowering.cpp | 318 SDLoc dl(CP); in LowerConstantPool() local 341 SDLoc dl(Op); in LowerBR_JT() local 246 SDLoc dl(GA); getGlobalAddressWrapper() local 490 SDLoc dl(Op); LowerSTORE() local 535 SDLoc dl(Op); LowerSMUL_LOHI() local 552 SDLoc dl(Op); LowerUMUL_LOHI() local 637 SDLoc dl(N); TryExpandADDWithMul() local 694 SDLoc dl(N); ExpandADDSUB() local 736 SDLoc dl(Node); LowerVAARG() local 753 SDLoc dl(Op); LowerVASTART() local 817 SDLoc dl(Op); LowerEH_RETURN() local 875 SDLoc dl(Op); LowerINIT_TRAMPOLINE() local 943 SDLoc &dl = CLI.DL; LowerCall() local 972 LowerCallResult(SDValue Chain,SDValue InGlue,const SmallVectorImpl<CCValAssign> & RVLocs,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) LowerCallResult() argument 1020 LowerCCCCallTo(SDValue Chain,SDValue Callee,CallingConv::ID CallConv,bool isVarArg,bool isTailCall,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCCallTo() argument 1150 LowerFormalArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerFormalArguments() argument 1169 LowerCCCArguments(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::InputArg> & Ins,const SDLoc & dl,SelectionDAG & DAG,SmallVectorImpl<SDValue> & InVals) const LowerCCCArguments() argument 1344 LowerReturn(SDValue Chain,CallingConv::ID CallConv,bool isVarArg,const SmallVectorImpl<ISD::OutputArg> & Outs,const SmallVectorImpl<SDValue> & OutVals,const SDLoc & dl,SelectionDAG & DAG) const LowerReturn() argument 1430 DebugLoc dl = MI.getDebugLoc(); EmitInstrWithCustomInserter() local 1496 SDLoc dl(N); PerformDAGCombine() local [all...] |
H A D | XCoreISelDAGToDAG.cpp | 54 getI32Imm(unsigned Imm,const SDLoc & dl) getI32Imm() argument 148 SDLoc dl(N); Select() local 254 SDLoc dl(N); tryBRIND() local [all...] |
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ThumbRegisterInfo.cpp | 63 emitThumb1LoadConstPool(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MBBI,const DebugLoc & dl,unsigned DestReg,unsigned SubIdx,int Val,ARMCC::CondCodes Pred,unsigned PredReg,unsigned MIFlags) emitThumb1LoadConstPool() argument 83 emitThumb2LoadConstPool(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MBBI,const DebugLoc & dl,unsigned DestReg,unsigned SubIdx,int Val,ARMCC::CondCodes Pred,unsigned PredReg,unsigned MIFlags) emitThumb2LoadConstPool() argument 105 emitLoadConstPool(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MBBI,const DebugLoc & dl,Register DestReg,unsigned SubIdx,int Val,ARMCC::CondCodes Pred,Register PredReg,unsigned MIFlags) const emitLoadConstPool() argument 126 emitThumbRegPlusImmInReg(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MBBI,const DebugLoc & dl,Register DestReg,Register BaseReg,int NumBytes,bool CanChangeCC,const TargetInstrInfo & TII,const ARMBaseRegisterInfo & MRI,unsigned MIFlags=MachineInstr::NoFlags) emitThumbRegPlusImmInReg() argument 253 emitThumbRegPlusImmediate(MachineBasicBlock & MBB,MachineBasicBlock::iterator & MBBI,const DebugLoc & dl,Register DestReg,Register BaseReg,int NumBytes,const TargetInstrInfo & TII,const ARMBaseRegisterInfo & MRI,unsigned MIFlags) emitThumbRegPlusImmediate() argument 433 DebugLoc dl = MI.getDebugLoc(); rewriteFrameIndex() local 554 DebugLoc dl = MI.getDebugLoc(); eliminateFrameIndex() local [all...] |
H A D | ARMSelectionDAGInfo.cpp | 39 EmitSpecializedLibcall(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,unsigned Align,RTLIB::Libcall LC) const EmitSpecializedLibcall() argument 169 EmitTargetCodeForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemcpy() argument 287 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemmove() argument 295 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument [all...] |
/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 179 inline SDValue getI16Imm(unsigned Imm, const SDLoc &dl) { in getI16Imm() argument 185 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) { in getI32Imm() argument 191 inline SDValue getI64Imm(uint64_t Imm, const SDLoc &dl) { in getI64Imm() argument 196 inline SDValue getSmallIPtrImm(int64_t Imm, const SDLoc &dl) { in getSmallIPtrImm() argument 405 SDLoc dl(O in SelectInlineAsmMemoryOperand() local 472 DebugLoc dl; INITIALIZE_PASS() local 643 SDLoc dl(SN); selectFrameIndex() local 781 SDLoc dl(ST); tryTLSXFormStore() local 829 SDLoc dl(LD); tryTLSXFormLoad() local 882 SDLoc dl(N); tryBitfieldInsert() local 1019 selectI64ImmDirect(SelectionDAG * CurDAG,const SDLoc & dl,uint64_t Imm,unsigned & InstCnt) selectI64ImmDirect() argument 1260 selectI64ImmDirectPrefix(SelectionDAG * CurDAG,const SDLoc & dl,uint64_t Imm,unsigned & InstCnt) selectI64ImmDirectPrefix() argument 1380 selectI64Imm(SelectionDAG * CurDAG,const SDLoc & dl,uint64_t Imm,unsigned * InstCnt=nullptr) selectI64Imm() argument 1487 SDLoc dl(N); selectI64Imm() local 2114 getI32Imm(unsigned Imm,const SDLoc & dl) getI32Imm() argument 2133 ExtendToInt64(SDValue V,const SDLoc & dl) ExtendToInt64() argument 2147 TruncateToInt32(SDValue V,const SDLoc & dl) TruncateToInt32() argument 2161 SelectAndParts32(const SDLoc & dl,SDValue & Res,unsigned * InstCnt) SelectAndParts32() argument 2260 SDLoc dl(N); Select32() local 2363 SelectRotMask64(SDValue V,const SDLoc & dl,unsigned RLAmt,bool Repl32,unsigned MaskStart,unsigned MaskEnd,unsigned * InstCnt=nullptr) SelectRotMask64() argument 2427 SelectRotMaskIns64(SDValue Base,SDValue V,const SDLoc & dl,unsigned RLAmt,bool Repl32,unsigned MaskStart,unsigned MaskEnd,unsigned * InstCnt=nullptr) SelectRotMaskIns64() argument 2475 SelectAndParts64(const SDLoc & dl,SDValue & Res,unsigned * InstCnt) SelectAndParts64() argument 2646 SDLoc dl(N); Select64() local 2978 SDLoc dl(N); tryEXTEND() local 3005 SDLoc dl(N); tryLogicOpOfCompares() local 3083 SDLoc dl(LogicOp); computeLogicOpInGPR() local 3169 SDLoc dl(Input); signExtendInputIfNeeded() local 3204 SDLoc dl(Input); zeroExtendInputIfNeeded() local 3217 SDLoc dl(NatWidthRes); addExtOrTrunc() local 3242 getCompoundZeroComparisonInGPR(SDValue LHS,SDLoc dl,ZeroCompare CmpTy) getCompoundZeroComparisonInGPR() argument 3318 get32BitZExtCompare(SDValue LHS,SDValue RHS,ISD::CondCode CC,int64_t RHSValue,SDLoc dl) get32BitZExtCompare() argument 3491 get32BitSExtCompare(SDValue LHS,SDValue RHS,ISD::CondCode CC,int64_t RHSValue,SDLoc dl) get32BitSExtCompare() argument 3663 get64BitZExtCompare(SDValue LHS,SDValue RHS,ISD::CondCode CC,int64_t RHSValue,SDLoc dl) get64BitZExtCompare() argument 3820 get64BitSExtCompare(SDValue LHS,SDValue RHS,ISD::CondCode CC,int64_t RHSValue,SDLoc dl) get64BitSExtCompare() argument 4031 SDLoc dl(Compare); getSETCCInGPR() local 4122 SelectCC(SDValue LHS,SDValue RHS,ISD::CondCode CC,const SDLoc & dl,SDValue Chain) SelectCC() argument 4472 SDLoc dl(N); trySETCC() local 4882 SDLoc dl(N); tryFoldSWTestBRCC() local 4949 SDLoc dl(N); tryAsSingleRLWINM() local 4996 SDLoc dl(N); tryAsSingleRLWINM8() local 5088 SDLoc dl(N); tryAsSingleRLWIMI() local 5121 SDLoc dl(N); tryAsSingleRLDCL() local 5138 SDLoc dl(N); tryAsSingleRLDICL() local 5186 SDLoc dl(N); tryAsSingleRLDICR() local 5220 SDLoc dl(N); Select() local 6374 SDLoc dl(N); combineToCMPB() local 6605 SDLoc dl(N); foldBoolExts() local 7897 SDLoc dl(GA); PeepholePPC64() local [all...] |
/llvm-project/clang/test/Sema/ |
H A D | tautological-unsigned-zero-compare.c | 237 double dl = 0; in main() local
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/llvm-project/flang/lib/Optimizer/Support/ |
H A D | DataLayout.cpp | 24 const llvm::DataLayout &dl) { in setMLIRDataLayout()
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/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcFrameLowering.cpp | 47 DebugLoc dl; emitSPAdjustment() local 99 DebugLoc dl; emitPrologue() local 220 DebugLoc dl = MBBI->getDebugLoc(); emitEpilogue() local [all...] |
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SelectionDAGInfo.cpp | 162 EmitTargetCodeForMemset(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,bool AlwaysInline,MachinePointerInfo DstPtrInfo) const EmitTargetCodeForMemset() argument 180 EmitTargetCodeForMemmove(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Dst,SDValue Src,SDValue Size,Align Alignment,bool isVolatile,MachinePointerInfo DstPtrInfo,MachinePointerInfo SrcPtrInfo) const EmitTargetCodeForMemmove() argument 199 EmitUnrolledSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Ptr,uint64_t ObjSize,const MachineMemOperand * BaseMemOperand,bool ZeroData) EmitUnrolledSetTag() argument 252 EmitTargetCodeForSetTag(SelectionDAG & DAG,const SDLoc & dl,SDValue Chain,SDValue Addr,SDValue Size,MachinePointerInfo DstPtrInfo,bool ZeroData) const EmitTargetCodeForSetTag() argument [all...] |
/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips16FrameLowering.cpp | 50 DebugLoc dl; emitPrologue() local 95 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); emitEpilogue() local
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