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/netbsd-src/sys/arch/arm/ti/
H A Domap3_cm.c91 #define OMAP3_CM_HWMOD_CORE1(_name, _bit, _parent, _flags) \ argument
93 #define OMAP3_CM_HWMOD_CORE3(_name, _bit, _parent, _flags) \ argument
95 #define OMAP3_CM_HWMOD_WKUP(_name, _bit, _parent, _flags) \ argument
97 #define OMAP3_CM_HWMOD_PER(_name, _bit, _parent, _flags) \ argument
99 #define OMAP3_CM_HWMOD_USBHOST(_name, _bit, _parent, _flags) \ argument
101 #define OMAP3_CM_HWMOD_NOP(_name, _parent) \ argument
H A Dti_prcm.h97 #define TI_PRCM_FIXED(_name, _rate) \ argument
126 #define TI_PRCM_FIXED_FACTOR(_name, _mult, _div, _parent) \ argument
143 #define TI_PRCM_HWMOD(_name, _reg, _parent, _enable) \ argument
146 #define TI_PRCM_HWMOD_MASK(_name, _reg, _mask, _parent, _enable, _flags) \ argument
H A Dam3_prcm.c129 #define AM3_PRCM_HWMOD_PER(_name, _reg, _parent) \ argument
131 #define AM3_PRCM_HWMOD_PER_DISP(_name, _reg, _parent) \ argument
133 #define AM3_PRCM_HWMOD_WKUP(_name, _reg, _parent) \ argument
/netbsd-src/sys/arch/arm/nxp/
H A Dimx_ccm.h61 #define IMX_EXTCLK(_id, _name) \ argument
87 #define IMX_GATE(_id, _name, _pname, _reg, _mask) \ argument
89 #define IMX_GATE_INDEX(_id, _regidx, _name, _pname, _reg, _mask) \ argument
102 #define IMX_ROOT_GATE(_id, _name, _pname, _reg) \ argument
104 #define IMX_ROOT_GATE_INDEX(_id, _regidx, _name, _pname, _reg) \ argument
124 #define IMX_COMPOSITE(_id, _name, _parents, _reg, _flags) \ argument
127 #define IMX_COMPOSITE_INDEX(_id, _regidx, _name, _parents, _reg, _flags) \ argument
161 #define IMX_PLL(_id, _name, _parent, _reg, _div_mask, _flags) \ argument
163 #define IMX_PLL_INDEX(_id, _regidx, _name, _parent, _reg, _div_mask, _flags) \ argument
187 #define IMX_FIXED(_id, _name, _rate) \ argument
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H A Dimx6_ccmvar.h161 #define CLK_FIXED(_name, _rate) { \ argument
171 #define CLK_FIXED_FACTOR(_name, _parent, _div, _mult) { \ argument
183 #define CLK_PFD(_name, _parent, _reg, _index) { \ argument
195 #define CLK_PLL(_name, _parent, _type, _reg, _mask, _powerdown, _ref) { \ argument
210 #define CLK_DIV(_name, _parent, _reg, _mask) { \ argument
224 #define CLK_DIV_BUSY(_name, _parent, _reg, _mask, _busy_reg, _busy_mask) { \ argument
240 #define CLK_DIV_TABLE(_name, _parent, _reg, _mask, _tbl) { \ argument
255 #define CLK_MUX(_name, _parents, _base, _reg, _mask) { \ argument
270 #define CLK_MUX_BUSY(_name, _parents, _reg, _mask, _busy_reg, _busy_mask) { \ argument
287 #define CLK_GATE(_name, _parent, _base, _reg, _mask) { \ argument
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H A Dimx7d_ccm.c101 #define ANATOP_MUX(_id, _name, _parents, _reg, _mask) \ argument
103 #define ANATOP_GATE(_id, _name, _parent, _reg, _mask) \ argument
105 #define ANATOP_PLL(_id, _name, _parent, _reg, _div_mask, _flags) \ argument
/netbsd-src/sys/arch/arm/rockchip/
H A Drk_cru.h111 #define RK_PLL_FLAGS(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates, _f… argument
131 #define RK_PLL(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates) \ argument
134 #define RK3288_PLL(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates) \ argument
137 #define RK3588_PLL(_id, _name, _parents, _con_base, _mode_reg, _mode_mask, _lock_mask, _rates) \ argument
190 #define RK_ARM(_id, _name, _parents, _reg, _mux_mask, _mux_main, _mux_alt, _div_mask, _rates) \ argument
212 #define _RK_CPU_COMMON_INITIALIZER(_id, _name, _parents, \ argument
231 #define RK_CPU(_id, _name, _parents, _mux_reg, _mux_mask, _mux_main, _mux_alt, \ argument
240 #define RK_CPU_CORE2(_id, _name, _parents, \ argument
254 #define RK_CPU_CORE4(_id, _name, _parents, \ argument
299 #define _RK_COMPOSITE_INIT(_id, _name, _parents, _muxdiv_reg, _mux_mask, _div_mask, _gate_reg, _gat… argument
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/netbsd-src/sys/arch/arm/fdt/
H A Darm_fdtvar.h41 #define _ARM_CPU_METHOD_REGISTER(_name) \ argument
44 #define ARM_CPU_METHOD(_name, _compat, _enable) \ argument
/netbsd-src/sys/arch/riscv/starfive/
H A Djh7100_clkc.h
/netbsd-src/sys/arch/arm/amlogic/
H A Dmeson_clk.h79 #define MESON_CLK_FIXED(_id, _name, _rate) \ argument
105 #define MESON_CLK_GATE_FLAGS(_id, _name, _pname, _reg, _bit, _flags) \ argument
118 #define MESON_CLK_GATE(_id, _name, _pname, _reg, _bit) \ argument
142 #define MESON_CLK_DIV(_id, _name, _parent, _reg, _div, _flags) \ argument
172 #define MESON_CLK_FIXED_FACTOR(_id, _name, _parent, _div, _mult) \ argument
199 #define MESON_CLK_MUX_RATE(_id, _name, _parents, _reg, _sel, \ argument
215 #define MESON_CLK_MUX(_id, _name, _parents, _reg, _sel, _flags) \ argument
262 #define MESON_CLK_PLL_RATE(_id, _name, _parent, _enable, _m, _n, _frac, _l, \ argument
280 #define MESON_CLK_PLL(_id, _name, _parent, _enable, _m, _n, _frac, _l, \ argument
315 #define MESON_CLK_MPLL(_id, _name, _parent, _sdm, _sdm_enable, _n2, \ argument
/netbsd-src/sys/arch/arm/nvidia/
H A Dtegra124_car.c292 #define CLK_FIXED(_name, _rate) { \ argument
297 #define CLK_PLL(_name, _parent, _base, _divm, _divn, _divp) { \ argument
310 #define CLK_MUX(_name, _reg, _bits, _p) { \ argument
322 #define CLK_FIXED_DIV(_name, _parent, _div) { \ argument
332 #define CLK_DIV(_name, _parent, _reg, _bits) { \ argument
343 #define CLK_GATE(_name, _parent, _set, _clr, _bits) { \ argument
356 #define CLK_GATE_L(_name, _parent, _bits) \ argument
361 #define CLK_GATE_H(_name, _parent, _bits) \ argument
366 #define CLK_GATE_U(_name, _parent, _bits) \ argument
371 #define CLK_GATE_V(_name, _parent, _bits) \ argument
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H A Dtegra210_car.c304 #define CLK_FIXED(_name, _rate) { \ argument
309 #define CLK_PLL(_name, _parent, _base, _divm, _divn, _divp) { \ argument
322 #define CLK_MUX(_name, _reg, _bits, _p) { \ argument
334 #define CLK_FIXED_DIV(_name, _parent, _div) { \ argument
344 #define CLK_DIV(_name, _parent, _reg, _bits) { \ argument
355 #define CLK_GATE(_name, _parent, _set, _clr, _bits) { \ argument
368 #define CLK_GATE_L(_name, _parent, _bits) \ argument
373 #define CLK_GATE_H(_name, _parent, _bits) \ argument
378 #define CLK_GATE_U(_name, _parent, _bits) \ argument
383 #define CLK_GATE_V(_name, _parent, _bits) \ argument
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/netbsd-src/external/gpl3/binutils/dist/gprofng/src/
H A DBaseMetricTreeNode.cc52 BaseMetricTreeNode::BaseMetricTreeNode (const char *_name, const char *_uname, in BaseMetricTreeNode()
199 BaseMetricTreeNode::find (const char *_name) in find()
303 BaseMetricTreeNode::add_child (const char * _name, const char *_uname, in add_child()
H A DApplication.cc81 Application::set_name (const char *_name) in set_name()
87 Application::get_realpath (const char *_name) in get_realpath()
H A DMemObject.cc29 MemObj::MemObj (uint64_t _index, char *_name) in MemObj()
/netbsd-src/external/gpl3/binutils.old/dist/gprofng/src/
H A DBaseMetricTreeNode.cc52 BaseMetricTreeNode::BaseMetricTreeNode (const char *_name, const char *_uname, in BaseMetricTreeNode()
199 BaseMetricTreeNode::find (const char *_name) in find()
303 BaseMetricTreeNode::add_child (const char * _name, const char *_uname, in add_child()
H A DApplication.cc81 Application::set_name (const char *_name) in set_name()
87 Application::get_realpath (const char *_name) in get_realpath()
H A DMemObject.cc29 MemObj::MemObj (uint64_t _index, char *_name) in MemObj()
H A DUserLabel.cc33 UserLabel::UserLabel (char *_name) in UserLabel()
/netbsd-src/sys/net80211/
H A Dieee80211_netbsd.h43 #define IEEE80211_LOCK_INIT_IMPL(_ic, _name, _member) \ argument
61 #define IEEE80211_BEACON_LOCK_INIT(_ic, _name) \ argument
77 #define IEEE80211_NODE_LOCK_INIT(_nt, _name) \ argument
94 #define IEEE80211_SCAN_LOCK_INIT(_nt, _name) \ argument
108 #define IEEE80211_NODE_SAVEQ_INIT(_ni, _name) do { \ argument
148 #define ACL_LOCK_INIT(_as, _name) \ argument
/netbsd-src/sys/arch/arm/sunxi/
H A Dsunxi_ccu.h81 #define SUNXI_CCU_GATE(_id, _name, _pname, _reg, _bit) \ argument
129 #define SUNXI_CCU_NKMP_TABLE(_id, _name, _parent, _reg, _n, _k, _m, \ argument
150 #define SUNXI_CCU_NKMP(_id, _name, _parent, _reg, _n, _k, _m, \ argument
182 #define SUNXI_CCU_NM(_id, _name, _parents, _reg, _n, _m, _sel, \ argument
228 #define SUNXI_CCU_DIV(_id, _name, _parents, _reg, _div, \ argument
233 SUNXI_CCU_DIV_GATE(_id,_name,_parents,_reg,_div,_sel,_enable,_flags) global() argument
288 SUNXI_CCU_PREDIV(_id,_name,_parents,_reg,_prediv,_prediv_sel,_div,_sel,_flags) global() argument
293 SUNXI_CCU_PREDIV_FIXED(_id,_name,_parents,_reg,_prediv,_prediv_sel,_prediv_fixed,_div,_sel,_flags) global() argument
326 SUNXI_CCU_PHASE(_id,_name,_parent,_reg,_mask) global() argument
351 SUNXI_CCU_FIXED_FACTOR(_id,_name,_parent,_div,_mult) global() argument
391 SUNXI_CCU_FRACTIONAL(_id,_name,_parent,_reg,_m,_m_min,_m_max,_div_en,_frac_sel,_frac0,_frac1,_prediv,_prediv_val,_enable,_flags) global() argument
431 SUNXI_CCU_MUX(_id,_name,_parents,_reg,_sel,_flags) global() argument
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/netbsd-src/sys/arch/arm/samsung/
H A Dexynos5410_clock.c131 #define CLK_FIXED(_name, _rate) { \ argument
136 #define CLK_PLL(_name, _parent, _lock, _con0) { \ argument
147 #define CLK_MUXF(_name, _alias, _reg, _bits, _f, _p) { \ argument
161 #define CLK_MUXA(_name, _alias, _reg, _bits, _p) \ argument
164 #define CLK_MUX(_name, _reg, _bits, _p) \ argument
167 #define CLK_DIVF(_name, _parent, _reg, _bits, _f) { \ argument
179 #define CLK_DIV(_name, _parent, _reg, _bits) \ argument
182 #define CLK_GATE(_name, _parent, _reg, _bits, _f) { \ argument
H A Dexynos5422_clock.c275 #define CLK_FIXED(_name, _rate) { \ argument
280 #define CLK_PLL(_name, _parent, _lock, _con0) { \ argument
291 #define CLK_MUXF(_name, _alias, _reg, _bits, _f, _p) { \ argument
305 #define CLK_MUXA(_name, _alias, _reg, _bits, _p) \ argument
308 #define CLK_MUX(_name, _reg, _bits, _p) \ argument
311 #define CLK_DIV(_name, _parent, _reg, _bits) { \ argument
322 #define CLK_GATE(_name, _parent, _reg, _bits, _f) { \ argument
/netbsd-src/external/bsd/kyua-cli/dist/utils/cmdline/
H A Dbase_command.hpp55 const std::string _name; member in utils::cmdline::command_proto
/netbsd-src/sbin/newfs_msdos/
H A Dmkfs_msdos.h60 #define AOPT(_opt, _type, _name, _min, _desc) _type _name; argument

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