xref: /netbsd-src/sys/arch/arm/fdt/arm_fdtvar.h (revision 8d564c5dcfeea024762586ce07de3c286d3d30e1)
1*8d564c5dSskrll /* $NetBSD: arm_fdtvar.h,v 1.20 2023/04/07 08:55:30 skrll Exp $ */
28f0ac464Sjmcneill 
38f0ac464Sjmcneill /*-
48f0ac464Sjmcneill  * Copyright (c) 2017 Jared D. McNeill <jmcneill@invisible.ca>
58f0ac464Sjmcneill  * All rights reserved.
68f0ac464Sjmcneill  *
78f0ac464Sjmcneill  * Redistribution and use in source and binary forms, with or without
88f0ac464Sjmcneill  * modification, are permitted provided that the following conditions
98f0ac464Sjmcneill  * are met:
108f0ac464Sjmcneill  * 1. Redistributions of source code must retain the above copyright
118f0ac464Sjmcneill  *    notice, this list of conditions and the following disclaimer.
128f0ac464Sjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
138f0ac464Sjmcneill  *    notice, this list of conditions and the following disclaimer in the
148f0ac464Sjmcneill  *    documentation and/or other materials provided with the distribution.
158f0ac464Sjmcneill  *
168f0ac464Sjmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178f0ac464Sjmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188f0ac464Sjmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198f0ac464Sjmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208f0ac464Sjmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
218f0ac464Sjmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
228f0ac464Sjmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
238f0ac464Sjmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
248f0ac464Sjmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
258f0ac464Sjmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
268f0ac464Sjmcneill  * SUCH DAMAGE.
278f0ac464Sjmcneill  */
288f0ac464Sjmcneill 
298f0ac464Sjmcneill #ifndef _ARM_ARM_FDTVAR_H
308f0ac464Sjmcneill #define _ARM_ARM_FDTVAR_H
318f0ac464Sjmcneill 
323bb9dca4Sjmcneill /*
333bb9dca4Sjmcneill  * CPU enable methods
343bb9dca4Sjmcneill  */
353bb9dca4Sjmcneill 
363bb9dca4Sjmcneill struct arm_cpu_method {
373bb9dca4Sjmcneill 	const char *	acm_compat;
383bb9dca4Sjmcneill 	int		(*acm_enable)(int);
393bb9dca4Sjmcneill };
403bb9dca4Sjmcneill 
413bb9dca4Sjmcneill #define	_ARM_CPU_METHOD_REGISTER(_name)	\
423bb9dca4Sjmcneill 	__link_set_add_rodata(arm_cpu_methods, __CONCAT(_name,_cpu_method));
433bb9dca4Sjmcneill 
443bb9dca4Sjmcneill #define	ARM_CPU_METHOD(_name, _compat, _enable)				\
453bb9dca4Sjmcneill static const struct arm_cpu_method __CONCAT(_name,_cpu_method) = {	\
463bb9dca4Sjmcneill 	.acm_compat = (_compat),					\
473bb9dca4Sjmcneill 	.acm_enable = (_enable)						\
483bb9dca4Sjmcneill };									\
493bb9dca4Sjmcneill _ARM_CPU_METHOD_REGISTER(_name)
503bb9dca4Sjmcneill 
5166d31a2dSryo void	arm_fdt_cpu_bootstrap(void);
52a476a90dSskrll int	arm_fdt_cpu_mpstart(void);
532fdae95fSjmcneill void    arm_fdt_cpu_hatch_register(void *, void (*)(void *, struct cpu_info *));
542fdae95fSjmcneill void    arm_fdt_cpu_hatch(struct cpu_info *);
552fdae95fSjmcneill 
568ae98764Sjmcneill void	arm_fdt_timer_register(void (*)(void));
578ae98764Sjmcneill 
58c6cfeef3Sjmcneill void	arm_fdt_irq_set_handler(void (*)(void *));
59c6cfeef3Sjmcneill void	arm_fdt_irq_handler(void *);
6042d77c91Sjmcneill void	arm_fdt_fiq_set_handler(void (*)(void *));
6142d77c91Sjmcneill void	arm_fdt_fiq_handler(void *);
62c6cfeef3Sjmcneill 
637df551d1Sjmcneill void	arm_fdt_module_init(void);
647df551d1Sjmcneill 
658f0ac464Sjmcneill #endif /* !_ARM_ARM_FDTVAR_H */
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