| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 1089 buildIndirectWrite(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg) const buildIndirectWrite() argument
1096 buildIndirectWrite(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg,unsigned AddrChan) const buildIndirectWrite() argument
1121 buildIndirectRead(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg) const buildIndirectRead() argument
1128 buildIndirectRead(MachineBasicBlock * MBB,MachineBasicBlock::iterator I,unsigned ValueReg,unsigned Address,unsigned OffsetReg,unsigned AddrChan) const buildIndirectRead() argument
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| H A D | SIRegisterInfo.cpp | 1216 spillVGPRtoAGPR(const GCNSubtarget & ST,MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,int Index,unsigned Lane,unsigned ValueReg,bool IsKill) spillVGPRtoAGPR() argument
1331 buildSpillLoadStore(MachineBasicBlock & MBB,MachineBasicBlock::iterator MI,const DebugLoc & DL,unsigned LoadStoreOp,int Index,Register ValueReg,bool IsKill,MCRegister ScratchOffsetReg,int64_t InstOffset,MachineMemOperand * MMO,RegScavenger * RS,LiveRegUnits * LiveUnits) const buildSpillLoadStore() argument
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| /llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVBuiltins.cpp | 851 .addUse(ValueReg); in buildAtomicFloatingRMWInst() local
323 Register ValueReg = BitcastMI->getOperand(2).getReg(); getBlockStructInstr() local
350 Register ValueReg = MI->getOperand(0).getReg(); getMachineInstrType() local
799 Register ValueReg = Call->Arguments[1]; buildAtomicRMWInst() local
1246 Register ValueReg = Call->Arguments[2]; generateGroupUniformInst() local
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| H A D | SPIRVInstructionSelector.cpp | 908 Register ValueReg = I.getOperand(2).getReg(); selectAtomicRMW() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 184 const Register ValueReg = I.getOperand(0).getReg(); in selectLoadStoreOpCode() local
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| /llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 1295 Register ValueReg = getRegForValue(Store->getValueOperand()); selectStore() local
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| /llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 12229 Register ValueReg = RegInfo.createVirtualRegister(&PPC::GPRCRegClass); EmitPartwordAtomicBinary() local
12376 unsigned ValueReg = SReg; EmitPartwordAtomicBinary() local
[all...] |