/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ShuffleDecodeConstantPool.cpp | 27 APInt &UndefElts, in extractConstantMask() 123 APInt UndefElts; in DecodePSHUFBMask() local 162 APInt UndefElts; in DecodeVPERMILPMask() local 198 APInt UndefElts; in DecodeVPERMIL2PMask() local 252 APInt UndefElts; in DecodeVPPERMMask() local
|
H A D | X86InstCombineIntrinsic.cpp | 2149 APInt UndefElts(Width, 0); instCombineIntrinsic() local 3101 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> simplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument [all...] |
H A D | X86ISelLowering.cpp | 4738 getTargetConstantBitsFromNode(SDValue Op,unsigned EltSizeInBits,APInt & UndefElts,SmallVectorImpl<APInt> & EltBits,bool AllowWholeUndefs=true,bool AllowPartialUndefs=false) getTargetConstantBitsFromNode() argument 5069 APInt UndefElts; isConstantSplat() local 5098 getTargetShuffleMaskIndices(SDValue MaskNode,unsigned MaskEltSizeInBits,SmallVectorImpl<uint64_t> & RawMask,APInt & UndefElts) getTargetShuffleMaskIndices() argument 5135 APInt UndefElts; IsNOT() local 5796 APInt UndefElts; createShuffleMaskFromVSELECT() local 5863 APInt UndefElts; getFauxShuffleMask() local 23473 APInt UndefElts; LowerVSETCC() local 29436 APInt UndefElts; convertShiftLeftToScale() local 37496 APInt UndefElts; computeKnownBitsForTargetNode() local 39048 APInt UndefElts(NumMaskElts, 0); combineX86ShuffleChain() local 39589 APInt UndefElts(NumMaskElts, 0); combineX86ShufflesConstants() local 39999 APInt UndefElts; combineX86ShufflesRecursively() local 42076 APInt UndefElts; SimplifyDemandedVectorEltsForTargetNode() local 43287 isSplatValueForTargetNode(SDValue Op,const APInt & DemandedElts,APInt & UndefElts,const SelectionDAG & DAG,unsigned Depth) const isSplatValueForTargetNode() argument 43918 APInt UndefElts; combineBitcast() local 48359 auto &UndefElts = (Elt >= NumSrcEltsPerLane ? UndefElts1 : UndefElts0); combineVectorPack() local 48533 APInt UndefElts; combineVectorShiftVar() local 48649 APInt UndefElts; combineVectorShiftImm() local 49888 APInt UndefElts; combineAnd() local 49942 APInt UndefElts; combineAnd() local 50526 APInt UndefElts; combineOrXorWithSETCC() local 50671 APInt UndefElts; combineOr() local 52608 APInt UndefElts; isFNEG() local 53399 APInt UndefElts; combineAndnp() local 54367 APInt UndefElts; combineMOVMSK() local 54445 APInt UndefElts; combineMOVMSK() local 54582 BitVector UndefElts; combineGatherScatter() local 56532 APInt UndefElts = APInt::getZero(VT.getVectorNumElements()); combineConcatVectorOps() local [all...] |
/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86ShuffleDecode.cpp | 292 DecodePSHUFBMask(ArrayRef<uint64_t> RawMask,const APInt & UndefElts,SmallVectorImpl<int> & ShuffleMask) DecodePSHUFBMask() argument 324 DecodeVPPERMMask(ArrayRef<uint64_t> RawMask,const APInt & UndefElts,SmallVectorImpl<int> & ShuffleMask) DecodeVPPERMMask() argument 477 DecodeVPERMILPMask(unsigned NumElts,unsigned ScalarBits,ArrayRef<uint64_t> RawMask,const APInt & UndefElts,SmallVectorImpl<int> & ShuffleMask) DecodeVPERMILPMask() argument 499 DecodeVPERMIL2PMask(unsigned NumElts,unsigned ScalarBits,unsigned M2Z,ArrayRef<uint64_t> RawMask,const APInt & UndefElts,SmallVectorImpl<int> & ShuffleMask) DecodeVPERMIL2PMask() argument 544 DecodeVPERMVMask(ArrayRef<uint64_t> RawMask,const APInt & UndefElts,SmallVectorImpl<int> & ShuffleMask) DecodeVPERMVMask() argument 558 DecodeVPERMV3Mask(ArrayRef<uint64_t> RawMask,const APInt & UndefElts,SmallVectorImpl<int> & ShuffleMask) DecodeVPERMV3Mask() argument [all...] |
/llvm-project/llvm/unittests/CodeGen/ |
H A D | AArch64SelectionDAGTest.cpp | 441 EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts)); in TEST_F() local 397 APInt UndefElts; TEST_F() local 421 APInt UndefElts; TEST_F() local 461 APInt UndefElts; TEST_F() local [all...] |
/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstCombineIntrinsic.cpp | 1372 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument
|
/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMTargetTransformInfo.cpp | 261 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt OrigDemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument
|
/llvm-project/llvm/include/llvm/Analysis/ |
H A D | TargetTransformInfoImpl.h | 207 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) simplifyDemandedVectorEltsIntrinsic() argument
|
H A D | TargetTransformInfo.h | 2318 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) simplifyDemandedVectorEltsIntrinsic() argument
|
/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | BasicTTIImpl.h | 698 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) simplifyDemandedVectorEltsIntrinsic() argument
|
/llvm-project/llvm/lib/Analysis/ |
H A D | TargetTransformInfo.cpp | 375 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt DemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument
|
/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64TargetTransformInfo.cpp | 2274 simplifyDemandedVectorEltsIntrinsic(InstCombiner & IC,IntrinsicInst & II,APInt OrigDemandedElts,APInt & UndefElts,APInt & UndefElts2,APInt & UndefElts3,std::function<void (Instruction *,unsigned,APInt,APInt &)> SimplifyAndSetOp) const simplifyDemandedVectorEltsIntrinsic() argument
|
/llvm-project/llvm/lib/IR/ |
H A D | Instructions.cpp | 2052 APInt UndefElts = APInt::getZero(NumMaskElts); isInsertSubvectorMask() local
|
/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 2743 isSplatValue(SDValue V,const APInt & DemandedElts,APInt & UndefElts,unsigned Depth) const isSplatValue() argument 2932 APInt UndefElts; isSplatValue() local 2949 APInt UndefElts; getSplatSourceVector() local [all...] |
H A D | TargetLowering.cpp | 3877 isSplatValueForTargetNode(SDValue Op,const APInt & DemandedElts,APInt & UndefElts,const SelectionDAG & DAG,unsigned Depth) const isSplatValueForTargetNode() argument
|
H A D | DAGCombiner.cpp | 25407 APInt UndefElts; combineShuffleOfSplatVal() local [all...] |