| /llvm-project/llvm/include/llvm/XRay/ |
| H A D | FDRTraceExpander.h | 27 int32_t TID = 0; variable
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| H A D | FDRRecords.h | 337 int32_t TID = 0; variable
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| /llvm-project/flang/test/Semantics/OpenMP/ |
| H A D | do18.f90 | 8 integer NUMTHRDS, TID variable
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| /llvm-project/clang-tools-extra/clangd/support/ |
| H A D | Trace.cpp | 80 uint64_t TID = llvm::get_threadid(), double Timestamp = 0) { in jsonEvent()
149 uint64_t TID; member in clang::clangd::trace::__anondc7550a90111::JSONTracer::JSONSpan
169 uint64_t TID = llvm::get_threadid(); in captureThreadMetadata() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 435 const MCInstrDesc &TID = TII->get(N->getMachineOpcode()); in SUSchedulingCost() local
537 const MCInstrDesc &TID = TII->get(N->getMachineOpcode()); in initNumRegDefsLeft() local
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| /llvm-project/llvm/lib/XRay/ |
| H A D | Profile.cpp | 389 const auto &TID = ThreadPaths.first; in profileFromTrace() local
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| /llvm-project/llvm/lib/IR/ |
| H A D | Type.cpp | 669 VectorType(Type * ElType,unsigned EQ,Type::TypeID TID) VectorType() argument
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| H A D | AsmWriter.cpp | 1122 for (const auto &TID : TheIndex->typeIds()) processIndex() local
3075 for (const auto &TID : TheIndex->typeIds()) { printModuleSummaryIndex() local
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| /llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 98 MachineInstr(MachineFunction & MF,const MCInstrDesc & TID,DebugLoc DL,bool NoImp) MachineInstr() argument
143 setDesc(const MCInstrDesc & TID) setDesc() argument
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| H A D | MachineFunction.cpp | 183 const MCInstrDesc &TID) { in handleChangeDesc() argument
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| H A D | PeepholeOptimizer.cpp | 298 MF_HandleChangeDesc(MachineInstr & MI,const MCInstrDesc & TID) MF_HandleChangeDesc() argument
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 1061 const MCInstrDesc& TID = MI.getDesc(); in ignorePseudoInstruction() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPromoteAlloca.cpp | 1483 Value *TID = Builder.CreateAdd(Tmp0, Tmp1); tryPromoteAllocaToLDS() local
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| H A D | SIInstrInfo.cpp | 2612 const MCInstrDesc &TID = get(NewOpcode); reMaterialize() local
5549 adjustAllocatableRegClass(const GCNSubtarget & ST,const SIRegisterInfo & RI,const MachineRegisterInfo & MRI,const MCInstrDesc & TID,unsigned RCID,bool IsAllocatable) adjustAllocatableRegClass() argument
5582 getRegClass(const MCInstrDesc & TID,unsigned OpNum,const TargetRegisterInfo * TRI,const MachineFunction & MF) const getRegClass() argument
[all...] |
| /llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUInstPrinter.cpp | 216 const MCInstrDesc &TID = MII.get(Opcode); printTH() local
|
| /llvm-project/llvm/unittests/Frontend/ |
| H A D | OpenMPIRBuilderTest.cpp | 4929 Value *TID = OMPBuilder.getOrCreateThreadID(Ident); TEST_F() local
5167 Value *TID = OMPBuilder.getOrCreateThreadID(Ident); TEST_F() local
5187 Value *TID = OMPBuilder.getOrCreateThreadID(Ident); TEST_F() local
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| /llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4969 const MCInstrDesc &TID = MII.get(Opcode); validateTHAndScopeBits() local
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| /llvm-project/clang/include/clang/AST/ |
| H A D | OpenMPClause.h | 8743 setThreadID(Expr * TID) setThreadID() argument
|