| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RenameIndependentSubregs.cpp | 182 unsigned SubRegIdx = MO.getSubReg(); in findComponents() local
226 unsigned SubRegIdx = MO.getSubReg(); in rewriteOperands() local
348 unsigned SubRegIdx = MO.getSubReg(); computeMainRangesFixFlags() local
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| H A D | RegisterPressure.cpp | 533 unsigned SubRegIdx = MO.getSubReg(); in collectOperandLanes() local
551 void pushRegLanes(Register Reg, unsigned SubRegIdx, in pushRegLanes() argument
1232 unsigned SubRegIdx = MO.getSubReg(); findUseBetween() local
[all...] |
| H A D | VirtRegMap.cpp | 396 unsigned SubRegIdx = MO.getSubReg(); in readsUndefSubreg() local
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| H A D | StackMaps.cpp | 286 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg()); in parseOperand() local
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| H A D | MachineCopyPropagation.cpp | 697 unsigned SubRegIdx = TRI->getSubRegIndex(CopyDstReg, MOUse.getReg()); forwardUses() local
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| H A D | RegisterCoalescer.cpp | 1791 MachineOperand &MO, unsigned SubRegIdx) { in addUndefFlag() argument
1945 unsigned SubRegIdx = MO.getSubReg(); in setUndefOnPrunedSubRegUses() local
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| H A D | RegAllocFast.cpp | 971 unsigned SubRegIdx = MO.getSubReg(); allocVirtRegUndef() local
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| H A D | MachineVerifier.cpp | 2511 const unsigned SubRegIdx = MO->getSubReg(); checkLiveness() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILoadStoreOptimizer.cpp | 1429 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeSMemLoadImmPair() local
1484 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeBufferLoadPair() local
1543 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeTBufferLoadPair() local
1572 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeTBufferStorePair() local
1641 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeFlatLoadPair() local
1670 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeFlatStorePair() local
1901 std::pair<unsigned, unsigned> SubRegIdx = getSubRegIdxs(CI, Paired); mergeBufferStorePair() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 330 const unsigned *SubRegIdx, in copyPhysSubRegs() argument
393 const unsigned SubRegIdx[] = {VE::sub_vm_even, VE::sub_vm_odd}; in copyPhysReg() local
399 const unsigned SubRegIdx[] = {VE::sub_even, VE::sub_odd}; in copyPhysReg() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 196 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg); getSuperRegDestIfDead() local
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| H A D | X86ISelDAGToDAG.cpp | 1640 unsigned SubRegIdx = N->getConstantOperandVal(2); PostprocessISelDAG() local
5903 unsigned SubRegIdx; Select() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 291 unsigned Opcode, SubRegIdx; lowerVSPILL() local
368 unsigned Opcode, SubRegIdx; lowerVRELOAD() local
[all...] |
| H A D | RISCVISelDAGToDAG.cpp | 371 unsigned SubRegIdx = RISCVTargetLowering::getSubregIndexByMVT(VT, I); selectVLSEG() local
412 unsigned SubRegIdx = RISCVTargetLowering::getSubregIndexByMVT(VT, I); selectVLSEGFF() local
464 unsigned SubRegIdx = RISCVTargetLowering::getSubregIndexByMVT(VT, I); selectVLXSEG() local
2009 unsigned SubRegIdx; Select() local
2062 unsigned SubRegIdx; Select() local
[all...] |
| H A D | RISCVInstrInfo.cpp | 306 unsigned SubRegIdx; copyPhysRegVector() local
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| H A D | RISCVISelLowering.cpp | 2376 unsigned SubRegIdx = RISCV::NoSubRegister; decomposeSubvectorInsertExtractToSubRegs() local
7954 unsigned SubRegIdx = OrigIdx / ElemsPerVReg; lowerINSERT_VECTOR_ELT() local
8167 unsigned SubRegIdx = OrigIdx / ElemsPerVReg; lowerEXTRACT_VECTOR_ELT() local
9444 unsigned SubRegIdx, RemIdx; lowerINSERT_SUBVECTOR() local
9610 unsigned SubRegIdx, RemIdx; lowerEXTRACT_SUBVECTOR() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GIMatchTableExecutorImpl.h | 1072 uint16_t SubRegIdx = readU16(); executeMatchTable() local
1246 uint16_t SubRegIdx = readU16(); executeMatchTable() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 3236 NatWidthRes, SubRegIdx), 0); in addExtOrTrunc() local
2151 SDValue SubRegIdx = CurDAG->getTargetConstant(PPC::sub_32, dl, MVT::i32); ExtendToInt64() local
2165 SDValue SubRegIdx = CurDAG->getTargetConstant(PPC::sub_32, dl, MVT::i32); TruncateToInt32() local
3246 SDValue SubRegIdx = addExtOrTrunc() local
5406 SDValue SubRegIdx = CurDAG->getTargetConstant(SubReg, dl, MVT::i32); Select() local
5459 SDValue SubRegIdx = CurDAG->getTargetConstant(PPC::sub_eq, dl, MVT::i32); Select() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | |
| H A D | GlobalISelMatchTable.h | |
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 658 getSubRegisterClass(const TargetRegisterClass * SuperRC,unsigned SubRegIdx) getSubRegisterClass() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 1183 unsigned SubRegIdx = loadVectorConstant() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 4786 SDValue SubRegIdx = Select() local
4799 SDValue SubRegIdx = Select() local
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 1565 SelectLoad(SDNode * N,unsigned NumVecs,unsigned Opc,unsigned SubRegIdx) SelectLoad() argument
1594 SelectPostLoad(SDNode * N,unsigned NumVecs,unsigned Opc,unsigned SubRegIdx) SelectPostLoad() argument
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| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 3327 unsigned SubRegIdx = Subtarget.isABI_N64() ? Mips::sub_32 : 0; emitINSERT_DF_VIDX() local
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