| /llvm-project/clang-tools-extra/clang-tidy/bugprone/ |
| H A D | ImplicitWideningOfMultiplicationResultCheck.cpp | 82 unsigned SrcWidth = Context->getIntWidth(ETy); handleImplicitCastExpr() local
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| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineNegator.cpp | 249 unsigned SrcWidth = SrcOp->getType()->getScalarSizeInBits(); visitImpl() local
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| H A D | InstCombineShifts.cpp | 1047 unsigned SrcWidth = X->getType()->getScalarSizeInBits(); visitShl() local
1471 unsigned SrcWidth = X->getType()->getScalarSizeInBits(); visitLShr() local
1545 unsigned SrcWidth = X->getType()->getScalarSizeInBits(); visitLShr() local
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| H A D | InstCombineCasts.cpp | 547 unsigned SrcWidth = SrcTy->getScalarSizeInBits(); narrowBinOp() local
684 unsigned SrcWidth = SrcTy->getScalarSizeInBits(); visitTrunc() local
1731 unsigned SrcWidth = std::max(LHSWidth, RHSWidth); visitFPTrunc() local
[all...] |
| H A D | InstCombineMulDivRem.cpp | 282 if (ShiftAmt >= BitWidth - SrcWidth) { in visitMul() local
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| H A D | InstCombineVectorOps.cpp | 290 unsigned SrcWidth = SrcTy->getScalarSizeInBits(); in foldBitcastExtElt() local
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| /llvm-project/llvm/lib/Support/ |
| H A D | APFixedPoint.cpp | 455 unsigned SrcWidth = getWidth(); convertToInt() local
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| /llvm-project/llvm/include/llvm/IR/ |
| H A D | FixedPointBuilder.h | 37 unsigned SrcWidth = SrcSema.getWidth(); in Convert() local
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| /llvm-project/llvm/lib/IR/ |
| H A D | ConstantFold.cpp | 784 unsigned SrcWidth = std::min(DstWidth, Log2(GVAlign)); ConstantFoldBinaryInstruction() local
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| /llvm-project/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 312 getShuffleDemandedElts(int SrcWidth,ArrayRef<int> Mask,const APInt & DemandedElts,APInt & DemandedLHS,APInt & DemandedRHS,bool AllowUndefElts) getShuffleDemandedElts() argument
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| /llvm-project/clang/lib/AST/Interp/ |
| H A D | InterpBuiltin.cpp | |
| /llvm-project/clang/lib/CodeGen/ |
| H A D | CGExprConstant.cpp | 1077 unsigned SrcWidth = CGM.getContext().getIntWidth(FromType); ProduceIntToIntCast() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 715 TypeSize SrcWidth = SrcVT.getSizeInBits(); LegalizeLoadOps() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 16081 createTblShuffleMask(unsigned SrcWidth,unsigned DstWidth,unsigned NumElts,bool IsLittleEndian,SmallVectorImpl<int> & Mask) createTblShuffleMask() argument
16110 auto SrcWidth = cast<IntegerType>(SrcTy->getElementType())->getBitWidth(); createTblShuffleForZExt() local
16130 auto SrcWidth = cast<IntegerType>(SrcTy->getElementType())->getBitWidth(); createTblShuffleForSExt() local
16297 auto SrcWidth = SrcTy->getElementType()->getScalarSizeInBits(); optimizeExtendOrTruncateConversion() local
[all...] |
| /llvm-project/clang/lib/AST/ |
| H A D | ExprConstant.cpp | 9459 unsigned SrcWidth = Info.Ctx.getIntWidth(ForType); getAlignmentArgument() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 54747 unsigned SrcWidth = SrcVT.getSizeInBits(); combineToFPTruncExtElt() local
[all...] |