/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | InlineAsmLowering.cpp | 405 ArrayRef<Register> SrcRegs = GetOrCreateVRegs(*OpInfo.CallOperandVal); in lowerInlineAsm() local
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H A D | IRTranslator.cpp | 1692 SmallVector<Register, 3> SrcRegs; in translateMemFunc() local 1483 ArrayRef<Register> SrcRegs = getOrCreateVRegs(*Src); translateExtractValue() local 1500 ArrayRef<Register> SrcRegs = getOrCreateVRegs(*Src); translateInsertValue() local 3138 const ArrayRef<Register> SrcRegs = getOrCreateVRegs(*U.getOperand(0)); translateFreeze() local [all...] |
H A D | LegalizerHelper.cpp | 1654 SrcRegs.push_back(SrcReg); in narrowScalar() local 1448 SmallVector<SmallVector<Register, 2>, 2> SrcRegs(MI.getNumOperands() / 2); narrowScalar() local 1597 SmallVector<Register, 2> SrcRegs; narrowScalar() local 3014 SmallVector<Register, 8> SrcRegs; lowerBitcast() local 3063 SmallVector<Register, 8> SrcRegs; lowerBitcast() local 5686 SmallVector<Register, 2> SrcRegs, DstRegs; narrowScalarExtract() local 5746 SmallVector<Register, 2> SrcRegs, LeftoverRegs, DstRegs; narrowScalarInsert() local 7144 SmallVector<Register, 8> SrcRegs; lowerExtractInsertVectorElt() local [all...] |
H A D | CallLowering.cpp | 298 mergeVectorRegsToResultRegs(MachineIRBuilder & B,ArrayRef<Register> DstRegs,ArrayRef<Register> SrcRegs) mergeVectorRegsToResultRegs() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86MCInstLower.cpp | 1111 Register SrcRegs[] = {0, 0}; LowerPATCHABLE_EVENT_CALL() local 1210 Register SrcRegs[] = {0, 0, 0}; LowerPATCHABLE_TYPED_EVENT_CALL() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIFixSGPRCopies.cpp | 987 SmallSet<std::pair<Register, unsigned>, 4> SrcRegs; needToBeConvertedToVALU() local
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H A D | AMDGPURegisterBankInfo.cpp | 2609 if (SrcRegs.empty()) in applyMappingImpl() local 1140 SmallVector<Register, 1> SrcRegs(OpdMapper.getVRegs(1)); applyMappingLoad() local 2691 SmallVector<Register, 2> SrcRegs(OpdMapper.getVRegs(1)); applyMappingImpl() local [all...] |
H A D | AMDGPULegalizerInfo.cpp | 2702 SmallVector<Register, 8> SrcRegs; legalizeInsertVectorElt() local
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | PeepholeOptimizer.cpp | 820 insertPHI(MachineRegisterInfo & MRI,const TargetInstrInfo & TII,const SmallVectorImpl<RegSubRegPair> & SrcRegs,MachineInstr & OrigPHI) insertPHI() argument
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