| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterCoalescer.h | 42 unsigned SrcIdx = 0; variable
|
| H A D | TwoAddressInstructionPass.cpp | 1242 tryInstructionTransform(MachineBasicBlock::iterator & mi,MachineBasicBlock::iterator & nmi,unsigned SrcIdx,unsigned DstIdx,unsigned & Dist,bool shouldOnlyCommute) tryInstructionTransform() argument
1443 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) { collectTiedOperands() local
1492 unsigned SrcIdx = TP.first; processTiedPairs() local
1677 unsigned SrcIdx = TO.second[0].first; processStatepoint() local
1829 unsigned SrcIdx = TiedPairs[0].first; runOnMachineFunction() local
[all...] |
| H A D | TargetRegisterInfo.cpp | 393 unsigned SrcIdx, DefIdx; shareSameRegisterFile() local
|
| H A D | RegisterCoalescer.cpp | 1291 unsigned SrcIdx = CP.isFlipped() ? CP.getDstIdx() : CP.getSrcIdx(); reMaterializeTrivialDef() local
1983 unsigned SrcIdx = CP.getSrcIdx(); joinCopy() local
3656 unsigned SrcIdx = CP.getSrcIdx(); joinVirtRegs() local
[all...] |
| H A D | PeepholeOptimizer.cpp | 1919 unsigned SrcIdx = Def->getNumOperands(); in getNextSourceFromBitcast() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 1693 unsigned SrcIdx = 1; addConstantComments() local
1766 unsigned SrcIdx = 1; addConstantComments() local
[all...] |
| H A D | X86InstrInfo.cpp | 2438 unsigned SrcIdx = (Imm >> 6) & 3; commuteInstructionImpl() local
7200 unsigned SrcIdx = (Imm >> 6) & 3; foldMemoryOperandCustom() local
|
| H A D | X86ISelLowering.cpp | 5554 unsigned SrcIdx = M / Size; getTargetShuffleAndZeroables() local
5911 unsigned SrcIdx = SrcExtract.getConstantOperandVal(1); getFauxShuffleMask() local
6317 uint64_t SrcIdx = Op.getConstantOperandVal(1); getShuffleScalarElt() local
11784 int SrcIdx = i + Offset; lowerShuffleAsSpecificZeroOrAnyExtend() local
40402 unsigned SrcIdx = (InsertPSMask >> 6) & 0x3; combineTargetShuffle() local
41554 unsigned SrcIdx = (LoMask & 0x2) >> 1; SimplifyDemandedVectorEltsForTargetNode() local
47324 unsigned SrcIdx = Lane * NumSrcEltsPerLane + Elt % NumSrcEltsPerLane; combineVectorPack() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600InstrInfo.cpp | 292 int SrcIdx = getOperandIdx(MI.getOpcode(), Op[0]); in getSrcs() local
1374 getFlagOp(MachineInstr & MI,unsigned SrcIdx,unsigned Flag) const getFlagOp() argument
|
| H A D | AMDGPUInstCombineIntrinsic.cpp | 1287 for (unsigned SrcIdx = 0; SrcIdx < 4; ++SrcIdx) { simplifyAMDGCNMemoryIntrinsicDemanded() local
|
| H A D | SIFoldOperands.cpp | 249 unsigned SrcIdx = ~0; tryFoldImmWithOpSel() local
|
| H A D | R600ISelLowering.cpp | 1945 FoldOperand(SDNode * ParentNode,unsigned SrcIdx,SDValue & Src,SDValue & Neg,SDValue & Abs,SDValue & Sel,SDValue & Imm,SelectionDAG & DAG) const FoldOperand() argument
|
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 981 for (unsigned SrcIdx = 0; SrcIdx < BV->getNumSources(); ++SrcIdx) { ConstantFoldCTLZ() local
1357 for (unsigned SrcIdx = 0; SrcIdx < BV->getNumSources(); ++SrcIdx) { isConstantOrConstantVector() local
|
| H A D | CombinerHelper.cpp | 2019 unsigned SrcIdx = MI.getNumOperands() - 1; matchCombineUnmergeConstant() local
2060 unsigned SrcIdx = MI.getNumOperands() - 1; matchCombineUnmergeUndef() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ExpandPseudoInsts.cpp | 487 unsigned PredIdx, DOPIdx, SrcIdx, Src2Idx; expand_DestructiveOp() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | InferAddressSpaces.cpp | 1267 int SrcIdx = U.getOperandNo(); rewriteWithNewAddressSpaces() local
|
| /freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 671 for (unsigned SrcIdx = StartSrcIdx; SrcIdx < StartSrcIdx + NumSrcsUsed; findValueFromBuildVector() local
|
| /freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGNonTrivialStruct.cpp | 33 enum { DstIdx = 0, SrcIdx = 1 }; enumerator
[all...] |
| H A D | CGBuiltin.cpp | 20839 Value *SrcIdx = EmitScalarExpr(E->getArg(3)); EmitWebAssemblyBuiltinExpr() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineVectorOps.cpp | 542 int SrcIdx = visitExtractElementInst() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4180 auto SrcIdx = getNamedOperandIdx(Opcode, SrcName); validateLdsDirect() local
6783 int SrcIdx = 0; cvtExp() local
[all...] |
| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| H A D | InstrRefBasedImpl.cpp | 2093 LocIdx SrcIdx = MTracker->getSpillMLoc(SpillID); transferSpillOrRestoreInst() local
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 862 SmallVectorImpl<int> &SrcIdx) { in buildHvxVectorReg()
|
| /freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4690 int SrcIdx = Mask[DstIdx]; lowerShuffleViaVRegSplitting() local
|