Lines Matching defs:SrcIdx

171                                unsigned SrcIdx, unsigned DstIdx,
1314     unsigned SrcIdx, unsigned DstIdx, unsigned &Dist, bool shouldOnlyCommute) {
1320   Register regB = MI.getOperand(SrcIdx).getReg();
1328   bool Commuted = tryInstructionCommute(&MI, DstIdx, SrcIdx, regBKilled, Dist);
1354     regB = MI.getOperand(SrcIdx).getReg();
1519   for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) {
1521     if (!MI->isRegTiedToDefOperand(SrcIdx, &DstIdx))
1524     MachineOperand &SrcMO = MI->getOperand(SrcIdx);
1546     TiedOperands[SrcReg].push_back(std::make_pair(SrcIdx, DstIdx));
1552 // The tied pairs are of the form (SrcIdx, DstIdx).
1567     unsigned SrcIdx = TP.first;
1575     RegB = MI->getOperand(SrcIdx).getReg();
1576     SubRegB = MI->getOperand(SrcIdx).getSubReg();
1651     MachineOperand &MO = MI->getOperand(SrcIdx);
1659     // Make sure regA is a legal regclass for the SrcIdx operand.
1752     unsigned SrcIdx = TO.second[0].first;
1758     assert(RegB == MI->getOperand(SrcIdx).getReg());
1814       if (MI->getOperand(SrcIdx).isKill())
1886           unsigned SrcIdx = TiedPairs[0].first;
1888           Register SrcReg = mi->getOperand(SrcIdx).getReg();
1891               tryInstructionTransform(mi, nmi, SrcIdx, DstIdx, Dist, false)) {