| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCDuplexInfo.cpp | 190 MCRegister DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
[all...] |
| H A D | HexagonMCCompound.cpp | 81 MCRegister DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
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| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZPostRewrite.cpp | 105 Register Src2Reg = MBBI->getOperand(2).getReg(); in selectSELRMux() local
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| /llvm-project/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 276 Register Src2Reg = MI->getOperand(3).getReg(); in ExpandFPMLxInstruction() local
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| /llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1289 Register Src2Reg = MI.getOperand(2).getReg(); expandPostRAPseudo() local
1313 Register Src2Reg = MI.getOperand(2).getReg(); expandPostRAPseudo() local
3427 Register DstReg, SrcReg, Src1Reg, Src2Reg; getCompoundCandidateGroup() local
3925 Register DstReg, SrcReg, Src1Reg, Src2Reg; getDuplexCandidateGroup() local
[all...] |
| /llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1892 Register Src2Reg = I.getOperand(2).getReg(); selectVectorSHL() local
1938 Register Src2Reg = I.getOperand(2).getReg(); selectVectorAshrLshr() local
3739 Register Src2Reg = I.getOperand(2).getReg(); selectMergeValues() local
5004 Register Src2Reg = I.getOperand(2).getReg(); selectShuffleVector() local
[all...] |
| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1039 Register Src2Reg = getRegForValue(SI->getFalseValue()); selectSelect() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 2656 Register Src2Reg = getRegForValue(Src2Val); optimizeSelect() local
2776 Register Src2Reg = getRegForValue(SI->getFalseValue()); selectSelect() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 4679 Register Src2Reg = PtrAdd.getOffsetReg(); reassociationCanBreakAddressingModePattern() local
4799 Register Src2Reg = MI.getOperand(2).getReg(); matchReassocFoldConstantsInSubTree() local
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| /llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 4139 MCRegister Src2Reg = Src2.getReg(); validateMFMA() local
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| /llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 18198 Register Src2Reg = MI.getOperand(2).getReg(); emitQuietFCMP() local
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