/freebsd-src/contrib/llvm-project/llvm/lib/ExecutionEngine/Interpreter/ |
H A D | Execution.cpp | 108 static void executeFAddInst(GenericValue &Dest, GenericValue Src1, in executeFAddInst() argument 119 static void executeFSubInst(GenericValue &Dest, GenericValue Src1, in executeFSubInst() argument 130 static void executeFMulInst(GenericValue &Dest, GenericValue Src1, in executeFMulInst() argument 141 static void executeFDivInst(GenericValue &Dest, GenericValue Src1, in executeFDivInst() argument 152 static void executeFRemInst(GenericValue &Dest, GenericValue Src1, in executeFRemInst() argument 192 executeICMP_EQ(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_EQ() argument 206 executeICMP_NE(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_NE() argument 220 executeICMP_ULT(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_ULT() argument 234 executeICMP_SLT(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_SLT() argument 248 executeICMP_UGT(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_UGT() argument 262 executeICMP_SGT(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_SGT() argument 276 executeICMP_ULE(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_ULE() argument 290 executeICMP_SLE(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_SLE() argument 304 executeICMP_UGE(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_UGE() argument 318 executeICMP_SGE(GenericValue Src1,GenericValue Src2,Type * Ty) executeICMP_SGE() argument 335 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitICmpInst() local 380 executeFCMP_OEQ(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_OEQ() argument 430 executeFCMP_ONE(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_ONE() argument 456 executeFCMP_OLE(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_OLE() argument 470 executeFCMP_OGE(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_OGE() argument 484 executeFCMP_OLT(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_OLT() argument 498 executeFCMP_OGT(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_OGT() argument 533 executeFCMP_UEQ(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_UEQ() argument 543 executeFCMP_UNE(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_UNE() argument 552 executeFCMP_ULE(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_ULE() argument 561 executeFCMP_UGE(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_UGE() argument 570 executeFCMP_ULT(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_ULT() argument 579 executeFCMP_UGT(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_UGT() argument 588 executeFCMP_ORD(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_ORD() argument 619 executeFCMP_UNO(GenericValue Src1,GenericValue Src2,Type * Ty) executeFCMP_UNO() argument 650 executeFCMP_BOOL(GenericValue Src1,GenericValue Src2,Type * Ty,const bool val) executeFCMP_BOOL() argument 668 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitFCmpInst() local 700 executeCmpInst(unsigned predicate,GenericValue Src1,GenericValue Src2,Type * Ty) executeCmpInst() argument 739 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitBinaryOperator() local 845 executeSelectInst(GenericValue Src1,GenericValue Src2,GenericValue Src3,Type * Ty) executeSelectInst() argument 864 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitSelectInst() local 1188 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitShl() local 1215 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitLShr() local 1242 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitAShr() local 1796 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitExtractElementInst() local 1831 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitInsertElementInst() local 1864 GenericValue Src1 = getOperandValue(I.getOperand(0), SF); visitShuffleVectorInst() local 1974 GenericValue Src1 = getOperandValue(Agg, SF); visitInsertValueInst() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIOptimizeExecMasking.cpp | 143 const MachineOperand &Src1 = MI.getOperand(1); in isLogicalOpOnExec() local 159 const MachineOperand &Src1 = MI.getOperand(1); in isLogicalOpOnExec() local 537 MachineOperand &Src1 = SaveExecInst->getOperand(2); in optimizeExecSequence() local 584 MachineOperand *Src1 = TII->getNamedOperand(VCmp, AMDGPU::OpName::src1); optimizeVCMPSaveExecSequence() local 686 MachineOperand *Src1 = TII->getNamedOperand(*VCmp, AMDGPU::OpName::src1); tryRecordVCmpxAndSaveexecSequence() local [all...] |
H A D | R600ExpandSpecialInstrs.cpp | 149 Register Src1 = in runOnMachineFunction() local 200 unsigned Src1 = 0; in runOnMachineFunction() local
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H A D | SIPeepholeSDWA.cpp | 547 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); matchSDWAOperand() local 585 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); matchSDWAOperand() local 620 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); matchSDWAOperand() local 667 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); matchSDWAOperand() local 968 if (MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1)) { isConvertibleToSDWA() local 1025 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); convertToSDWA() local [all...] |
H A D | AMDGPUInstCombineIntrinsic.cpp | 45 static APFloat fmed3AMDGCN(const APFloat &Src0, const APFloat &Src1, in fmed3AMDGCN() argument 606 Value *Src1 = II.getArgOperand(1); instCombineIntrinsic() local 636 Value *Src1 = II.getArgOperand(1); instCombineIntrinsic() local 665 Value *Src1 = II.getArgOperand(1); instCombineIntrinsic() local 768 Value *Src1 = II.getArgOperand(1); instCombineIntrinsic() local 855 Value *Src1 = II.getArgOperand(1); instCombineIntrinsic() local [all...] |
H A D | AMDGPUCombinerHelper.cpp | 420 Register Src1, in matchExpandPromotedF16FMed3() argument 433 Register Src1, in applyExpandPromotedF16FMed3() argument
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H A D | SIShrinkInstructions.cpp | 227 MachineOperand &Src1 = MI.getOperand(1); shrinkScalarCompare() local 399 MachineOperand &Src1 = *TII->getNamedOperand(MI, AMDGPU::OpName::src1); shrinkMadFma() local 493 MachineOperand *Src1 = &MI.getOperand(2); shrinkScalarLogicOp() local 826 MachineOperand *Src1 = &MI.getOperand(2); runOnMachineFunction() local [all...] |
H A D | GCNDPPCombine.cpp | 313 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); createDPPInst() local 486 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); createDPPInst() local 681 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); combineDPPMov() local [all...] |
H A D | SIFoldOperands.cpp | 1213 MachineOperand *Src1 = getImmOrMaterializedImm(MI->getOperand(Src1Idx)); tryConstantFoldOp() local 1299 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); tryFoldCndMask() local 1340 Register Src1 = MI.getOperand(2).getReg(); tryFoldZeroHighBits() local 1509 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); isClamp() local 1641 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); isOMod() local 1678 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); isOMod() local [all...] |
H A D | SIInstrInfo.cpp | 2670 swapSourceModifiers(MachineInstr & MI,MachineOperand & Src0,unsigned Src0OpName,MachineOperand & Src1,unsigned Src1OpName) const swapSourceModifiers() argument 2737 MachineOperand &Src1 = MI.getOperand(Src1Idx); commuteInstructionImpl() local 3472 MachineOperand *Src1 = getNamedOperand(UseMI, AMDGPU::OpName::src1); FoldImmediate() local 3860 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); convertToThreeAddress() local 4313 const MachineOperand *Src1 canShrink() local 4338 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); canShrink() local 4394 const MachineOperand *Src1 = getNamedOperand(MI, AMDGPU::OpName::src1); buildShrunkInst() local 4879 const MachineOperand &Src1 = MI.getOperand(Src1Idx); verifyInstruction() local 4901 const MachineOperand &Src1 = MI.getOperand(Src1Idx); verifyInstruction() local 5741 MachineOperand &Src1 = MI.getOperand(Src1Idx); legalizeOperandsVOP2() local 5863 MachineOperand &Src1 = MI.getOperand(VOP3Idx[1]); legalizeOperandsVOP3() local 7104 MachineOperand &Src1 = Inst.getOperand(3); moveToVALUImpl() local 7429 MachineOperand &Src1 = Inst.getOperand(2); lowerSelect() local 7538 MachineOperand &Src1 = Inst.getOperand(2); lowerScalarXnor() local 7604 MachineOperand &Src1 = Inst.getOperand(2); splitScalarNotBinop() local 7633 MachineOperand &Src1 = Inst.getOperand(2); splitScalarBinOpN2() local 7725 MachineOperand &Src1 = Inst.getOperand(2); splitScalarSMulU64() local 7834 MachineOperand &Src1 = Inst.getOperand(2); splitScalarSMulPseudo() local 7893 MachineOperand &Src1 = Inst.getOperand(2); splitScalar64BitBinaryOp() local 7960 MachineOperand &Src1 = Inst.getOperand(2); splitScalar64BitXnor() local 8190 MachineOperand &Src1 = Inst.getOperand(2); movePackToVALU() local [all...] |
H A D | SILoadStoreOptimizer.cpp | 1581 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); mergeTBufferStorePair() local 1679 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); mergeFlatStorePair() local 1910 const auto *Src1 = TII->getNamedOperand(*Paired.I, AMDGPU::OpName::vdata); mergeBufferStorePair() local 2078 const auto *Src1 = TII->getNamedOperand(*BaseLoDef, AMDGPU::OpName::src1); processBaseWithConstOffset() local
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H A D | AMDGPURegBankCombiner.cpp | 317 MachineInstr *Src1 = getDefIgnoringCopies(MI.getOperand(2).getReg(), MRI); in matchFPMed3ToClamp() local
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H A D | AMDGPUPostLegalizerCombiner.cpp | 441 Register Src1 = MI.getOperand(2).getReg(); matchCombine_s_mul_u64() local
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H A D | SIISelLowering.cpp | 4732 MachineOperand &Src1 = MI.getOperand(3); EmitInstrWithCustomInserter() local 4755 MachineOperand &Src1 = MI.getOperand(2); EmitInstrWithCustomInserter() local 4807 MachineOperand &Src1 = MI.getOperand(2); EmitInstrWithCustomInserter() local 4889 MachineOperand &Src1 = MI.getOperand(3); EmitInstrWithCustomInserter() local 5048 const MachineOperand &Src1 = MI.getOperand(2); EmitInstrWithCustomInserter() local 5822 SDValue Src1 = N->getOperand(2); lowerFCMPIntrinsic() local 5901 SDValue Src1 = N->getOperand(2); ReplaceNodeResults() local 5913 SDValue Src1 = N->getOperand(2); ReplaceNodeResults() local 9264 SDValue Src1 = Op.getOperand(5); LowerINTRINSIC_VOID() local 10385 SDValue Src1 = Op.getOperand(1); LowerFDIV16() local 12978 SDValue Src1 = N->getOperand(1); performFMed3Combine() local 13015 SDValue Src1 = N->getOperand(1); performCvtPkRTZCombine() local 13513 placeSources(ByteProvider<SDValue> & Src0,ByteProvider<SDValue> & Src1,SmallVectorImpl<std::pair<SDValue,unsigned>> & Src0s,SmallVectorImpl<std::pair<SDValue,unsigned>> & Src1s,int Step) placeSources() argument 13672 checkDot4MulSignedness(const SDValue & N,ByteProvider<SDValue> & Src0,ByteProvider<SDValue> & Src1,const SDValue & S0Op,const SDValue & S1Op,const SelectionDAG & DAG) checkDot4MulSignedness() argument 13769 auto Src1 = handleMulOperand(TempNode->getOperand(MulIdx)->getOperand(1)); performAddCombine() local 13793 auto Src1 = performAddCombine() local 13832 SDValue Src0, Src1; performAddCombine() local 14750 SDValue Src1 = Node->getOperand(3); PostISelFolding() local [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonPeephole.cpp | 151 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local 168 MachineOperand &Src1 = MI.getOperand(1); in runOnMachineFunction() local
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H A D | HexagonGenMux.cpp | 205 unsigned HexagonGenMux::getMuxOpcode(const MachineOperand &Src1, in getMuxOpcode() argument 299 MachineOperand *Src1 = &Def1.getOperand(2), *Src2 = &Def2.getOperand(2); in genMuxInBlock() local
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H A D | HexagonConstPropagation.cpp | 2575 const MachineOperand &Src1 = MI.getOperand(1); in evaluateHexCompare() local 2598 const MachineOperand &Src1, const MachineOperand &Src2, in evaluateHexCompare2() 2632 const MachineOperand &Src1 = MI.getOperand(1); in evaluateHexLogical() local 3025 const MachineOperand &Src1 = MI.getOperand(1); in rewriteHexConstUses() local
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 1681 buildAnd(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildAnd() argument 1703 buildXor(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildXor() argument 1869 buildFCopysign(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildFCopysign() argument 1903 buildSMin(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildSMin() argument 1909 buildSMax(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildSMax() argument 1915 buildUMin(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildUMin() argument 1921 buildUMax(const DstOp & Dst,const SrcOp & Src0,const SrcOp & Src1) buildUMax() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | GISelKnownBits.cpp | 107 computeKnownBitsMin(Register Src0,Register Src1,KnownBits & Known,const APInt & DemandedElts,unsigned Depth) computeKnownBitsMin() argument 601 computeNumSignBitsMin(Register Src0,Register Src1,const APInt & DemandedElts,unsigned Depth) computeNumSignBitsMin() argument
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H A D | CSEMIRBuilder.cpp | 243 const SrcOp &Src1 = SrcOps[1]; buildInstr() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 173 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForMemcmp() 225 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Src1, in EmitTargetCodeForStrcmp()
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64AdvSIMDScalarPass.cpp | 299 unsigned Src1 = 0, SubReg1; in transformInstruction() local
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCExpandAtomicPseudoInsts.cpp | 54 Register Src1) { in PairedCopy() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64PostLegalizerCombiner.cpp | 69 Register Src1 = MI.getOperand(1).getReg(); in matchExtractVecEltPairwiseAdd() local
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/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGBuiltin.cpp | 512 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitBinaryMaybeConstrainedFPBuiltin() local 529 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitBinaryExpMaybeConstrainedFPBuiltin() local 549 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitTernaryMaybeConstrainedFPBuiltin() local 597 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitBinaryBuiltin() local 608 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitTernaryBuiltin() local 620 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitFPIntBuiltin() local 649 llvm::Value *Src1 = CGF.EmitScalarExpr(E->getArg(1)); emitFrexpBuiltin() local 3474 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitBuiltinExpr() local 17898 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local 17970 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local 17979 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local 18023 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local 18034 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local 18073 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local 18534 llvm::Value *Src1 = EmitScalarExpr(E->getArg(1)); EmitAMDGPUBuiltinExpr() local [all...] |