Lines Matching defs:Src1

615   // Special case for s_fmac_f32 if we are trying to fold into Src0 or Src1.
617   // If folding for Src0 happens first and it is identical operand to Src1 we
619   // cause folding into Src1 to fail later on due to wrong OpNo used.
1231   MachineOperand *Src1 = getImmOrMaterializedImm(MI->getOperand(Src1Idx));
1233   if (!Src0->isImm() && !Src1->isImm())
1239   if (Src0->isImm() && Src1->isImm()) {
1241     if (!evalBinaryInstruction(Opc, NewImm, Src0->getImm(), Src1->getImm()))
1257   if (Src0->isImm() && !Src1->isImm()) {
1258     std::swap(Src0, Src1);
1262   int32_t Src1Val = static_cast<int32_t>(Src1->getImm());
1317   MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1318   if (!Src1->isIdenticalTo(*Src0)) {
1320     auto *Src1Imm = getImmOrMaterializedImm(*Src1);
1358   Register Src1 = MI.getOperand(2).getReg();
1359   MachineInstr *SrcDef = MRI->getVRegDef(Src1);
1364   MRI->replaceRegWith(Dst, Src1);
1366     MRI->clearKillFlags(Src1);
1532     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1533     if (!Src0->isReg() || !Src1->isReg() ||
1534         Src0->getReg() != Src1->getReg() ||
1535         Src0->getSubReg() != Src1->getSubReg() ||
1680     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1683       RegOp = Src1;
1684     } else if (Src1->isImm()) {
1685       ImmOp = Src1;
1717     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
1719     if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() &&
1720         Src0->getSubReg() == Src1->getSubReg() &&