Searched defs:ShiftOpc (Results 1 – 10 of 10) sorted by relevance
27 enum ShiftOpc { enum
806 bool ARMInstructionSelector::selectShift(unsigned ShiftOpc, in selectShift() argument
798 unsigned ShiftOpc = Left ? S2_asl_i_r in splitShift() local
1123 auto ShiftOpc = ShrAmtC > ShAmtC ? Shr->getOpcode() : Instruction::Shl; visitShl() local
7549 unsigned ShiftOpc = ShiftI->getOpcode(); visitICmpInst() local
1010 unsigned ShiftOpc = Op.getOpcode(); combineShiftToAVG() local 9242 unsigned ShiftOpc = IsSigned ? ISD::SRA : ISD::SRL; expandAVG() local [all...]
12695 unsigned ShiftOpc = ShiftOrRotate.getOpcode(); visitSETCC() local [all...]
3556 unsigned ShiftOpc = (VT == MVT::i32) ? AArch64::UBFMWri : AArch64::UBFMXri; tryBitfieldInsertOpFromOr() local
893 preferedOpcodeForCmpEqPiecesOfOperand(EVT VT,unsigned ShiftOpc,bool MayTransformRotate,const APInt & ShiftOrRotateAmt,const std::optional<APInt> & AndMask) preferedOpcodeForCmpEqPiecesOfOperand() argument
3370 preferedOpcodeForCmpEqPiecesOfOperand(EVT VT,unsigned ShiftOpc,bool MayTransformRotate,const APInt & ShiftOrRotateAmt,const std::optional<APInt> & AndMask) const preferedOpcodeForCmpEqPiecesOfOperand() argument 25232 unsigned ShiftOpc; getTargetVShiftByConstNode() local 30045 unsigned ShiftOpc = IsFSHR ? ISD::SRL : ISD::SHL; LowerFunnelShift() local 30305 unsigned ShiftOpc = IsROTL ? ISD::SHL : ISD::SRL; LowerRotate() local [all...]