| /llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 2032 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; expandSelectBoolean() local
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| /llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 1067 unsigned ShiftOp; PromoteIntRes_ADDSUBSHLSAT() local
1138 unsigned ShiftOp = Signed ? ISD::SRA : ISD::SRL; PromoteIntRes_MULFIX() local
4714 SDValue ShiftOp = N->getOperand(1); ExpandIntRes_Shift() local
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| H A D | DAGCombiner.cpp | 2602 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); foldAddSubOfSignBit() local
6874 foldLogicOfShifts(SDNode * N,SDValue LogicOp,SDValue ShiftOp,SelectionDAG & DAG) foldLogicOfShifts() argument
8735 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); calculateByteProvider() local
9651 __anon791abb431b02(SDValue V, SDValue &ShiftOp, const APInt *&ShiftAmtVal) combineShiftOfShiftedLogic() argument
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| H A D | SelectionDAGBuilder.cpp | 3267 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT); visitBitTestCase() local
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| /llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 816 unsigned Amt = ShiftOp & 0x1f; in printShiftImmOperand() local
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| /llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 3335 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL; emitINSERT_DF_VIDX() local
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| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 11766 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); calculateSrcByte() local
11860 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(2)); calculateByteProvider() local
11887 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); calculateByteProvider() local
11915 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); calculateByteProvider() local
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| /llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 2144 Instruction::BinaryOps ShiftOp = foldBinOpOfDisplacedShifts() local
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| /llvm-project/llvm/lib/Analysis/ |
| H A D | ValueTracking.cpp | 2619 auto ShiftOp = [&](const APInt &Lhs, const APInt &Rhs) { isNonZeroShift() local
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| /llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 8085 unsigned ShiftOp = IsSigned ? TargetOpcode::G_ASHR : TargetOpcode::G_LSHR; lowerSMULH_UMULH() local
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| /llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 22844 SDValue ShiftOp = Index.getOperand(1); foldIndexIntoBase() local
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| /llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 50743 SDValue ShiftOp = Shift.getOperand(0); foldXorTruncShiftIntoCmp() local
[all...] |