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Searched defs:SUnit (Results 1 – 18 of 18) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleHazardRecognizer.h20 class SUnit; variable
71 virtual void EmitInstruction(SUnit *) {} in EmitInstruction() argument
82 virtual unsigned PreEmitNoops(SUnit *) { in PreEmitNoops() argument
95 virtual bool ShouldPreferAnother(SUnit *) { in ShouldPreferAnother() argument
H A DScheduleDAG.h41 class SUnit; variable
308 SUnit(SDNode *node, unsigned nodenum) SUnit() function
319 SUnit(MachineInstr *instr, unsigned nodenum) SUnit() function
329 SUnit() SUnit() function
520 isReady(SUnit *) isReady() argument
541 scheduledNode(SUnit *) scheduledNode() argument
543 unscheduledNode(SUnit *) unscheduledNode() argument
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H A DMultiHazardRecognizer.h23 class SUnit; variable
H A DMacroFusion.h27 class SUnit; variable
H A DScoreboardHazardRecognizer.h27 class SUnit; variable
H A DDFAPacketizer.h46 class SUnit; variable
H A DTargetSubtargetInfo.h48 class SUnit; variable
H A DVLIWMachineScheduler.h27 class SUnit; variable
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h23 class SUnit; variable
H A DHexagonSubtarget.cpp636 isBestZeroLatency(SUnit * Src,SUnit * Dst,const HexagonInstrInfo * TII,SmallSet<SUnit *,4> & ExclSrc,SmallSet<SUnit *,4> & ExclDst) const isBestZeroLatency() argument
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H A DHexagonSubtarget.h39 class SUnit; variable
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNIterativeScheduler.h26 class SUnit; variable
H A DAMDGPUIGroupLP.cpp99 apply(const SUnit *, const ArrayRef<SUnit *>, in apply() argument
481 linkSUnit(SUnit * SU,int SGID,std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges,T I,T E) linkSUnit() argument
499 addEdges(SmallVectorImpl<SchedGroup> & SyncPipeline,SUnit * SU,int SGID,std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges) addEdges() argument
516 removeEdges(const std::vector<std::pair<SUnit *,SUnit * >> & EdgesToRemove) removeEdges() argument
725 greedyFind(std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges,T I,T E) greedyFind() argument
1493 link(SUnit & SU,bool MakePred,std::vector<std::pair<SUnit *,SUnit * >> & AddedEdges) link() argument
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H A DAMDGPUExportClustering.cpp39 static void sortChain(const SIInstrInfo *TII, SmallVector<SUnit *, 8> &Chain, in sortChain()
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAG.cpp394 for (const SUnit &SUnit : SUnits) { VerifyScheduledDAG() local
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H A DMachinePipeliner.cpp1889 pred_L(SetVector<SUnit * > & NodeOrder,SmallSetVector<SUnit *,8> & Preds,const NodeSet * S=nullptr) pred_L() argument
1918 succ_L(SetVector<SUnit * > & NodeOrder,SmallSetVector<SUnit *,8> & Succs,const NodeSet * S=nullptr) succ_L() argument
1947 computePath(SUnit * Cur,SetVector<SUnit * > & Path,SetVector<SUnit * > & DestNodes,SetVector<SUnit * > & Exclude,SmallPtrSet<SUnit *,8> & Visited) computePath() argument
2183 isIntersect(SmallSetVector<SUnit *,8> & Set1,const NodeSet & Set2,SmallSetVector<SUnit *,8> & Result) isIntersect() argument
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H A DMachineScheduler.cpp4056 releaseTopNode(SUnit *) releaseTopNode() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp810 EmitPhysRegCopy(SUnit * SU,DenseMap<SUnit *,Register> & VRBaseMap,MachineBasicBlock::iterator InsertPos) EmitPhysRegCopy() argument
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