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Searched defs:SRC (Results 1 – 11 of 11) sorted by relevance

/llvm-project/clang-tools-extra/test/clang-tidy/checkers/bugprone/
H A Dnot-null-terminated-result-memcpy-safe-other.c10 #define SRC "foo" macro
/llvm-project/llvm/utils/TableGen/
H A DRegisterInfoEmitter.cpp1514 if (CodeGenRegisterClass *SRC = RC.getSubClassWithSubReg(&Idx)) runTargetDesc() local
1853 for (const CodeGenRegisterClass &SRC : RegBank.getRegClasses()) { debugDump() local
1860 for (const CodeGenRegisterClass *SRC : RC.getSuperClasses()) { debugDump() local
/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp597 const TargetRegisterClass *SRC = EmitSubregNode() local
683 const TargetRegisterClass *SRC = EmitRegSequence() local
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/llvm-project/llvm/lib/ExecutionEngine/Interpreter/
H A DExecution.cpp1059 GenericValue SRC = getOperandValue(I.getPointerOperand(), SF); in visitLoadInst() local
1071 GenericValue SRC = getOperandValue(I.getPointerOperand(), SF); in visitStoreInst() local
1134 GenericValue SRC = getOperandValue(SF.Caller->getCalledOperand(), SF); in visitCallBase() local
/llvm-project/llvm/include/llvm/Support/
H A DAMDHSAKernelDescriptor.h44 #define AMDHSA_BITS_GET(SRC, MSK) ((SRC & MSK) >> MSK ## _SHIFT) argument
/llvm-project/llvm/lib/CodeGen/
H A DMachineSink.cpp333 const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg); PerformTrivialForwardCoalescing() local
H A DMachineVerifier.cpp2548 const TargetRegisterClass *SRC = visitMachineOperand() local
/llvm-project/clang/lib/CodeGen/
H A DCGObjC.cpp3769 UnaryOperator *SRC = UnaryOperator::Create( GenerateObjCAtomicSetterCopyHelperFunction() local
3863 UnaryOperator *SRC = UnaryOperator::Create( GenerateObjCAtomicGetterCopyHelperFunction() local
/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.cpp2901 const TargetRegisterClass *SRC = getSGPRClassForBitWidth(Size); getEquivalentSGPRClass() local
H A DSIInstrInfo.cpp6055 const TargetRegisterClass *SRC = RI.getEquivalentSGPRClass(VRC); readlaneVGPRToSGPR() local
6583 const TargetRegisterClass *RC = nullptr, *SRC = nullptr, *VRC = nullptr; legalizeOperands() local
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/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitSimplify.cpp2263 unsigned SRC = MRI.getRegClass(S)->getID(); in genBitSplit() local