/freebsd-src/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiSelectionDAGInfo.cpp | 21 SDValue LanaiSelectionDAGInfo::EmitTargetCodeForMemcpy( in EmitTargetCodeForMemcpy() argument
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 86 DenseMap<SDValue, Register> &VRBaseMap) { in EmitCopyFromReg() argument 190 DenseMap<SDValue, Register> &VRBaseMap) { in CreateVirtualRegisters() argument 269 DenseMap<SDValue, Register> &VRBaseMap) { in getVR() argument 297 AddRegisterOperand(MachineInstrBuilder & MIB,SDValue Op,unsigned IIOpNum,const MCInstrDesc * II,DenseMap<SDValue,Register> & VRBaseMap,bool IsDebug,bool IsClone,bool IsCloned) AddRegisterOperand() argument 375 AddOperand(MachineInstrBuilder & MIB,SDValue Op,unsigned IIOpNum,const MCInstrDesc * II,DenseMap<SDValue,Register> & VRBaseMap,bool IsDebug,bool IsClone,bool IsCloned) AddOperand() argument 476 EmitSubregNode(SDNode * Node,DenseMap<SDValue,Register> & VRBaseMap,bool IsClone,bool IsCloned) EmitSubregNode() argument 610 EmitCopyToRegClassNode(SDNode * Node,DenseMap<SDValue,Register> & VRBaseMap) EmitCopyToRegClassNode() argument 630 EmitRegSequence(SDNode * Node,DenseMap<SDValue,Register> & VRBaseMap,bool IsClone,bool IsCloned) EmitRegSequence() argument 679 EmitDbgValue(SDDbgValue * SD,DenseMap<SDValue,Register> & VRBaseMap) EmitDbgValue() argument 731 AddDbgValueLocationOps(MachineInstrBuilder & MIB,const MCInstrDesc & DbgValDesc,ArrayRef<SDDbgOperand> LocationOps,DenseMap<SDValue,Register> & VRBaseMap) AddDbgValueLocationOps() argument 762 EmitDbgInstrRef(SDDbgValue * SD,DenseMap<SDValue,Register> & VRBaseMap) EmitDbgInstrRef() argument 904 EmitDbgValueList(SDDbgValue * SD,DenseMap<SDValue,Register> & VRBaseMap) EmitDbgValueList() argument 920 EmitDbgValueFromSingleOp(SDDbgValue * SD,DenseMap<SDValue,Register> & VRBaseMap) EmitDbgValueFromSingleOp() argument 972 EmitMachineNode(SDNode * Node,bool IsClone,bool IsCloned,DenseMap<SDValue,Register> & VRBaseMap) EmitMachineNode() argument 1203 EmitSpecialNode(SDNode * Node,bool IsClone,bool IsCloned,DenseMap<SDValue,Register> & VRBaseMap) EmitSpecialNode() argument [all...] |
H A D | InstrEmitter.h | 143 DenseMap<SDValue, Register> &VRBaseMap) { in EmitNode()
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H A D | ScheduleDAGSDNodes.cpp | 739 ProcessSDDbgValues(SDNode * N,SelectionDAG * DAG,InstrEmitter & Emitter,SmallVectorImpl<std::pair<unsigned,MachineInstr * >> & Orders,DenseMap<SDValue,Register> & VRBaseMap,unsigned Order) ProcessSDDbgValues() argument 784 ProcessSourceNode(SDNode * N,SelectionDAG * DAG,InstrEmitter & Emitter,DenseMap<SDValue,Register> & VRBaseMap,SmallVectorImpl<std::pair<unsigned,MachineInstr * >> & Orders,SmallSet<Register,8> & Seen,MachineInstr * NewInsn) ProcessSourceNode() argument 863 __anon593b9b900302(SDNode *Node, bool IsClone, bool IsCloned, DenseMap<SDValue, Register> &VRBaseMap) EmitSchedule() argument [all...] |
H A D | SelectionDAGISel.cpp | 2680 CheckSame(const unsigned char * MatcherTable,unsigned & MatcherIndex,SDValue N,const SmallVectorImpl<std::pair<SDValue,SDNode * >> & RecordedNodes) CheckSame() argument 2690 CheckChildSame(const unsigned char * MatcherTable,unsigned & MatcherIndex,SDValue N,const SmallVectorImpl<std::pair<SDValue,SDNode * >> & RecordedNodes,unsigned ChildNo) CheckChildSame() argument 2846 IsPredicateKnownToFail(const unsigned char * Table,unsigned Index,SDValue N,bool & Result,const SelectionDAGISel & SDISel,SmallVectorImpl<std::pair<SDValue,SDNode * >> & RecordedNodes) IsPredicateKnownToFail() argument 3019 MatchStateUpdater(SelectionDAG & DAG,SDNode ** NodeToMatch,SmallVectorImpl<std::pair<SDValue,SDNode * >> & RN,SmallVectorImpl<MatchScope> & MS) MatchStateUpdater() argument [all...] |
H A D | StatepointLowering.cpp | 521 lowerStatepointMetaArgs(SmallVectorImpl<SDValue> & Ops,SmallVectorImpl<MachineMemOperand * > & MemRefs,SmallVectorImpl<SDValue> & GCPtrs,DenseMap<SDValue,int> & LowerAsVReg,SelectionDAGBuilder::StatepointLoweringInfo & SI,SelectionDAGBuilder & Builder) lowerStatepointMetaArgs() argument [all...] |
H A D | SelectionDAG.cpp | 7413 chainLoadsAndStoresForMemcpy(SelectionDAG & DAG,const SDLoc & dl,SmallVector<SDValue,32> & OutChains,unsigned From,unsigned To,SmallVector<SDValue,16> & OutLoadChains,SmallVector<SDValue,16> & OutStoreChains) chainLoadsAndStoresForMemcpy() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | TargetLowering.h | 3698 getPreIndexedAddressParts(SDNode *,SDValue &,SDValue &,ISD::MemIndexedMode &,SelectionDAG &) getPreIndexedAddressParts() argument 3709 getPostIndexedAddressParts(SDNode *,SDNode *,SDValue &,SDValue &,ISD::MemIndexedMode &,SelectionDAG &) getPostIndexedAddressParts() argument 4231 IsDesirableToPromoteOp(SDValue,EVT &) IsDesirableToPromoteOp() argument 4354 LowerFormalArguments(SDValue,CallingConv::ID,bool,const SmallVectorImpl<ISD::InputArg> &,const SDLoc &,SelectionDAG &,SmallVectorImpl<SDValue> &) LowerFormalArguments() argument 4357 LowerFormalArguments(SDValue,CallingConv::ID,bool,const SmallVectorImpl<ISD::InputArg> &,const SDLoc &,SelectionDAG &,SmallVectorImpl<SDValue> &) LowerFormalArguments() argument 4594 LowerCall(CallLoweringInfo &,SmallVectorImpl<SDValue> &) LowerCall() argument 4616 LowerReturn(SDValue,CallingConv::ID,bool,const SmallVectorImpl<ISD::OutputArg> &,const SmallVectorImpl<SDValue> &,const SDLoc &,SelectionDAG &) LowerReturn() argument 4619 LowerReturn(SDValue,CallingConv::ID,bool,const SmallVectorImpl<ISD::OutputArg> &,const SmallVectorImpl<SDValue> &,const SDLoc &,SelectionDAG &) LowerReturn() argument 4630 isUsedByReturnOnly(SDNode *,SDValue &) isUsedByReturnOnly() argument 4744 ReplaceNodeResults(SDNode *,SmallVectorImpl<SDValue> &,SelectionDAG &) ReplaceNodeResults() argument [all...] |
H A D | SelectionDAGISel.h | 28 class SDValue; global() variable 427 CheckComplexPattern(SDNode * Root,SDNode * Parent,SDValue N,unsigned PatternNo,SmallVectorImpl<std::pair<SDValue,SDNode * >> & Result) CheckComplexPattern() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 807 hasAndNotCompare(SDValue) hasAndNotCompare() argument [all...] |
H A D | PPCISelLowering.cpp | 5588 buildCallOperands(SmallVectorImpl<SDValue> & Ops,PPCTargetLowering::CallFlags CFlags,const SDLoc & dl,SelectionDAG & DAG,SmallVector<std::pair<unsigned,SDValue>,8> & RegsToPass,SDValue Glue,SDValue Chain,SDValue & Callee,int SPDiff,const PPCSubtarget & Subtarget) buildCallOperands() argument 5672 FinishCall(CallFlags CFlags,const SDLoc & dl,SelectionDAG & DAG,SmallVector<std::pair<unsigned,SDValue>,8> & RegsToPass,SDValue Glue,SDValue Chain,SDValue CallSeqStart,SDValue & Callee,int SPDiff,unsigned NumBytes,const SmallVectorImpl<ISD::InputArg> & Ins,SmallVectorImpl<SDValue> & InVals,const CallBase * CB) const FinishCall() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 1444 shouldScalarizeBinop(SDValue) shouldScalarizeBinop() argument [all...] |
H A D | X86ISelLowering.cpp | 22609 optimizeFMulOrFDivAsShiftAddBitcast(SDNode * N,SDValue,SDValue IntPow2) const optimizeFMulOrFDivAsShiftAddBitcast() argument 49869 __anon97398207ba02(std::array<SDValue, 2> Ops) detectAVGPattern() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 13514 placeSources(ByteProvider<SDValue> & Src0,ByteProvider<SDValue> & Src1,SmallVectorImpl<std::pair<SDValue,unsigned>> & Src0s,SmallVectorImpl<std::pair<SDValue,unsigned>> & Src1s,int Step) placeSources() argument 13545 __anon86e357b50302(std::pair<SDValue, unsigned> IterElt) placeSources() argument 13559 __anon86e357b50402(std::pair<SDValue, unsigned> IterElt) placeSources() argument 13587 resolveSources(SelectionDAG & DAG,SDLoc SL,SmallVectorImpl<std::pair<SDValue,unsigned>> & Srcs,bool IsSigned,bool IsAny) resolveSources() argument 13654 fixMasks(SmallVectorImpl<std::pair<SDValue,unsigned>> & Srcs,unsigned ChainLength) fixMasks() argument [all...] |
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 9308 isOrXorChain(SDValue N,unsigned & Num,SmallVector<std::pair<SDValue,SDValue>,16> & WorkList) isOrXorChain() argument [all...] |