Lines Matching defs:SDValue
157 static SDValue widenVec(SelectionDAG &DAG, SDValue Vec, const SDLoc &dl);
1862 static bool isFloatingPointZero(SDValue Op) {
2531 SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
2532 SDValue OpVal;
2541 SDValue UniquedVals[4];
2548 if (!isa<ConstantSDNode>(N->getOperand(i))) return SDValue();
2553 return SDValue(); // no match.
2586 return SDValue();
2595 return SDValue();
2598 if (!OpVal.getNode()) return SDValue(); // All UNDEF: use implicit def.
2612 if (ValSizeInBytes < ByteSize) return SDValue();
2617 return SDValue();
2623 if (MaskVal == 0) return SDValue();
2628 return SDValue();
2649 bool llvm::isIntS16Immediate(SDValue Op, int16_t &Imm) {
2658 static bool provablyDisjointOr(SelectionDAG &DAG, const SDValue &N) {
2670 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
2671 SDValue &Index,
2695 bool llvm::isIntS34Immediate(SDValue Op, int64_t &Imm) {
2706 SDValue N, SDValue &Base, SDValue &Index, SelectionDAG &DAG,
2797 SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG,
2885 Base = SDValue(DAG.getMachineNode(Opc, dl, CN->getValueType(0), Base), 0);
2901 bool PPCTargetLowering::SelectAddressRegImm34(SDValue N, SDValue &Disp,
2902 SDValue &Base,
2950 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
2951 SDValue &Index,
2980 template <typename Ty> static bool isValidPCRelNode(SDValue N) {
2988 bool PPCTargetLowering::SelectAddressPCRel(SDValue N, SDValue &Base) const {
3031 SDValue LoadedVal(N, 0);
3048 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
3049 SDValue &Offset,
3055 SDValue Ptr;
3091 SDValue Val = cast<StoreSDNode>(N)->getValue();
3148 static SDValue LowerLabelRef(SDValue HiPart, SDValue LoPart, bool isPIC,
3152 SDValue Zero = DAG.getConstant(0, DL, PtrVT);
3154 SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, HiPart, Zero);
3155 SDValue Lo = DAG.getNode(PPCISD::Lo, DL, PtrVT, LoPart, Zero);
3176 SDValue PPCTargetLowering::getTOCEntry(SelectionDAG &DAG, const SDLoc &dl,
3177 SDValue GA) const {
3180 SDValue Reg = Is64Bit ? DAG.getRegister(PPC::X2, VT)
3184 SDValue Ops[] = { GA, Reg };
3191 SDValue PPCTargetLowering::LowerConstantPool(SDValue Op,
3203 SDValue ConstPool = DAG.getTargetConstantPool(
3208 SDValue GA = DAG.getTargetConstantPool(C, PtrVT, CP->getAlign(), 0);
3217 SDValue GA =
3222 SDValue CPIHi =
3224 SDValue CPILo =
3247 SDValue PPCTargetLowering::getPICJumpTableRelocBase(SDValue Table,
3278 SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
3286 SDValue GA =
3288 SDValue MatAddr = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
3296 SDValue GA = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
3305 SDValue GA = DAG.getTargetJumpTable(JT->getIndex(), PtrVT,
3310 SDValue JTIHi = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOHiFlag);
3311 SDValue JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOLoFlag);
3315 SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
3325 SDValue GA = DAG.getTargetBlockAddress(BA, Ty, BASDN->getOffset(),
3327 SDValue MatAddr = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
3335 SDValue GA = DAG.getTargetBlockAddress(BA, PtrVT, BASDN->getOffset());
3348 SDValue TgtBAHi = DAG.getTargetBlockAddress(BA, PtrVT, 0, MOHiFlag);
3349 SDValue TgtBALo = DAG.getTargetBlockAddress(BA, PtrVT, 0, MOLoFlag);
3353 SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
3409 SDValue PPCTargetLowering::LowerGlobalTLSAddressAIX(SDValue Op,
3431 SDValue VariableOffsetTGA =
3433 SDValue VariableOffset = getTOCEntry(DAG, dl, VariableOffsetTGA);
3434 SDValue TLSReg;
3498 SDValue VariableOffsetTGA =
3500 SDValue VariableOffset = getTOCEntry(DAG, dl, VariableOffsetTGA);
3508 SDValue ModuleHandleTGA =
3510 SDValue ModuleHandleTOC = getTOCEntry(DAG, dl, ModuleHandleTGA);
3511 SDValue ModuleHandle =
3539 SDValue VariableOffsetTGA =
3541 SDValue RegionHandleTGA =
3543 SDValue VariableOffset = getTOCEntry(DAG, dl, VariableOffsetTGA);
3544 SDValue RegionHandle = getTOCEntry(DAG, dl, RegionHandleTGA);
3549 SDValue PPCTargetLowering::LowerGlobalTLSAddressLinux(SDValue Op,
3571 SDValue TLSReg = DAG.getRegister(PPC::X13, MVT::i64);
3572 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3574 SDValue MatAddr =
3579 SDValue TGAHi = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3581 SDValue TGALo = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3583 SDValue TLSReg = is64bit ? DAG.getRegister(PPC::X13, MVT::i64)
3586 SDValue Hi = DAG.getNode(PPCISD::Hi, dl, PtrVT, TGAHi, TLSReg);
3592 SDValue TGA = DAG.getTargetGlobalAddress(
3594 SDValue TGATLS = DAG.getTargetGlobalAddress(
3596 SDValue TPOffset;
3598 SDValue MatPCRel = DAG.getNode(PPCISD::MAT_PCREL_ADDR, dl, PtrVT, TGA);
3602 SDValue GOTPtr;
3605 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
3623 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3628 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
3629 SDValue GOTPtr;
3632 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
3647 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3649 SDValue MatPCRel =
3654 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
3655 SDValue GOTPtr;
3658 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
3667 SDValue TLSAddr = DAG.getNode(PPCISD::ADDI_TLSLD_L_ADDR, dl,
3669 SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl,
3677 SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
3690 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, Ty, GSDN->getOffset(),
3692 SDValue MatPCRel = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
3693 SDValue Load = DAG.getLoad(MVT::i64, DL, DAG.getEntryNode(), MatPCRel,
3697 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, Ty, GSDN->getOffset(),
3703 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset());
3712 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, PtrVT,
3718 SDValue GAHi =
3720 SDValue GALo =
3726 SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
3730 SDValue LHS = Op.getOperand(IsStrict ? 1 : 0);
3731 SDValue RHS = Op.getOperand(IsStrict ? 2 : 1);
3732 SDValue Chain = IsStrict ? Op.getOperand(0) : SDValue();
3759 return SDValue();
3760 SDValue SetCC32 = DAG.getSetCC(
3764 SDValue Shuff =
3778 if (SDValue V = lowerCmpEqZeroToCtlzSrl(Op, DAG))
3786 return SDValue();
3796 SDValue Sub = DAG.getNode(ISD::XOR, dl, LHSVT, LHS, RHS);
3799 return SDValue();
3802 SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
3806 SDValue InChain = Node->getOperand(0);
3807 SDValue VAListPtr = Node->getOperand(1);
3814 SDValue GprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain,
3820 SDValue GprAnd = DAG.getNode(ISD::AND, dl, MVT::i32, GprIndex,
3822 SDValue CC64 = DAG.getSetCC(dl, MVT::i32, GprAnd,
3824 SDValue GprIndexPlusOne = DAG.getNode(ISD::ADD, dl, MVT::i32, GprIndex,
3832 SDValue FprPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr,
3836 SDValue FprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain,
3840 SDValue RegSaveAreaPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr,
3843 SDValue OverflowAreaPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr,
3847 SDValue OverflowArea =
3851 SDValue RegSaveArea =
3856 SDValue CC = DAG.getSetCC(dl, MVT::i32, VT.isInteger() ? GprIndex : FprIndex,
3860 SDValue RegConstant = DAG.getNode(ISD::MUL, dl, MVT::i32,
3866 SDValue OurReg = DAG.getNode(ISD::ADD, dl, PtrVT, RegSaveArea,
3875 SDValue IndexPlus1 = DAG.getNode(ISD::ADD, dl, MVT::i32,
3885 SDValue Result = DAG.getNode(ISD::SELECT, dl, PtrVT, CC, OurReg, OverflowArea);
3888 SDValue OverflowAreaPlusN = DAG.getNode(ISD::ADD, dl, PtrVT, OverflowArea,
3901 SDValue PPCTargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
3912 SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op,
3920 SDValue PPCTargetLowering::LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const {
3971 SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
3976 SDValue Chain = Op.getOperand(0);
3977 SDValue Trmp = Op.getOperand(1); // trampoline
3978 SDValue FPtr = Op.getOperand(2); // nested function
3979 SDValue Nest = Op.getOperand(3); // 'nest' parameter value
4006 std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
4010 SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
4020 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
4050 SDValue ArgGPR = DAG.getConstant(FuncInfo->getVarArgsNumGPR(), dl, MVT::i32);
4051 SDValue ArgFPR = DAG.getConstant(FuncInfo->getVarArgsNumFPR(), dl, MVT::i32);
4052 SDValue StackOffsetFI = DAG.getFrameIndex(FuncInfo->getVarArgsStackOffset(),
4054 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
4058 SDValue ConstFrameOffset = DAG.getConstant(FrameOffset, dl, PtrVT);
4061 SDValue ConstStackOffset = DAG.getConstant(StackOffset, dl, PtrVT);
4064 SDValue ConstFPROffset = DAG.getConstant(FPROffset, dl, PtrVT);
4069 SDValue firstStore =
4073 SDValue nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, Op.getOperand(1),
4077 SDValue secondStore =
4084 SDValue thirdStore = DAG.getStore(secondStore, dl, StackOffsetFI, nextPtr,
4213 SDValue PPCTargetLowering::LowerFormalArguments(
4214 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
4216 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
4228 SDValue PPCTargetLowering::LowerFormalArguments_32SVR4(
4229 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
4231 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
4332 SDValue ArgValue;
4339 SDValue ArgValueLo = DAG.getCopyFromReg(Chain, dl, RegLo, MVT::i32);
4340 SDValue ArgValueHi = DAG.getCopyFromReg(Chain, dl, RegHi, MVT::i32);
4368 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4398 SmallVector<SDValue, 8> MemOps;
4430 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
4441 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4442 SDValue Store =
4446 SDValue PtrOff = DAG.getConstant(PtrVT.getSizeInBits()/8, dl, PtrVT);
4460 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::f64);
4461 SDValue Store =
4465 SDValue PtrOff = DAG.getConstant(MVT(MVT::f64).getSizeInBits()/8, dl,
4479 SDValue PPCTargetLowering::extendArgForPPC64(ISD::ArgFlagsTy Flags,
4481 SDValue ArgVal,
4493 SDValue PPCTargetLowering::LowerFormalArguments_64SVR4(
4494 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
4496 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
4555 SmallVector<SDValue, 8> MemOps;
4559 SDValue ArgVal;
4611 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4628 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4634 SDValue Arg = FIN;
4636 SDValue ArgOff = DAG.getConstant(PtrByteSize - ObjSize, dl, PtrVT);
4644 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4646 SDValue Store =
4668 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4669 SDValue Addr = FIN;
4671 SDValue Off = DAG.getConstant(j, dl, PtrVT);
4676 SDValue Store =
4812 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4845 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
4853 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4854 SDValue Store =
4858 SDValue PtrOff = DAG.getConstant(PtrByteSize, dl, PtrVT);
5168 static SDNode *isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) {
5187 SDValue Arg;
5188 SDValue FrameIdxOp;
5198 SelectionDAG &DAG, SDValue Chain,
5200 SmallVectorImpl<SDValue> &MemOpChains, const SDLoc &dl) {
5202 SDValue Arg = TailCallArgs[i].Arg;
5203 SDValue FIN = TailCallArgs[i].FrameIdxOp;
5214 static SDValue EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG, SDValue Chain,
5215 SDValue OldRetAddr, SDValue OldFP,
5228 SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT);
5239 SDValue Arg, int SPDiff, unsigned ArgOffset,
5245 SDValue FIN = DAG.getFrameIndex(FI, VT);
5256 SDValue PPCTargetLowering::EmitTailCallLoadFPAndRetAddr(
5257 SelectionDAG &DAG, int SPDiff, SDValue Chain, SDValue &LROpOut,
5258 SDValue &FPOpOut, const SDLoc &dl) const {
5264 Chain = SDValue(LROpOut.getNode(), 1);
5275 static SDValue CreateCopyOfByValArgument(SDValue Src, SDValue Dst,
5276 SDValue Chain, ISD::ArgFlagsTy Flags,
5278 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), dl, MVT::i32);
5287 SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg,
5288 SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64,
5289 bool isTailCall, bool isVector, SmallVectorImpl<SDValue> &MemOpChains,
5294 SDValue StackPtr;
5310 PrepareTailCall(SelectionDAG &DAG, SDValue &InGlue, SDValue &Chain,
5311 const SDLoc &dl, int SPDiff, unsigned NumBytes, SDValue LROp,
5312 SDValue FPOp,
5316 SmallVector<SDValue, 8> MemOpChains2;
5318 InGlue = SDValue();
5345 SDValue PPCTargetLowering::LowerCallResult(
5346 SDValue Chain, SDValue InGlue, CallingConv::ID CallConv, bool isVarArg,
5348 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
5363 SDValue Val;
5366 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5371 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5409 static bool isIndirectCall(const SDValue &Callee, SelectionDAG &DAG,
5440 const Function &Caller, const SDValue &Callee,
5502 static SDValue transformCallee(const SDValue &Callee, SelectionDAG &DAG,
5506 return SDValue(Dest, 0);
5581 static SDValue getOutputChainFromCallSeq(SDValue CallSeqStart) {
5588 SDValue LastValue = CallSeqStart.getValue(CallSeqStart->getNumValues() - 1);
5597 static void prepareIndirectCall(SelectionDAG &DAG, SDValue &Callee,
5598 SDValue &Glue, SDValue &Chain,
5600 SDValue MTCTROps[] = {Chain, Callee, Glue};
5608 static void prepareDescriptorIndirectCall(SelectionDAG &DAG, SDValue &Callee,
5609 SDValue &Glue, SDValue &Chain,
5610 SDValue CallSeqStart,
5641 SDValue LDChain = getOutputChainFromCallSeq(CallSeqStart);
5661 SDValue LoadFuncPtr = DAG.getLoad(RegVT, dl, LDChain, Callee, MPI,
5666 SDValue TOCOff = DAG.getIntPtrConstant(TOCAnchorOffset, dl);
5667 SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, Callee, TOCOff);
5668 SDValue TOCPtr =
5673 SDValue PtrOff = DAG.getIntPtrConstant(EnvPtrOffset, dl);
5674 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, RegVT, Callee, PtrOff);
5675 SDValue LoadEnvPtr =
5681 SDValue TOCVal = DAG.getCopyToReg(Chain, dl, TOCReg, TOCPtr, Glue);
5690 SDValue EnvVal = DAG.getCopyToReg(Chain, dl, EnvPtrReg, LoadEnvPtr, Glue);
5701 buildCallOperands(SmallVectorImpl<SDValue> &Ops,
5704 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
5705 SDValue Glue, SDValue Chain, SDValue &Callee, int SPDiff,
5732 SDValue StackPtr = DAG.getRegister(StackPtrReg, RegVT);
5734 SDValue TOCOff = DAG.getIntPtrConstant(TOCSaveOffset, dl);
5735 SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, StackPtr, TOCOff);
5783 SDValue PPCTargetLowering::FinishCall(
5785 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue,
5786 SDValue Chain, SDValue CallSeqStart, SDValue &Callee, int SPDiff,
5788 SmallVectorImpl<SDValue> &InVals, const CallBase *CB) const {
5807 SmallVector<SDValue, 8> Ops;
5828 SDValue Ret = DAG.getNode(CallOpc, dl, MVT::Other, Ops);
5892 SDValue
5894 SmallVectorImpl<SDValue> &InVals) const {
5898 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
5900 SDValue Chain = CLI.Chain;
5901 SDValue Callee = CLI.Callee;
5925 // case the SDValue for the callee could be a load (to load the address
5970 SDValue PPCTargetLowering::LowerCall_32SVR4(
5971 SDValue Chain, SDValue Callee, CallFlags CFlags,
5973 const SmallVectorImpl<SDValue> &OutVals,
5975 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
6069 SDValue CallSeqStart = Chain;
6073 SDValue LROp, FPOp;
6079 SDValue StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
6081 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
6083 SmallVector<SDValue, 8> MemOpChains;
6094 SDValue Arg = OutVals[RealArgIdx];
6109 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, dl);
6115 SDValue MemcpyCall =
6121 SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, NumBytes, 0,
6146 SDValue SVal = DAG.getNode(PPCISD::EXTRACT_SPE, dl, MVT::i32, Arg,
6161 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, dl);
6180 SDValue InGlue;
6191 SDValue Ops[] = { Chain, InGlue };
6209 SDValue PPCTargetLowering::createMemcpyOutsideCallSeq(
6210 SDValue Arg, SDValue PtrOff, SDValue CallSeqStart, ISD::ArgFlagsTy Flags,
6212 SDValue MemcpyCall = CreateCopyOfByValArgument(Arg, PtrOff,
6217 SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, FrameSize, 0,
6224 SDValue PPCTargetLowering::LowerCall_64SVR4(
6225 SDValue Chain, SDValue Callee, CallFlags CFlags,
6227 const SmallVectorImpl<SDValue> &OutVals,
6229 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
6397 SDValue CallSeqStart = Chain;
6401 SDValue LROp, FPOp;
6407 SDValue StackPtr = DAG.getRegister(PPC::X1, MVT::i64);
6415 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
6418 SmallVector<SDValue, 8> MemOpChains;
6420 SDValue Arg = OutVals[i];
6427 SDValue PtrOff;
6481 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg,
6492 SDValue AddPtr = PtrOff;
6494 SDValue Const = DAG.getConstant(PtrByteSize - Size, dl,
6525 SDValue AddPtr = PtrOff;
6527 SDValue Const = DAG.getConstant(8 - Size, dl, PtrOff.getValueType());
6535 SDValue Load =
6548 SDValue Const = DAG.getConstant(j, dl, PtrOff.getValueType());
6549 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const);
6553 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, AddArg,
6626 SDValue ArgVal;
6640 SDValue Lo, Hi;
6658 ArgVal = SDValue();
6670 SDValue ConstFour = DAG.getConstant(4, dl, PtrOff.getValueType());
6714 SDValue Store =
6718 SDValue Load =
6727 SDValue Ix = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff,
6729 SDValue Load =
6776 SDValue Val = DAG.getCopyFromReg(Chain, dl, PPC::X2, MVT::i64);
6779 SDValue PtrOff = DAG.getIntPtrConstant(TOCSaveOffset, dl);
6780 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
6794 SDValue InGlue;
7113 static SDValue truncateScalarIntegerArg(ISD::ArgFlagsTy Flags, EVT ValVT,
7114 SelectionDAG &DAG, SDValue ArgValue,
7187 SDValue PPCTargetLowering::LowerFormalArguments_AIX(
7188 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
7190 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
7220 SmallVector<SDValue, 8> MemOps;
7250 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
7251 SDValue ArgValue =
7344 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
7360 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
7373 SDValue CopyFrom = DAG.getCopyFromReg(Chain, dl, VReg, LocVT);
7379 SDValue Store = DAG.getStore(
7418 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, LocVT);
7450 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
7470 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
7471 SDValue Store =
7475 SDValue PtrOff = DAG.getConstant(PtrByteSize, dl, PtrVT);
7486 SDValue PPCTargetLowering::LowerCall_AIX(
7487 SDValue Chain, SDValue Callee, CallFlags CFlags,
7489 const SmallVectorImpl<SDValue> &OutVals,
7491 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
7535 SDValue CallSeqStart = Chain;
7537 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
7538 SmallVector<SDValue, 8> MemOpChains;
7543 const SDValue StackPtr = IsPPC64 ? DAG.getRegister(PPC::X1, MVT::i64)
7548 SDValue Arg = OutVals[ValNo];
7573 SDValue Load = GetLoad(PtrVT, LoadOffset);
7613 SDValue ResidueVal;
7619 SDValue Load = GetLoad(VT, LoadOffset);
7633 SDValue SHLAmt = DAG.getConstant(NumSHLBits, dl, ShiftAmountTy);
7634 SDValue ShiftedLoad =
7673 SDValue PtrOff =
7676 SDValue Store =
7689 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff,
7691 SDValue Load = DAG.getLoad(PtrVT, dl, Store, Add, MachinePointerInfo());
7715 SDValue PtrOff =
7734 SDValue ArgAsInt =
7752 SDValue MSWAsI64 = DAG.getNode(ISD::SRL, dl, MVT::i64, ArgAsInt,
7785 SDValue Val = DAG.getCopyFromReg(Chain, dl, TOCBaseReg, PtrVT);
7786 SDValue PtrOff = DAG.getIntPtrConstant(TOCSaveOffset, dl);
7787 SDValue StackPtr = DAG.getRegister(StackPtrReg, PtrVT);
7788 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
7796 SDValue InGlue;
7820 SDValue
7821 PPCTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
7824 const SmallVectorImpl<SDValue> &OutVals,
7834 SDValue Glue;
7835 SmallVector<SDValue, 4> RetOps(1, Chain);
7842 SDValue Arg = OutVals[RealResIdx];
7860 SDValue SVal =
7885 SDValue
7886 PPCTargetLowering::LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op,
7894 SDValue Chain = Op.getOperand(0);
7895 SDValue FPSIdx = getFramePointerFrameIndex(DAG);
7897 SDValue Ops[2] = {Chain, FPSIdx};
7902 SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op,
7913 SDValue StackPtr = DAG.getRegister(SP, PtrVT);
7916 SDValue Chain = Op.getOperand(0);
7917 SDValue SaveSP = Op.getOperand(1);
7920 SDValue LoadLinkSP =
7930 SDValue PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG &DAG) const {
7952 SDValue
7975 SDValue PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
7979 SDValue Chain = Op.getOperand(0);
7980 SDValue Size = Op.getOperand(1);
7986 SDValue NegSize = DAG.getNode(ISD::SUB, dl, PtrVT,
7989 SDValue FPSIdx = getFramePointerFrameIndex(DAG);
7990 SDValue Ops[3] = { Chain, NegSize, FPSIdx };
7997 SDValue PPCTargetLowering::LowerEH_DWARF_CFA(SDValue Op,
8008 SDValue PPCTargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
8016 SDValue PPCTargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
8023 SDValue PPCTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
8035 SDValue Chain = LD->getChain();
8036 SDValue BasePtr = LD->getBasePtr();
8039 SDValue NewLD =
8042 SDValue Result = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, NewLD);
8044 SDValue Ops[] = { Result, SDValue(NewLD.getNode(), 1) };
8048 SDValue PPCTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
8060 SDValue Chain = ST->getChain();
8061 SDValue BasePtr = ST->getBasePtr();
8062 SDValue Value = ST->getValue();
8071 SDValue PPCTargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
8079 SDValue PPCTargetLowering::LowerTRUNCATEVector(SDValue Op,
8108 return SDValue();
8110 SDValue N1 = Op.getOperand(0);
8116 return SDValue();
8118 return SDValue();
8124 SDValue Op1, Op2;
8162 SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
8166 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
8167 SDValue TV = Op.getOperand(2), FV = Op.getOperand(3);
8174 SDValue Z = DAG.getSetCC(
8177 SDValue Zero = DAG.getConstant(0, dl, Z.getValueType());
8214 SDValue Sel1;
8250 SDValue Cmp;
8316 static SDValue convertFPToInt(SDValue Op, SelectionDAG &DAG,
8328 SDValue Src = Op.getOperand(IsStrict ? 1 : 0);
8329 SDValue Chain = IsStrict ? Op.getOperand(0) : SDValue();
8359 SDValue Conv;
8370 void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
8373 SDValue Tmp = convertFPToInt(Op, DAG, Subtarget);
8381 SDValue FIPtr = DAG.CreateStackTemporary(i32Stack ? MVT::i32 : MVT::f64);
8387 SDValue Chain = IsStrict ? Tmp.getValue(1) : DAG.getEntryNode();
8394 SDValue Ops[] = { Chain, Tmp, FIPtr };
8417 SDValue PPCTargetLowering::LowerFP_TO_INTDirectMove(SDValue Op,
8420 SDValue Conv = convertFPToInt(Op, DAG, Subtarget);
8421 SDValue Mov = DAG.getNode(PPCISD::MFVSR, dl, Op.getValueType(), Conv);
8428 SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
8433 SDValue Src = Op.getOperand(IsStrict ? 1 : 0);
8439 return Subtarget.hasP9Vector() ? Op : SDValue();
8452 SDValue Lo, Hi;
8458 SDValue Res = DAG.getNode(PPCISD::STRICT_FADDRTZ, dl,
8465 SDValue Res = DAG.getNode(PPCISD::FADDRTZ, dl, MVT::f64, Lo, Hi);
8471 SDValue Cst = DAG.getConstantFP(APF, dl, SrcVT);
8472 SDValue SignMask = DAG.getConstant(0x80000000, dl, DstVT);
8478 SDValue Chain = Op.getOperand(0);
8483 SDValue Sel = DAG.getSetCC(dl, SetCCVT, Src, Cst, ISD::SETLT,
8487 SDValue FltOfs = DAG.getSelect(
8491 SDValue Val = DAG.getNode(ISD::STRICT_FSUB, dl,
8495 SDValue SInt = DAG.getNode(ISD::STRICT_FP_TO_SINT, dl,
8499 SDValue IntOfs = DAG.getSelect(
8501 SDValue Result = DAG.getNode(ISD::XOR, dl, DstVT, SInt, IntOfs);
8506 SDValue True = DAG.getNode(ISD::FSUB, dl, MVT::ppcf128, Src, Cst);
8509 SDValue False = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Src);
8515 return SDValue();
8536 bool PPCTargetLowering::canReuseLoadAddress(SDValue Op, EVT MemVT,
8586 RLI.ResChain = SDValue(LD, LD->isIndexed() ? 2 : 1);
8594 void PPCTargetLowering::spliceIntoChain(SDValue ResChain,
8595 SDValue NewResChain,
8602 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
8614 bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
8644 static SDValue convertIntToFP(SDValue Op, SDValue Src, SelectionDAG &DAG,
8646 SDValue Chain = SDValue()) {
8673 SDValue PPCTargetLowering::LowerINT_TO_FPDirectMove(SDValue Op,
8681 SDValue Src = Op.getOperand(Op->isStrictFPOpcode() ? 1 : 0);
8686 SDValue Mov = DAG.getNode(MovOpc, dl, MVT::f64, Src);
8690 static SDValue widenVec(SelectionDAG &DAG, SDValue Vec, const SDLoc &dl) {
8701 SmallVector<SDValue, 16> Ops(NumConcat);
8703 SDValue UndefVec = DAG.getUNDEF(VecVT);
8710 SDValue PPCTargetLowering::LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG,
8714 SDValue Src = Op.getOperand(IsStrict ? 1 : 0);
8728 SDValue Wide = widenVec(DAG, Src, dl);
8746 SDValue ShuffleSrc2 =
8748 SDValue Arrange = DAG.getVectorShuffle(WideVT, dl, Wide, ShuffleSrc2, ShuffV);
8750 SDValue Extend;
8770 SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
8776 SDValue Src = Op.getOperand(IsStrict ? 1 : 0);
8777 SDValue Chain = IsStrict ? Op.getOperand(0) : DAG.getEntryNode();
8791 return Subtarget.hasP9Vector() ? Op : SDValue();
8795 return SDValue();
8798 SDValue Sel = DAG.getNode(ISD::SELECT, dl, Op.getValueType(), Src,
8817 SDValue SINT = Src;
8838 SDValue Round = DAG.getNode(ISD::AND, dl, MVT::i64,
8854 SDValue Cond = DAG.getNode(ISD::SRA, dl, MVT::i64,
8867 SDValue Bits;
8879 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8889 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8903 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
8905 SDValue Store = DAG.getStore(Chain, dl, SINT.getOperand(0), FIdx,
8922 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8931 SDValue FP = convertIntToFP(Op, Bits, DAG, Subtarget, Chain);
8957 SDValue Ld;
8963 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
8965 SDValue Store = DAG.getStore(Chain, dl, Src, FIdx,
8983 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8995 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
8997 SDValue Ext64 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i64, Src);
9000 SDValue Store = DAG.getStore(
9013 SDValue FP = convertIntToFP(Op, Ld, DAG, Subtarget, Chain);
9028 SDValue PPCTargetLowering::LowerGET_ROUNDING(SDValue Op,
9055 SDValue Chain = Op.getOperand(0);
9056 SDValue MFFS = DAG.getNode(PPCISD::MFFS, dl, {MVT::f64, MVT::Other}, Chain);
9059 SDValue CWD;
9066 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT);
9072 SDValue Four = DAG.getConstant(4, dl, PtrVT);
9073 SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four);
9079 SDValue CWD1 =
9082 SDValue CWD2 =
9090 SDValue RetVal =
9100 SDValue PPCTargetLowering::LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const {
9110 SDValue Lo = Op.getOperand(0);
9111 SDValue Hi = Op.getOperand(1);
9112 SDValue Amt = Op.getOperand(2);
9115 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
9117 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt);
9118 SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1);
9119 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3);
9120 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt,
9122 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5);
9123 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6);
9124 SDValue OutLo = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Amt);
9125 SDValue OutOps[] = { OutLo, OutHi };
9129 SDValue PPCTargetLowering::LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const {
9139 SDValue Lo = Op.getOperand(0);
9140 SDValue Hi = Op.getOperand(1);
9141 SDValue Amt = Op.getOperand(2);
9144 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
9146 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt);
9147 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1);
9148 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3);
9149 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt,
9151 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5);
9152 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6);
9153 SDValue OutHi = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Amt);
9154 SDValue OutOps[] = { OutLo, OutHi };
9158 SDValue PPCTargetLowering::LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const {
9167 SDValue Lo = Op.getOperand(0);
9168 SDValue Hi = Op.getOperand(1);
9169 SDValue Amt = Op.getOperand(2);
9172 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
9174 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt);
9175 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1);
9176 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3);
9177 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt,
9179 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5);
9180 SDValue OutHi = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Amt);
9181 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, dl, AmtVT),
9183 SDValue OutOps[] = { OutLo, OutHi };
9187 SDValue PPCTargetLowering::LowerFunnelShift(SDValue Op,
9194 SDValue X = Op.getOperand(0);
9195 SDValue Y = Op.getOperand(1);
9196 SDValue Z = Op.getOperand(2);
9205 SDValue SubZ =
9218 static SDValue getCanonicalConstSplat(uint64_t Val, unsigned SplatSize, EVT VT,
9240 static SDValue BuildIntrinsicOp(unsigned IID, SDValue Op, SelectionDAG &DAG,
9249 static SDValue BuildIntrinsicOp(unsigned IID, SDValue LHS, SDValue RHS,
9259 static SDValue BuildIntrinsicOp(unsigned IID, SDValue Op0, SDValue Op1,
9260 SDValue Op2, SelectionDAG &DAG, const SDLoc &dl,
9269 static SDValue BuildVSLDOI(SDValue LHS, SDValue RHS, unsigned Amt, EVT VT,
9278 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops);
9306 SDValue Op0 = V->getOperand(0);
9336 SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
9339 SDValue Op0 = Op->getOperand(0);
9343 return SDValue();
9345 SDValue Lo = Op0.getOperand(0);
9346 SDValue Hi = Op0.getOperand(1);
9348 return SDValue();
9356 static const SDValue *getNormalLoadInput(const SDValue &Op, bool &IsPermuted) {
9357 const SDValue *InputLoad = &Op;
9411 static bool isValidSplatLoad(const PPCSubtarget &Subtarget, const SDValue &Op,
9452 SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
9476 SDValue SplatNode = DAG.getNode(
9487 SDValue SplatNode = DAG.getUNDEF(MVT::v2i64);
9516 const SDValue *InputLoad = &Op.getOperand(0);
9535 for (SDValue BVInOp : Op->ops())
9555 return SDValue();
9564 return SDValue();
9569 SDValue Ops[] = {
9574 SDValue LdSplt = DAG.getMemIntrinsicNode(
9592 return SDValue();
9605 SDValue Z = DAG.getConstant(0, dl, MVT::v4i32);
9649 SDValue Elt = DAG.getConstant(SextVal, dl, MVT::i32);
9652 SDValue EltSize = DAG.getConstant(SplatSize, dl, MVT::i32);
9653 SDValue RetVal = DAG.getNode(PPCISD::VADD_SPLAT, dl, VT, Elt, EltSize);
9665 SDValue OnesV = getCanonicalConstSplat(-1, 4, MVT::v4i32, DAG, dl);
9668 SDValue Res = BuildIntrinsicOp(Intrinsic::ppc_altivec_vslw, OnesV,
9693 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9704 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9716 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9727 SDValue T = getCanonicalConstSplat(i, SplatSize, MVT::v16i8, DAG, dl);
9733 SDValue T = getCanonicalConstSplat(i, SplatSize, MVT::v16i8, DAG, dl);
9739 SDValue T = getCanonicalConstSplat(i, SplatSize, MVT::v16i8, DAG, dl);
9745 return SDValue();
9750 static SDValue GeneratePerfectShuffle(unsigned PFEntry, SDValue LHS,
9751 SDValue RHS, SelectionDAG &DAG,
9776 SDValue OpLHS, OpRHS;
9821 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs);
9825 /// lowerToVINSERTB - Return the SDValue if this VECTOR_SHUFFLE can be handled
9827 /// SDValue.
9828 SDValue PPCTargetLowering::lowerToVINSERTB(ShuffleVectorSDNode *N,
9833 SDValue V1 = N->getOperand(0);
9834 SDValue V2 = N->getOperand(1);
9908 return SDValue();
9917 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v16i8, V2, V2,
9926 /// lowerToVINSERTH - Return the SDValue if this VECTOR_SHUFFLE can be handled
9928 /// SDValue.
9929 SDValue PPCTargetLowering::lowerToVINSERTH(ShuffleVectorSDNode *N,
9935 return SDValue();
9939 SDValue V1 = N->getOperand(0);
9940 SDValue V2 = N->getOperand(1);
10014 return SDValue();
10022 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1);
10025 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v16i8, V2, V2,
10027 SDValue Conv2 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, Shl);
10028 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2,
10032 SDValue Conv2 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V2);
10033 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2,
10038 /// lowerToXXSPLTI32DX - Return the SDValue if this VECTOR_SHUFFLE can be
10040 /// return the default SDValue.
10041 SDValue PPCTargetLowering::lowerToXXSPLTI32DX(ShuffleVectorSDNode *SVN,
10045 SDValue LHS = peekThroughBitcasts(SVN->getOperand(0));
10046 SDValue RHS = peekThroughBitcasts(SVN->getOperand(1));
10049 SDValue VecShuffle(SVN, 0);
10054 return SDValue();
10062 return SDValue();
10069 return SDValue();
10078 return SDValue();
10087 SDValue Index;
10098 return SDValue();
10106 SDValue SplatNode = DAG.getNode(
10116 SDValue PPCTargetLowering::LowerROTL(SDValue Op, SelectionDAG &DAG) const {
10121 SDValue N0 = peekThroughBitcasts(Op.getOperand(0));
10122 SDValue N1 = peekThroughBitcasts(Op.getOperand(1));
10128 if (SDValue Shuffle =
10133 SDValue ArgVal = DAG.getBitcast(MVT::i128, N0);
10134 SDValue SHLOp = DAG.getNode(ISD::SHL, dl, MVT::i128, ArgVal,
10136 SDValue SRLOp = DAG.getNode(ISD::SRL, dl, MVT::i128, ArgVal,
10138 SDValue OROp = DAG.getNode(ISD::OR, dl, MVT::i128, SHLOp, SRLOp);
10146 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
10149 SDValue V1 = Op.getOperand(0);
10150 SDValue V2 = Op.getOperand(1);
10156 if (SDValue NewShuffle = combineVectorShuffle(SVOp, DAG)) {
10174 const SDValue *InputLoad = getNormalLoadInput(V1, IsPermutedLoad);
10207 SDValue BasePtr = LD->getBasePtr();
10211 SDValue Ops[] = {
10218 SDValue LdSplt =
10239 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10240 SDValue Conv2 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V2);
10242 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv2, Conv2,
10244 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Shl,
10248 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Conv2,
10254 SDValue SplatInsertNode;
10260 SDValue NewISDNode;
10272 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10273 SDValue Conv2 =
10276 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv1, Conv2,
10285 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1);
10286 SDValue Conv2 =
10289 SDValue PermDI = DAG.getNode(PPCISD::XXPERMDI, dl, MVT::v2i64, Conv1, Conv2,
10296 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1);
10297 SDValue ReveHWord = DAG.getNode(ISD::BSWAP, dl, MVT::v8i16, Conv);
10300 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10301 SDValue ReveWord = DAG.getNode(ISD::BSWAP, dl, MVT::v4i32, Conv);
10304 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1);
10305 SDValue ReveDWord = DAG.getNode(ISD::BSWAP, dl, MVT::v2i64, Conv);
10308 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v1i128, V1);
10309 SDValue ReveQWord = DAG.getNode(ISD::BSWAP, dl, MVT::v1i128, Conv);
10318 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10319 SDValue Splat = DAG.getNode(PPCISD::XXSPLT, dl, MVT::v4i32, Conv,
10326 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, V1);
10327 SDValue Swap = DAG.getNode(PPCISD::SWAP_NO_CHAIN, dl, MVT::v2f64, Conv);
10441 SDValue PPCTargetLowering::LowerVPERM(SDValue Op, SelectionDAG &DAG,
10443 SDValue V1, SDValue V2) const {
10496 SmallVector<SDValue, 16> ResultMask;
10544 SDValue VPermMask = DAG.getBuildVector(MVT::v16i8, dl, ResultMask);
10565 SDValue VPERMNode =
10575 static bool getVectorCompareInfo(SDValue Intrin, int &CompareOpc,
10860 SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
10875 SDValue Src = Op.getOperand(1);
10893 return SDValue(
10911 return SDValue(DAG.getMachineNode(
10925 return SDValue(
10936 SDValue WideVec =
10937 SDValue(DAG.getMachineNode(PPC::DMXXEXTFDMR512, dl, ReturnTypes,
10940 SmallVector<SDValue, 4> RetOps;
10941 SDValue Value = SDValue(WideVec.getNode(), 0);
10942 SDValue Value2 = SDValue(WideVec.getNode(), 1);
10944 SDValue Extract;
10975 SDValue WideVec = Op.getOperand(1);
10980 SmallVector<SDValue, 4> RetOps;
10982 SDValue Extract = DAG.getNode(
10996 return SDValue();
11001 SDValue WideVec = Op.getOperand(1);
11003 return SDValue();
11034 return SDValue(
11037 {SDValue(DAG.getMachineNode(PPC::XSCMPEXPDP, dl, MVT::i32,
11049 return SDValue(
11052 {SDValue(DAG.getMachineNode(CmprOpc, dl, MVT::i32, Op.getOperand(2),
11075 std::pair<SDValue, SDValue> Result =
11077 dl, SDValue());
11098 SDValue Res = Op.getOperand(I);
11112 return SDValue(); // Don't custom lower most intrinsics.
11116 SDValue Tmp = DAG.getNode(PPCISD::VCMP, dl, Op.getOperand(2).getValueType(),
11123 SDValue Ops[] = {
11129 SDValue CompNode = DAG.getNode(PPCISD::VCMP_rec, dl, VTs, Ops);
11133 SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32,
11170 SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op,
11179 SDValue Val = Op.getOperand(ArgStart + 1);
11188 return SDValue(
11197 return SDValue();
11201 SDValue PPCTargetLowering::LowerBSWAP(SDValue Op, SelectionDAG &DAG) const {
11221 SDValue PPCTargetLowering::LowerATOMIC_CMP_SWAP(SDValue Op,
11231 SDValue CmpOp = Op.getOperand(2);
11239 SDValue NewCmpOp =
11244 SmallVector<SDValue, 4> Ops;
11255 SDValue PPCTargetLowering::LowerATOMIC_LOAD_STORE(SDValue Op,
11268 SmallVector<SDValue, 4> Ops{
11273 SDValue LoadedVal = DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN, dl, Tys,
11275 SDValue ValLo = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i128, LoadedVal);
11276 SDValue ValHi =
11280 SDValue Val =
11289 SmallVector<SDValue, 4> Ops{
11292 SDValue Val = N->getOperand(1);
11293 SDValue ValLo = DAG.getNode(ISD::TRUNCATE, dl, MVT::i64, Val);
11294 SDValue ValHi = DAG.getNode(ISD::SRL, dl, MVT::i128, Val,
11308 static SDValue getDataClassTest(SDValue Op, FPClassTest Mask, const SDLoc &Dl,
11336 SDValue Rev = getDataClassTest(Op, ~Mask, Dl, DAG, Subtarget);
11343 SDValue Rev(DAG.getMachineNode(
11352 SDValue Sign(
11356 SDValue Normal(DAG.getNOT(
11358 SDValue(DAG.getMachineNode(
11365 SDValue Result = DAG.getNode(ISD::AND, Dl, MVT::i1, Sign, Normal);
11378 SDValue NanCheck = getDataClassTest(Op, fcNan, Dl, DAG, Subtarget);
11382 SDValue HighWord;
11394 SDValue Vec = DAG.getBitcast(
11405 SDValue NanRes = DAG.getSetCC(
11434 return SDValue(
11437 SDValue(DAG.getMachineNode(
11445 SDValue PPCTargetLowering::LowerIS_FPCLASS(SDValue Op,
11448 SDValue LHS = Op.getOperand(0);
11455 SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
11462 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
11465 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx,
11471 SDValue PPCTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
11480 SDValue V1 = Op.getOperand(0);
11481 SDValue V2 = Op.getOperand(1);
11497 SDValue BitcastVector = DAG.getBitcast(MVT::v4i32, V1);
11498 SDValue BitcastLoad = DAG.getBitcast(MVT::i32, V2);
11499 SDValue InsVecElt =
11508 return SDValue();
11519 return SDValue();
11523 SDValue Mtvsrz = DAG.getNode(PPCISD::MTVSRZ, dl, VT, V2);
11536 SDValue PPCTargetLowering::LowerVectorLoad(SDValue Op,
11540 SDValue LoadChain = LN->getChain();
11541 SDValue BasePtr = LN->getBasePtr();
11555 SmallVector<SDValue, 4> Loads;
11556 SmallVector<SDValue, 4> LoadChains;
11559 SDValue Load =
11573 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
11574 SDValue Value =
11577 SDValue RetOps[] = {Value, TF};
11581 SDValue PPCTargetLowering::LowerVectorStore(SDValue Op,
11585 SDValue StoreChain = SN->getChain();
11586 SDValue BasePtr = SN->getBasePtr();
11587 SDValue Value = SN->getValue();
11588 SDValue Value2 = SN->getValue();
11602 SmallVector<SDValue, 4> Stores;
11610 Value = SDValue(ExtNode, 0);
11611 Value2 = SDValue(ExtNode, 1);
11618 SDValue Elt;
11628 SDValue Store =
11637 SDValue TF = DAG.getTokenFactor(dl, Stores);
11641 SDValue PPCTargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const {
11644 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
11646 SDValue Zero = getCanonicalConstSplat(0, 1, MVT::v4i32, DAG, dl);
11648 SDValue Neg16 = getCanonicalConstSplat(-16, 4, MVT::v4i32, DAG, dl);
11649 SDValue RHSSwap = // = vrlw RHS, 16
11659 SDValue LoProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmulouh,
11662 SDValue HiProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmsumuhm,
11669 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
11673 SDValue EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleub,
11678 SDValue OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuloub,
11705 SDValue PPCTargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
11709 return SDValue();
11715 SDValue PPCTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
11724 return SDValue();
11727 SDValue Op0 = Op.getOperand(0);
11731 return SDValue();
11738 return SDValue();
11743 return SDValue();
11759 SDValue NewLoad[2];
11762 SDValue LdOp = Op0.getOperand(i);
11764 return SDValue();
11767 SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr()};
11772 SDValue NewOp =
11780 SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr()};
11781 SDValue NewLd = DAG.getMemIntrinsicNode(
11793 SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
11866 case ISD::INTRINSIC_W_CHAIN: return SDValue();
11888 SmallVectorImpl<SDValue>&Results,
11895 SDValue Res = LowerATOMIC_LOAD_STORE(SDValue(N, 0), DAG);
11902 SDValue RTB = DAG.getNode(PPCISD::READ_TIME_BASE, dl, VTs, N->getOperand(0));
11918 SDValue NewInt = DAG.getNode(N->getOpcode(), dl, VTs, N->getOperand(0),
11935 Results.push_back(LowerINTRINSIC_WO_CHAIN(SDValue(N, 0), DAG));
11947 SDValue NewNode = LowerVAARG(SDValue(N, 1), DAG);
11962 SDValue LoweredValue = LowerFP_TO_INT(SDValue(N, 0), DAG, dl);
11971 SDValue Lowered = LowerTRUNCATEVector(SDValue(N, 0), DAG);
11984 SDValue Lowered = LowerFP_EXTEND(SDValue(N, 0), DAG);
13702 SDValue PPCTargetLowering::getSqrtInputTest(SDValue Op, SelectionDAG &DAG,
13713 SDValue FTSQRT = DAG.getNode(PPCISD::FTSQRT, DL, MVT::i32, Op);
13725 SDValue SRIdxVal = DAG.getTargetConstant(PPC::sub_eq, DL, MVT::i32);
13726 return SDValue(DAG.getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL, MVT::i1,
13731 SDValue
13732 PPCTargetLowering::getSqrtResultForDenormInput(SDValue Op,
13743 SDValue PPCTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
13760 return SDValue();
13763 SDValue PPCTargetLowering::getRecipEstimate(SDValue Operand, SelectionDAG &DAG,
13775 return SDValue();
13803 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base,
13815 static bool isConsecutiveLSLoc(SDValue Loc, EVT VT, LSBaseSDNode *Base,
13821 SDValue BaseLoc = Base->getBasePtr();
13834 SDValue Base1 = Loc, Base2 = BaseLoc;
13860 SDValue Loc = LS->getBasePtr();
13933 SDValue Chain = LD->getChain();
13998 static SDValue generateEquivalentSub(SDNode *N, int Size, bool Complement,
14030 SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
14040 return SDValue();
14046 return SDValue();
14067 return SDValue();
14070 SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
14087 return SDValue();
14091 return SDValue();
14105 return SDValue();
14112 : SDValue());
14127 return SDValue();
14143 return SDValue();
14155 return SDValue();
14157 SmallVector<SDValue, 4> Inputs;
14158 SmallVector<SDValue, 8> BinOps, PromOps;
14178 SDValue BinOp = BinOps.pop_back_val();
14211 return SDValue();
14225 return SDValue();
14234 return SDValue();
14238 return SDValue();
14246 return SDValue();
14255 return SDValue();
14259 return SDValue();
14284 SDValue PromOp = PromOpHandles.back().getValue();
14298 SDValue RepValue = PromOp.getOperand(0);
14325 SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(),
14343 return SDValue(N, 0);
14346 SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
14367 return SDValue();
14371 return SDValue();
14378 return SDValue();
14380 SmallVector<SDValue, 4> Inputs;
14381 SmallVector<SDValue, 8> BinOps(1, N->getOperand(0)), PromOps;
14387 SDValue BinOp = BinOps.pop_back_val();
14413 return SDValue();
14431 return SDValue();
14453 return SDValue();
14507 SDValue InSrc = Inputs[i].getOperand(0);
14530 SDValue PromOp = PromOpHandles.back().getValue();
14565 SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(),
14614 SDValue ShiftCst =
14622 SDValue PPCTargetLowering::combineSetCC(SDNode *N,
14629 SDValue LHS = N->getOperand(0);
14630 SDValue RHS = N->getOperand(1);
14645 SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1));
14654 static bool isFPExtLoad(SDValue Op) {
14668 SDValue PPCTargetLowering::
14677 SDValue FirstInput = N->getOperand(0);
14692 SmallVector<SDValue, 4> Ops;
14695 SDValue NextOp = N->getOperand(i);
14697 return SDValue();
14700 return SDValue();
14706 return SDValue();
14715 return SDValue();
14719 SDValue In = N->getOperand(i).getOperand(0);
14726 SDValue Trunc =
14743 SDValue BV = DAG.getBuildVector(NewVT, dl, Ops);
14746 return SDValue();
14755 static SDValue combineBVOfConsecutiveLoads(SDNode *N, SelectionDAG &DAG) {
14763 return SDValue();
14768 SDValue FirstInput = N->getOperand(0);
14780 return SDValue();
14790 return SDValue();
14792 SDValue NextInput = IsRoundOfExtLoad ? N->getOperand(i).getOperand(0) :
14795 return SDValue();
14797 SDValue PreviousInput =
14804 return SDValue();
14815 return SDValue();
14822 SDValue WideLoad;
14823 SDValue ReturnSDVal;
14843 return SDValue();
14853 static SDValue addShuffleForVecExtend(SDNode *N, SelectionDAG &DAG,
14854 SDValue Input, uint64_t Elems,
14873 SDValue Shuffle =
14878 SDValue Conv = DAG.getBitcast(VT, Shuffle);
14892 static SDValue combineBVOfVecSExt(SDNode *N, SelectionDAG &DAG) {
14913 SDValue Input;
14915 auto isSExtOfVecExtract = [&](SDValue Op) -> bool {
14924 SDValue Extract = Op.getOperand(0);
14952 return SDValue();
14972 return SDValue();
14983 return SDValue();
14990 static SDValue combineBVZEXTLOAD(SDNode *N, SelectionDAG &DAG) {
14995 return SDValue();
14997 SDValue Operand = N->getOperand(0);
15001 return SDValue();
15015 return SDValue();
15017 SDValue LoadOps[] = {
15026 SDValue PPCTargetLowering::DAGCombineBuildVector(SDNode *N,
15035 return SDValue();
15040 SDValue FirstInput = N->getOperand(0);
15042 SDValue Reduced = combineElementTruncationToVectorTruncation(N, DCI);
15049 SDValue Reduced = combineBVOfConsecutiveLoads(N, DAG);
15067 SDValue BVOfZLoad = combineBVZEXTLOAD(N, DAG);
15073 return SDValue();
15079 return SDValue();
15082 return SDValue();
15084 return SDValue();
15086 SDValue Ext1 = FirstInput.getOperand(0);
15087 SDValue Ext2 = N->getOperand(1).getOperand(0);
15090 return SDValue();
15095 return SDValue();
15098 return SDValue();
15108 return SDValue();
15110 SDValue SrcVec = Ext1.getOperand(0);
15117 SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
15124 return SDValue();
15128 SDValue Op(N, 0);
15133 return SDValue();
15135 return SDValue();
15138 return SDValue();
15140 SDValue FirstOperand(Op.getOperand(0));
15150 SDValue WidthConst =
15154 SDValue Ops[] = { LDN->getChain(), LDN->getBasePtr(), WidthConst };
15155 SDValue Ld = DAG.getMemIntrinsicNode(PPCISD::LXSIZX, dl,
15162 SDValue ExtOps[] = { Ld, WidthConst };
15163 SDValue Ext = DAG.getNode(PPCISD::VEXTS, dl, MVT::f64, ExtOps);
15175 return SDValue();
15196 SDValue Src = Op.getOperand(0).getOperand(0);
15202 return SDValue();
15209 SDValue Tmp = DAG.getNode(FCTOp, dl, MVT::f64, Src);
15210 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Tmp);
15221 return SDValue();
15226 SDValue PPCTargetLowering::expandVSXLoadForLE(SDNode *N,
15231 return SDValue();
15235 SDValue Chain;
15236 SDValue Base;
15251 return SDValue();
15267 SDValue LoadOps[] = { Chain, Base };
15268 SDValue Load = DAG.getMemIntrinsicNode(PPCISD::LXVD2X, dl,
15274 SDValue Swap = DAG.getNode(
15280 SDValue N = DAG.getNode(ISD::BITCAST, dl, VecTy, Swap);
15292 SDValue PPCTargetLowering::expandVSXStoreForLE(SDNode *N,
15297 return SDValue();
15301 SDValue Chain;
15302 SDValue Base;
15319 return SDValue();
15333 SDValue Src = N->getOperand(SrcOpnd);
15342 SDValue Swap = DAG.getNode(PPCISD::XXSWAPD, dl,
15346 SDValue StoreOps[] = { Chain, Swap, Base };
15347 SDValue Store = DAG.getMemIntrinsicNode(PPCISD::STXVD2X, dl,
15355 SDValue PPCTargetLowering::combineStoreFPToInt(SDNode *N,
15367 SDValue Val = N->getOperand(1).getOperand(Strict ? 1 : 0);
15372 return SDValue();
15381 return SDValue();
15385 return SDValue();
15391 SDValue Ops[] = {N->getOperand(0), Val, N->getOperand(2),
15417 static bool isSplatBV(SDValue Op) {
15420 SDValue FirstOp;
15436 static SDValue isScalarToVec(SDValue Op) {
15440 return SDValue();
15444 return SDValue();
15473 static SDValue getSToVPermuted(SDValue OrigSToV, SelectionDAG &DAG,
15479 SDValue Input = OrigSToV.getOperand(0);
15483 SDValue OrigVector = Input.getOperand(0);
15515 SDValue PPCTargetLowering::combineVectorShuffle(ShuffleVectorSDNode *SVN,
15517 SDValue LHS = SVN->getOperand(0);
15518 SDValue RHS = SVN->getOperand(1);
15521 SDValue Res(SVN, 0);
15547 SDValue SToVLHS = isScalarToVec(LHS);
15548 SDValue SToVRHS = isScalarToVec(RHS);
15624 SDValue TheSplat = IsLittleEndian ? RHS : LHS;
15682 SDValue SplatVal =
15693 SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
15717 return SDValue();
15723 return SDValue();
15726 return SDValue();
15735 return SDValue();
15738 SDValue LoadOps[] = {LSBase->getChain(), LSBase->getBasePtr()};
15749 return SDValue();
15752 SDValue StoreOps[] = {LSBase->getChain(), SVN->getOperand(0),
15762 static bool isStoreConditional(SDValue Intrin, unsigned &StoreWidth) {
15777 SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
15789 SDValue Op1 = N->getOperand(0);
15790 SDValue Op2 = N->getOperand(1);
15796 SDValue NarrowOp = Op1.getOperand(0);
15805 SDValue ConstOp = DAG.getConstant(Imm, dl, MVT::i32);
15806 SDValue NarrowAnd = DAG.getNode(ISD::AND, dl, MVT::i32, NarrowOp, ConstOp);
15842 if (SDValue CSCC = combineSetCC(N, DCI))
15863 SDValue Val = combineStoreFPToInt(N, DCI);
15870 SDValue Val= combineVReverseMemOP(SVN, cast<LSBaseSDNode>(N), DCI);
15887 SDValue BSwapOp = N->getOperand(1).getOperand(0);
15903 SDValue Ops[] = {
15920 SDValue Const64 = DAG.getConstant(Val64, dl, MVT::i64);
15928 return SDValue(N, 0);
16022 SDValue BasePtr = LD->getBasePtr();
16033 SDValue FloatLoad = DAG.getLoad(MVT::f32, dl, LD->getChain(), BasePtr,
16036 SDValue AddPtr =
16039 SDValue FloatLoad2 = DAG.getLoad(
16040 MVT::f32, dl, SDValue(FloatLoad.getNode(), 1), AddPtr,
16047 DAG.ReplaceAllUsesOfValueWith(SDValue(LD, 1), BasePtr);
16053 DAG.ReplaceAllUsesOfValueWith(SDValue(LD, LD->isIndexed() ? 2 : 1),
16054 SDValue(FloatLoad2.getNode(), 1));
16059 return SDValue(N, 0);
16072 SDValue Chain = LD->getChain();
16073 SDValue Ptr = LD->getBasePtr();
16110 SDValue PermCntl = BuildIntrinsicOp(Intr, Ptr, DAG, dl, PermCntlTy);
16124 SDValue LDXIntID =
16126 SDValue BaseLoadOps[] = { Chain, LDXIntID, Ptr };
16127 SDValue BaseLoad =
16149 SDValue Increment =
16156 SDValue ExtraLoadOps[] = { Chain, LDXIntID, Ptr };
16157 SDValue ExtraLoad =
16162 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
16170 SDValue Perm;
16189 return SDValue(N, 0);
16199 SDValue Add = N->getOperand(1);
16214 return SDValue(U, 0);
16231 return SDValue(V, 0);
16245 SDValue V1 = N->getOperand(1);
16246 SDValue V2 = N->getOperand(2);
16295 DAG.ReplaceAllUsesOfValueWith(SDValue(N, 1), N->getOperand(0));
16297 return SDValue();
16332 SDValue Load = N->getOperand(0);
16335 SDValue Ops[] = {
16340 SDValue BSLoad =
16347 SDValue ResVal = BSLoad;
16360 return SDValue(N, 0);
16366 return SDValue();
16371 return SDValue();
16372 SDValue BasePtr = LD->getBasePtr();
16373 SDValue Lo = DAG.getLoad(MVT::i32, dl, LD->getChain(), BasePtr,
16380 SDValue Hi = DAG.getLoad(MVT::i32, dl, LD->getChain(), BasePtr, NewMMO);
16382 SDValue Res;
16387 SDValue TF =
16390 DAG.ReplaceAllUsesOfValueWith(SDValue(LD, 1), TF);
16430 if (User->getOperand(i) == SDValue(VCMPrecNode, 1)) {
16440 return SDValue(VCMPrecNode, 0);
16451 SDValue LHS = N->getOperand(2), RHS = N->getOperand(3);
16477 return SDValue();
16483 if (SDValue Impossible = isImpossibleCompare())
16495 SDValue Ops[] = {LHS.getOperand(0), LHS.getOperand(2), LHS.getOperand(3),
16498 SDValue ConstSt = DAG.getMemIntrinsicNode(
16503 SDValue InChain;
16508 SmallVector<SDValue, 4> InChains;
16509 SDValue InTF = N->getOperand(0);
16526 if (SDValue Impossible = isImpossibleCompare())
16531 SDValue Ops[] = {
16537 SDValue CompNode = DAG.getNode(PPCISD::VCMP_rec, dl, VTs, Ops);
16568 return SDValue();
16571 SDValue
16578 return SDValue();
16581 return SDValue();
16584 SDValue N0 = N->getOperand(0);
16588 SDValue ShiftAmt = DAG.getConstant(Lg2, DL, VT);
16590 SDValue Op = DAG.getNode(PPCISD::SRA_ADDZE, DL, VT, N0, ShiftAmt);
16605 void PPCTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
16935 void PPCTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
16937 std::vector<SDValue> &Ops,
16939 SDValue Result;
17011 SmallVectorImpl<SDValue> &Ops,
17071 SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op,
17078 return SDValue();
17094 SDValue FrameAddr =
17097 SDValue Offset =
17106 SDValue RetAddrFI = getReturnAddrFrameIndex(DAG);
17111 SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
17131 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg,
17160 bool PPCTargetLowering::isAccessedAsGotIndirect(SDValue GA) const {
17403 bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
17479 SDValue C) const {
17640 SDValue PPCTargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
17645 return SDValue();
17657 SDValue N0 = Op.getOperand(0);
17658 SDValue N1 = Op.getOperand(1);
17659 SDValue N2 = Op.getOperand(2);
17663 SDValue NegN2 =
17667 return SDValue();
17676 SDValue NegN0 = getNegatedExpression(N0, DAG, LegalOps, OptForSize,
17680 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize,
17763 static SDValue stripModuloOnShift(const TargetLowering &TLI, SDNode *N,
17765 SDValue N0 = N->getOperand(0);
17766 SDValue N1 = N->getOperand(1);
17792 return SDValue();
17795 SDValue PPCTargetLowering::combineSHL(SDNode *N, DAGCombinerInfo &DCI) const {
17799 SDValue N0 = N->getOperand(0);
17805 return SDValue();
17809 SDValue ExtsSrc = N0.getOperand(0);
17812 return SDValue();
17815 SDValue ShiftBy = SDValue(CN1, 0);
17825 SDValue PPCTargetLowering::combineSRA(SDNode *N, DAGCombinerInfo &DCI) const {
17829 return SDValue();
17832 SDValue PPCTargetLowering::combineSRL(SDNode *N, DAGCombinerInfo &DCI) const {
17836 return SDValue();
17843 static SDValue combineADDToADDZE(SDNode *N, SelectionDAG &DAG,
17846 return SDValue();
17848 SDValue LHS = N->getOperand(0);
17849 SDValue RHS = N->getOperand(1);
17851 auto isZextOfCompareWithConstant = [](SDValue Op) {
17856 SDValue Cmp = Op.getOperand(0);
17878 return SDValue();
17882 SDValue Cmp = RHS.getOperand(0);
17883 SDValue Z = Cmp.getOperand(0);
17896 SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Z,
17898 SDValue AddOrZ = NegConstant != 0 ? Add : Z;
17899 SDValue Addc = DAG.getNode(ISD::ADDC, DL, DAG.getVTList(MVT::i64, MVT::Glue),
17902 SDValue(Addc.getNode(), 1));
17911 SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Z,
17913 SDValue AddOrZ = NegConstant != 0 ? Add : Z;
17914 SDValue Subc = DAG.getNode(ISD::SUBC, DL, DAG.getVTList(MVT::i64, MVT::Glue),
17917 SDValue(Subc.getNode(), 1));
17921 return SDValue();
17929 static SDValue combineADDToMAT_PCREL_ADDR(SDNode *N, SelectionDAG &DAG,
17932 return SDValue();
17936 SDValue LHS = N->getOperand(0);
17937 SDValue RHS = N->getOperand(1);
17943 return SDValue();
17951 return SDValue();
17958 return SDValue();
17962 SDValue GA =
17965 SDValue MatPCRel =
17970 SDValue PPCTargetLowering::combineADD(SDNode *N, DAGCombinerInfo &DCI) const {
17977 return SDValue();
17989 SDValue PPCTargetLowering::combineTRUNCATE(SDNode *N,
17994 if (SDValue CRTruncValue = DAGCombineTruncBoolExt(N, DCI))
17999 SDValue Op0 = N->getOperand(0);
18003 return SDValue();
18012 return SDValue();
18024 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0));
18029 return SDValue();
18032 SDValue PPCTargetLowering::combineMUL(SDNode *N, DAGCombinerInfo &DCI) const {
18037 return SDValue();
18042 return SDValue();
18084 return SDValue();
18086 SDValue Op0 = N->getOperand(0);
18087 SDValue Op1 =
18090 SDValue Res = DAG.getNode(ISD::ADD, DL, VT, Op0, Op1);
18101 return SDValue();
18103 SDValue Op0 = N->getOperand(0);
18104 SDValue Op1 =
18114 return SDValue();
18120 SDValue PPCTargetLowering::combineFMALike(SDNode *N,
18122 SDValue N0 = N->getOperand(0);
18123 SDValue N1 = N->getOperand(1);
18124 SDValue N2 = N->getOperand(2);
18135 return SDValue();
18140 return SDValue();
18144 if (SDValue NegN0 = getCheaperNegatedExpression(N0, DAG, LegalOps, CodeSize))
18149 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize))
18152 return SDValue();
18229 static void setAlignFlagsForFI(SDValue N, unsigned &FlagSet,
18258 static void computeFlagsForAddressComputation(SDValue N, unsigned &FlagSet,
18288 SDValue RHS = N.getOperand(1);
18310 static bool isPCRelNode(SDValue N) {
18320 unsigned PPCTargetLowering::computeMOFlags(const SDNode *Parent, SDValue N,
18347 SDValue IntrinOp = (ID == Intrinsic::ppc_vsx_lxvp)
18438 PPC::AddrMode PPCTargetLowering::SelectForceXFormMode(SDValue N, SDValue &Disp,
18439 SDValue &Base,
18473 SelectionDAG &DAG, const SDLoc &DL, SDValue Val, SDValue *Parts,
18490 SDValue PPCTargetLowering::lowerToLibCall(const char *LibCallName, SDValue Op,
18496 SDValue Callee =
18501 for (const SDValue &N : Op->op_values()) {
18511 SDValue InChain = DAG.getEntryNode();
18512 SDValue TCChain = InChain;
18529 SDValue PPCTargetLowering::lowerLibCallBasedOnType(
18530 const char *LibCallFloatName, const char *LibCallDoubleName, SDValue Op,
18538 return SDValue();
18541 bool PPCTargetLowering::isLowringToMASSFiniteSafe(SDValue Op) const {
18547 bool PPCTargetLowering::isLowringToMASSSafe(SDValue Op) const {
18555 SDValue PPCTargetLowering::lowerLibCallBase(const char *LibCallDoubleName,
18559 SDValue Op,
18562 return SDValue();
18572 SDValue PPCTargetLowering::lowerPow(SDValue Op, SelectionDAG &DAG) const {
18577 SDValue PPCTargetLowering::lowerSin(SDValue Op, SelectionDAG &DAG) const {
18582 SDValue PPCTargetLowering::lowerCos(SDValue Op, SelectionDAG &DAG) const {
18587 SDValue PPCTargetLowering::lowerLog(SDValue Op, SelectionDAG &DAG) const {
18592 SDValue PPCTargetLowering::lowerLog10(SDValue Op, SelectionDAG &DAG) const {
18597 SDValue PPCTargetLowering::lowerExp(SDValue Op, SelectionDAG &DAG) const {
18604 static void setXFormForUnalignedFI(SDValue N, unsigned Flags,
18617 SDValue N, SDValue &Disp,
18618 SDValue &Base,
18650 SDValue Op0 = N.getOperand(0);
18651 SDValue Op1 = N.getOperand(1);
18699 Base = SDValue(DAG.getMachineNode(LIS, DL, CNType, Base), 0);