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Searched defs:ResVReg (Results 1 – 4 of 4) sorted by relevance

/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVInstructionSelector.cpp328 Register ResVReg = HasDefs ? I.getOperand(0).getReg() : Register(0); select() local
341 spvSelect(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const spvSelect() argument
617 selectExtInst(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,CL::OpenCLExtInst CLInst) const selectExtInst() argument
625 selectExtInst(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,CL::OpenCLExtInst CLInst,GL::GLSLExtInst GLInst) const selectExtInst() argument
635 selectExtInst(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,const ExtInstList & Insts) const selectExtInst() argument
659 selectUnOpWithSrc(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,Register SrcReg,unsigned Opcode) const selectUnOpWithSrc() argument
671 selectUnOp(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,unsigned Opcode) const selectUnOp() argument
710 selectBitcast(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectBitcast() argument
771 selectLoad(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectLoad() argument
810 selectStackSave(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectStackSave() argument
839 selectMemOperation(Register ResVReg,MachineInstr & I) const selectMemOperation() argument
888 selectAtomicRMW(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,unsigned NewOpcode,unsigned NegateOpcode) const selectAtomicRMW() argument
942 Register ResVReg = I.getOperand(i).getReg(); selectUnmergeValues() local
976 selectAtomicCmpXchg(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectAtomicCmpXchg() argument
1073 selectAddrSpaceCast(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectAddrSpaceCast() argument
1240 selectAnyOrAll(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,unsigned OpAnyOrAll) const selectAnyOrAll() argument
1300 selectAll(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectAll() argument
1306 selectAny(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectAny() argument
1312 selectFmix(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectFmix() argument
1333 selectRsqrt(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectRsqrt() argument
1350 selectBitreverse(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectBitreverse() argument
1361 selectFreeze(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectFreeze() argument
1401 selectConstVector(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectConstVector() argument
1495 selectSplatVector(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectSplatVector() argument
1528 selectCmp(Register ResVReg,const SPIRVType * ResType,unsigned CmpOpc,MachineInstr & I) const selectCmp() argument
1545 selectICmp(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectICmp() argument
1607 selectFCmp(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectFCmp() argument
1658 selectSelect(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,bool IsSigned) const selectSelect() argument
1678 selectIToF(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,bool IsSigned,unsigned Opcode) const selectIToF() argument
1698 selectExt(Register ResVReg,const SPIRVType * ResType,MachineInstr & I,bool IsSigned) const selectExt() argument
1718 selectIntToBool(Register IntReg,Register ResVReg,MachineInstr & I,const SPIRVType * IntTy,const SPIRVType * BoolTy) const selectIntToBool() argument
1743 selectTrunc(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectTrunc() argument
1761 selectConst(Register ResVReg,const SPIRVType * ResType,const APInt & Imm,MachineInstr & I) const selectConst() argument
1793 selectOpUndef(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectOpUndef() argument
1822 selectInsertVal(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectInsertVal() argument
1838 selectExtractVal(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectExtractVal() argument
1851 selectInsertElt(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectInsertElt() argument
1866 selectExtractElt(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectExtractElt() argument
1880 selectGEP(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectGEP() argument
1953 selectIntrinsic(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectIntrinsic() argument
2087 selectAllocaArray(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectAllocaArray() argument
2101 selectFrameIndex(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectFrameIndex() argument
2174 selectPhi(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectPhi() argument
2189 selectGlobalValue(Register ResVReg,MachineInstr & I,const MachineInstr * Init) const selectGlobalValue() argument
2297 selectLog10(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectLog10() argument
2348 selectSpvThreadId(Register ResVReg,const SPIRVType * ResType,MachineInstr & I) const selectSpvThreadId() argument
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H A DSPIRVPostLegalizer.cpp100 Register ResVReg = I.getOperand(i).getReg(); processNewInstrs() local
116 Register ResVReg = I.getOperand(0).getReg(); processNewInstrs() local
H A DSPIRVGlobalRegistry.cpp603 buildGlobalVariable(Register ResVReg,SPIRVType * BaseType,StringRef Name,const GlobalValue * GV,SPIRV::StorageClass::StorageClass Storage,const MachineInstr * Init,bool IsConst,bool HasLinkageTy,SPIRV::LinkageType::LinkageType LinkageType,MachineIRBuilder & MIRBuilder,bool IsInstSelector) buildGlobalVariable() argument
723 Register ResVReg = createTypeVReg(MIRBuilder); getOpTypeOpaque() local
740 Register ResVReg = createTypeVReg(MIRBuilder); getOpTypeStruct() local
1122 Register ResVReg = createTypeVReg(MIRBuilder); getOrCreateOpTypeImage() local
1141 Register ResVReg = createTypeVReg(MIRBuilder); getOrCreateOpTypeSampler() local
1152 Register ResVReg = createTypeVReg(MIRBuilder); getOrCreateOpTypePipe() local
1164 Register ResVReg = createTypeVReg(MIRBuilder); getOrCreateOpTypeDeviceEvent() local
1177 Register ResVReg = createTypeVReg(MIRBuilder); getOrCreateOpTypeSampledImage() local
1188 Register ResVReg = DT.find(ExtensionType, &MIRBuilder.getMF()); getOrCreateOpTypeCoopMatr() local
1206 Register ResVReg = DT.find(Ty, &MIRBuilder.getMF()); getOrCreateOpTypeByOpcode() local
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H A DSPIRVCallLowering.cpp520 Register ResVReg = lowerCall() local
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